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Decoders:
A decoder is a logic circuit that accepts a set of inputs that represents a binary number and activates only the output
that corresponds to that input number.
A0 O0
A1 O1 M inputs
N inputs (Only one output is high
(2N input codes) A2 Decoder O2
for each input codes)
- -
- -
AN-1 OM-1
Fig.: General decoder diagram.
The diagram for a general decoder with N inputs and M outputs is shown in the figure. Since each of the N inputs can
be 0 or 1, there are 2N possible input combinations or codes. For each of these input combinations only one of the M
outputs will be active, all other outputs remain inactive.
Some decoders do not utilize all of the 2N possible input codes but only certain ones. Decoders of this type are often
designed so that if any of the unused codes are applied to the input, none of the outputs will be activated.
A (LSB)

C (MSB)

7 6 5 4 3 2 1 0

O7= CBA O6= CBA O5= CB A O4= CB A O3= C BA O2= C BA O1= C B A O0= C B A

Input Output
C B A O7 O6 O 5 O4 O3 O2 O 1 O0
0 0 0 0 0 0 0 0 0 0 1
0 0 1 0 0 0 0 0 0 1 0
0 1 0 0 0 0 0 0 1 0 0
0 1 1 0 0 0 0 1 0 0 0
1 0 0 0 0 0 1 0 0 0 0
1 0 1 0 0 1 0 0 0 0 0
1 1 0 0 1 0 0 0 0 0 0
1 1 1 1 0 0 0 0 0 0 0
Fig.: 3-line-to-8-line decoder – logic circuit and truth table.
Figure shows the circuitry for a decoder with three inputs and 23=8 outputs. For a given input code, the only output
that is active is the one corresponding to the decimal equivalent of the binary input code. For example, output O6
goes HIGH only when CBA=1102=610.
This decoder can be referred to as –
(I) 3-line-to-8-line decoder – because it has three input lines and eight output lines.

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(II) binary-to-octal decoder/converter – because it takes a three-bit binary input code and activates one of the
eight outputs corresponding to that code.
(III) 1-of-8 decoder – because only 1 of the 8 outputs is activated at one time.
Decoders are used whenever an output or a group of outputs is to be activated only on the occurrence of a specific
combination of input levels. When decoder inputs come from a counter that is being continually pulsed, the decoder
outputs will be activated sequentially, and they can be used as timing or sequencing signals to turn devices on or off
at specific times.
Decoders are widely used in the memory system of a computer where they respond to the address code generated
by the central processor to activate a particular memory location.

74138 Decoder IC:

A2 (MSB)

A1

A0

E1
E2
7 6 5 4 3 2 1 0 E3

O7 O6 O5 O4 O3 O2 O1 O0
Data input, I E2
+ 5V
E1

E1 E2 E3 Outputs
0 0 1 Respond to the input A2A1A0
1 x x Disable – all HIGH A2
x 1 x Disable – all HIGH Select 74ALS138
A1 decoder/DEMUX
x x 0 Disable – all HIGH code
A0

O7 O6 O5 O4 O3 O2 O1 O0
Fig.: 74138 decoder – logic diagram, truth table and logic symbol.
Figure shows the logic diagram for the 74138 decoder. It has NAND gate outputs, so that its outputs are active-LOW.
The input code is applied at A2, A1 and A0, where A2 is the MSB. With three inputs and eight outputs, this is a 3-to-8
decoder or, equivalently, a 1-of-8 decoder.
Inputs E1 , E 2 and E3 are separate enable inputs that are combined in the AND gate and the AND gate output is
connected to a fourth input of each gate. In order to enable the output NAND gates to respond to the input code at
A2A1A0, this AND gate output must be HIGH. This will occur only when E1 = E 2 = 0 and E3=1. If one or more of the

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enable inputs is in its inactive state, the AND output will be LOW, which will force all NAND outputs to their inactive
HIGH state regardless of the input code.

BCD-to-Decimal Decoders: D (MSB)

C BCD
input
B code

9 8 7 6 5 4 3 2 1 0

O9 O8 O7 O6 O5 O4 O3 O2 O1 O0
Inputs
D C
D C B A Active Output
B A
L L L L O0
L L L H O1
L L H L O2
7442 L L H H O3
1-of-10 decoder L H L L O4
L H L H O5
L H H L O6
O9 O8 O7 O6 O5 O4 O3 O2 O1 O0 L H H H O7
H L L L O8
H L O9 L H
H L H L None
H L H H None
H H L L None
H H L H None
H H H L None
H H H H None
Fig.: 7442 BCD-to-decimal decoder – logic diagram, logic symbol and truth table.
Figure shows the logic diagram, logic symbol and truth table for a 7442 BCD-to-decimal decoder.
Each output goes LOW only when its corresponding BCD input is applied. For example, O5 will go LOW only when
inputs DCBA=0101; O8 will go LOW only when DCBA=1000.
For input combinations that are invalid for BCD, none of the outputs will be activated.
This decoder can also be referred to as a 4-to-10 decoder or a 1-of-10 decoder.

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BCD-to-7-Segment Decoder/Drivers:
One of the simplest and most popular methods for displaying numerical digits uses a 7-segment configuration to form
the decimal characters 0 through 9 and sometimes the hex characters A through F. One common arrangement uses
LEDs for each segment. By controlling the current through each LED, some segments will be light and others will be
dark so that the desired character pattern will be generated.
A BCD-to-7-segment decoder/driver is used to take a four-bit BCD input and provide the outputs that will pass current
through the appropriate segments to display the decimal digit.
The LED display used may be either –
(I) a common-anode type – the anodes of all of the segments are tied together to +VCC and
must be driven by a BCD-to-7-segment decoder/driver with active-LOW outputs that ground the cathodes of
these segments that are to be activated, or
(II) a common-cathode arrangement – the cathodes of all of the segments are tied together and connected to
ground and
must be driven by a BCD-to-7-segment decoder/driver with active-HIGH outputs that apply a HIGH voltage to
the anodes of those segments that are to be activated.
Figure below shows a BCD-to-7-segment decoder/driver being used to drive a 7-segment LED readout. Each
segment consists of one or two LEDs. The anodes of the LEDs are all tied to +5V. The cathodes of the LEDs are
connected through current-limiting resistors to the appropriate outputs of the decoder/driver.
+VCC

a Common-
a anode
D connections
b
C
BCD
c f b
input B BCD-to-
7-segment g
decoder/driver d
A
e
Blanking BI / RBO f e c
controls RBI
g d
LED test LT
input
7446 or 7447

Fig.: BCD-to-7-segment decoder/driver driving a common-anode 7-segment LED display.

a

f b
g

e c

d
Fig.: Segment patterns for all possible input codes.

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To illustrate the operation of this circuit, suppose that the BCD input is D=0, C=1, B=0, A=1, which is BCD for 5. With
these inputs the decoder/driver outputs a , f , g , c and d will be driven LOW, allowing current to flow through the
a, f, g, c and d LED segments. The b and e outputs will be HIGH, so that LED segments b and e cannot conduct.
Therefore, these inputs display the numeral 5.
Thus, a BCD-to-7-segment decoder/driver does not activate only one output for each combination of inputs; rather,
activates a unique pattern of outputs for each combination of inputs.
The decoder has 3 control inputs: LT , RBI and BI . It also has one control output: RBO . The control I/O can be
used to implement various functions or they can be disabled.
LT : It is active LOW Lamp Test input. It can be connected to a switch or control system. The user can flip the switch
to test all the segments of the LED display.
When the switch is in the +5V position it disables the LT feature. DCBA controls the display.
When the switch is in the 0V position it enables the LT feature. All segments light. LT overrides the conditions at
DCBA. The user can now check the display for burned out segments.
BI : It is active LOW Blanking Input. It can be connected to a switch or control system. The user can flip the switch to
turn off all the segments of the LED display.
When the switch is in the +5V position it disables the BI feature. DCBA controls the display.
When the switch is in the 0V position it enables the BI feature. All segments turn off. BI overrides the conditions
at DCBA.
RBI / RBO :The RBO output is the Ripple Blanking Output. It works with RBI (Ripple Blanking Input) to blank the
number 0.
RBI can be connected to a switch or control system. The user can flip the switch to turn off all the segments of the
LED display when the number 0 is input to DCBA. All other numbers 1 to 9 are displayed normally.
When the switch is in the 0V position it enables the RBI feature. RBI blanks the display for the number 0. The
RBO outputs a logic 0 to signal that the display is blank.
When the switch is in the +5V position it disables the RBI feature. DCBA controls the display. The number 0 is
displayed and the RBO pin outputs a logic 1.
It allows a user to blank leading 0’s when many displays are link together to make up multiple digit numbers.

Encoders:
An encoder has a number of input lines, only one of which is activated at a given time, and produces an N-bit output
code, depending on which input is activated.
A0 O0
A1 O1 N-bit
M inputs output
(Only one HIGH A2 Encoder O2
code
at a time) - -
- -
AM-1 ON-1
Fig.: General encoder diagram.
Figure shows the general block diagram for an encoder with M inputs and N outputs. The N output lines generate the
binary code for the possible 2N or fewer input lines.

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O0 (LSB)
Inputs Outputs
A0 A1 A2 A3 A4 A5 A6 A7 O2 O1 O 0
A0
x 1 1 1 1 1 1 1 0 0 0
A1
O1 x 0 1 1 1 1 1 1 0 0 1
A2 x 1 0 1 1 1 1 1 0 1 0
A3 x 1 1 0 1 1 1 1 0 1 1
A4 x 1 1 1 0 1 1 1 1 0 0
O2 (MSB) x 1 1 1 1 0 1 1 1 0 1
A5 x 1 1 1 1 1 0 1 1 1 0
A6 x 1 1 1 1 1 1 0 1 1 1
A7
Fig.: 8-line-to-3-line encoder – logic circuit and truth table.
Figure shows the logic circuit and the truth table for an octal-to-binary encoder, also referred to as 8-line-to-3-line
encoder, with active LOW inputs. Such an encoder would have eight input lines, each representing an octal digit, and
three output lines representing the three-bit binary equivalent.
A0 is not connected to the logic gates because the encoder outputs will normally be at 000 when none of the inputs
A1 to A7 is LOW.
A LOW at any single input will produce the output binary code corresponding to that input. For instance, a LOW at
A3 will produce O2=0, O1=1 and O0=1, which is the binary code for 3.

Priority Encoders:
In priority encoder, a priority is assigned to each input so that, when more than one input is simultaneously active, the
input with the highest priority is encoded.
For example, in the octal-to-binary priority encoder, when both A3 and A5 are LOW, the output code will be 101 (5).
Similarly, when A6 , A2 and A0 are all LOW, the output code is 110 (6).

A1
A2 MSB
O3
A3 74147
Nine Decimal- O2
A to-BCD
inputs 4
A5 priority
encoder
O1
A6
O0
A7
Inverted
A8 BCD
A9
Fig.: 74147 decimal-to-BCD priority encoder.

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A1 A2 A3 A4 A5 A6 A7 A8 A9 O3 O2 O1 O0
1 1 1 1 1 1 1 1 1 1 1 1 1
x x x x x x x x 0 0 1 1 0
x x x x x x x 0 1 0 1 1 1
x x x x x x 0 1 1 1 0 0 0
x x x x x 0 1 1 1 1 0 0 1
x x x x 0 1 1 1 1 1 0 1 0
x x x 0 1 1 1 1 1 1 0 1 1
x x 0 1 1 1 1 1 1 1 1 0 0
x 0 1 1 1 1 1 1 1 1 1 0 1
0 1 1 1 1 1 1 1 1 1 1 1 0
Figure shows the logic symbol and the truth table for the 74147, which functions as a decimal-to-BCD priority
encoder. It has nine active LOW inputs representing the decimal digits 1 through 9, and it produces the inverted BCD
code corresponding to the highest-numbered activated input.
When all inputs are in their inactive HIGH state, the outputs are 1111, which is the inverse of 0000, the BCD code for
0. A LOW at A9 , regardless of the states of the other inputs, will produce an output code of 0110, which is the
inverse of 1001, the BCD code for 9. A LOW at A8 , provided that A9 is HIGH, will produce an output code of 0111,
the inverse of 1000, the BCD code for 8.
In a similar manner, a LOW at any input, provided that all higher-numbered inputs are HIGH, will produce the inverse
of the BCD code for that input.
There is no A0 input, since the encoder assumes the decimal 0 input state when all other inputs are HIGH.
[Ref.: Digital Systems Principles and Applications, R.J. Tocci and N.S. Widmer]

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