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Class Notes Digital Lec08

Class Notes Digital Lec08

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Published by: Sazzad Hossain Lemon on Mar 21, 2011
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July 04, 2010
`~ivjvcbx twc,G,we,G·, 9661920-73/4980
 
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Telephone :PABX : 9661920-73/4980
DEPT. OF APPLIED PHYSICS, ELECTRONICS &COMMUNICATION ENGINEERING
UNIVERSITY OF DHAKA
 
DHAKA-1000, BANGLADESHFAX: 880-2-8615583E-MAIL: APECE@
univdhaka.edu
 
Ref. No............................ Dated, the………………………….
In case of any query or suggestion please contact Sazzad, Lecturer, APECE, DU (url: sazzadmsi.webs.com)
Decoders:
 A decoder is a logic circuit that accepts a set of inputs that represents a binary number and activates only the outputthat corresponds to that input number.Fig.: General decoder diagram.The diagram for a general decoder with N inputs and M outputs is shown in the figure. Since each of the N inputs canbe 0 or 1, there are 2
N
possible input combinations or codes. For each of these input combinations only one of the Moutputs will be active, all other outputs remain inactive.Some decoders do not utilize all of the 2
N
possible input codes but only certain ones. Decoders of this type are oftendesigned so that if any of the unused codes are applied to the input, none of the outputs will be activated.Input OutputC B A O
7
O
6
O
5
O
4
O
3
O
2
O
1
O
0
0 0 0 0 0 0 0 0 0 0 10 0 1 0 0 0 0 0 0 1 00 1 0 0 0 0 0 0 1 0 00 1 1 0 0 0 0 1 0 0 01 0 0 0 0 0 1 0 0 0 01 0 1 0 0 1 0 0 0 0 01 1 0 0 1 0 0 0 0 0 01 1 1 1 0 0 0 0 0 0 0Fig.: 3-line-to-8-line decoder – logic circuit and truth table.Figure shows the circuitry for a decoder with three inputs and 2
3
=8 outputs. For a given input code, the only outputthat is active is the one corresponding to the decimal equivalent of the binary input code. For example, output O
6
 goes HIGH only when CBA=110
2
=6
10
.This decoder can be referred to as –(I) 3-line-to-8-line decoder – because it has three input lines and eight output lines.
Decoder A
0
A
1
A
2
A
N-1
--
 
O
0
O
1
O
2
O
M-1
--
 
N inputs(2
N
input codes)M inputs(Only one output is highfor each input codes)01234567 A (LSB)
 
B
 
C (MSB)
 
O
0
=
AB
 O
1
=
AB
 O
2
=
AB
 O
3
=
BA
 O
4
=
AB
 O
5
=
AB
 O
6
=
ACB
 O
7
=
CBA
 Lec-08, Pg-01
 
July 04, 2010
`~ivjvcbx twc,G,we,G·, 9661920-73/4980
 
dwjZ c`v_© weÁvb, B‡jKUªwb· 
I
 KwgDwb‡Kkb BwÄwbqvwis wefvM 
XvKv wek¦we`¨vjq 
XvKv-1000, evsjv‡`k 
 
Telephone :PABX : 9661920-73/4980
DEPT. OF APPLIED PHYSICS, ELECTRONICS &COMMUNICATION ENGINEERING
UNIVERSITY OF DHAKA
 
DHAKA-1000, BANGLADESHFAX: 880-2-8615583E-MAIL: APECE@
univdhaka.edu
 
Ref. No............................ Dated, the………………………….
In case of any query or suggestion please contact Sazzad, Lecturer, APECE, DU (url: sazzadmsi.webs.com)
(II) binary-to-octal decoder/converter – because it takes a three-bit binary input code and activates one of theeight outputs corresponding to that code.(III) 1-of-8 decoder – because only 1 of the 8 outputs is activated at one time.Decoders are used whenever an output or a group of outputs is to be activated only on the occurrence of a specificcombination of input levels. When decoder inputs come from a counter that is being continually pulsed, the decoder outputs will be activated sequentially, and they can be used as timing or sequencing signals to turn devices on or off at specific times.Decoders are widely used in the memory system of a computer where they respond to the address code generatedby the central processor to activate a particular memory location.
74138 Decoder IC:
 
1
 
2
 E
3
Outputs0 0 1 Respond to the input A
2
A
1
A
0
1 x x Disable all HIGHx 1 x Disable all HIGHx x 0 Disable all HIGHFig.: 74138 decoder – logic diagram, truth table and logic symbol.Figure shows the logic diagram for the 74138 decoder. It has NAND gate outputs, so that its outputs are active-LOW.The input code is applied at A
2
, A
1
and A
0
, where A
2
is the MSB. With three inputs and eight outputs, this is a 3-to-8decoder or, equivalently, a 1-of-8 decoder.Inputs
1
,
2
and E
3
are separate enable inputs that are combined in the AND gate and the AND gate output isconnected to a fourth input of each gate. In order to enable the output NAND gates to respond to the input code atA
2
A
1
A
0
, this AND gate output must be HIGH. This will occur only when
0
21
==
and E
3
=1. If one or more of the
01234567 A
2
(MSB)A
1
A
0
1
 
0
O
 
1
O
 
2
O
 
3
O
 
O
 
5
O
 
6
O
 
7
O
 
2
 
E
3
A
2
A
1
A
0
Selectcode
 
74ALS138decoder/DEMUX
 
Data input, I
1
 
2
 
+ 5V
7
O
 
6
O
 
5
O
 
O
 
3
O
 
2
O
 
1
O
 
0
O
 
Lec-08, Pg-02
 
July 04, 2010
`~ivjvcbx twc,G,we,G·, 9661920-73/4980
 
dwjZ c`v_© weÁvb, B‡jKUªwb· 
I
 KwgDwb‡Kkb BwÄwbqvwis wefvM 
XvKv wek¦we`¨vjq 
XvKv-1000, evsjv‡`k 
 
Telephone :PABX : 9661920-73/4980
DEPT. OF APPLIED PHYSICS, ELECTRONICS &COMMUNICATION ENGINEERING
UNIVERSITY OF DHAKA
 
DHAKA-1000, BANGLADESHFAX: 880-2-8615583E-MAIL: APECE@
univdhaka.edu
 
Ref. No............................ Dated, the………………………….
In case of any query or suggestion please contact Sazzad, Lecturer, APECE, DU (url: sazzadmsi.webs.com)
enable inputs is in its inactive state, the AND output will be LOW, which will force all NAND outputs to their inactiveHIGH state regardless of the input code.
BCD-to-Decimal Decoders:
 Fig.: 7442 BCD-to-decimal decoder – logic diagram, logic symbol and truth table.Figure shows the logic diagram, logic symbol and truth table for a 7442 BCD-to-decimal decoder.Each output goes LOW only when its corresponding BCD input is applied. For example,
5
O
will go LOW only wheninputs DCBA=0101;
8
O
will go LOW only when DCBA=1000.For input combinations that are invalid for BCD, none of the outputs will be activated.This decoder can also be referred to as a 4-to-10 decoder or a 1-of-10 decoder.InputsD C B A Active OutputL L L L
0
O
 L L L H
1
O
 L L H L
2
O
 L L H H
3
O
 L H L L
4
O
 L H L H
5
O
 L H H L
6
O
 L H H H
7
O
 H L L L
8
O
 H L L H
9
O
 H L H L NoneH L H H NoneH H L L NoneH H L H NoneH H H L NoneH H H H None
01234567 D (MSB)C
 
B
 
0
O
 
1
O
 
2
O
 
3
O
 
O
 
5
O
 
6
O
 
7
O
 
A
 
8
8
O
 
9
9
O
 
BCDinputcodeD
 
C
 
B
 
74421-of-10 decoder 
 
7
O
 
6
O
 
5
O
 
O
 
3
O
 
2
O
 
1
O
 
A
 
0
O
 
8
O
 
9
O
 
Lec-08, Pg-03

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