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Class Notes Digital Lec10

Class Notes Digital Lec10

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Published by: Sazzad Hossain Lemon on Mar 21, 2011
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03/21/2011

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July 11, 2010
`~ivjvcbx twc,G,we,G·, 9661920-73/4980
 
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XvKv wek¦we`¨vjq 
XvKv-1000, evsjv‡`k 
 
Telephone :PABX : 9661920-73/4980
DEPT. OF APPLIED PHYSICS, ELECTRONICS &COMMUNICATION ENGINEERING
UNIVERSITY OF DHAKA
 
DHAKA-1000, BANGLADESHFAX: 880-2-8615583E-MAIL: APECE@
univdhaka.edu
 
Ref. No............................ Dated, the………………………….
In case of any query or suggestion please contact Sazzad, Lecturer, APECE, DU (url: sazzadmsi.webs.com)
Mask-Programmed ROM:
 The mask-programmed ROM has its storage locations written into by the manufacturer according to the customer’sspecifications. It cannot be reprogrammed in the event of a design change requiring a modification of the stored data.The ROM would have to be replaced by a new one with the desired data written into it.Fig.: Structure of a MOS MROM.Figure shows the structure of a small MOS MROM. It consists of 16 memory cells arranged in four rows of four cells.Each cell is an N-channel MOSFET transistor connected in the common-drain configuration. Each row of cellsconstitutes a four-bit register.Any transistor that has a connection from the source to the output column line can switch V
dd
onto the column,making it a HIGH logic level, representing a data 1. If the source connection is absent then V
dd
is not connected tothe column line, the output will be held at a LOW logic level by the pull-down resistor, representing a data 0. Thecondition of each source connection is controlled during production by the photographic mask based on thecustomer-supplied data.The 1-of-4 decoder is used to decode the address inputs A
1
A
0
to select which row/register is to have its data read.The decoder’s active-HIGH outputs provide the ROW enable lines that are the gate inputs for the various rows of cells. If the decoder’s enable input,
EN 
, is held HIGH, all of the decoder outputs will be in their inactive LOW state,and all of the transistors in the array will be off because of the absence of any gate voltage. For this situation, thedata outputs will all be in the LOW state.
1-of-4decoder 0123A
1
A
0
EN 
 
Row 0
 
Row 1
 
Row 2
 
Row 3
 
Q
0
Q
4
Q
8
Q
12
Q
1
Q
5
Q
9
Q
13
Q
2
Q
6
Q
10
Q
14
Q
3
Q
7
Q
11
Q
15
Q
3
Q
2
Q
1
Q
0
+V
dd
Address DataA
1
A
0
D
3
D
2
D
1
D
0
0 0 1 0 1 00 1 1 0 0 11 0 1 1 1 01 1 0 1 1 1Lec-10, Pg-01
 
July 11, 2010
`~ivjvcbx twc,G,we,G·, 9661920-73/4980
 
dwjZ c`v_© weÁvb, B‡jKUªwb· 
I
 KwgDwb‡Kkb BwÄwbqvwis wefvM 
XvKv wek¦we`¨vjq 
XvKv-1000, evsjv‡`k 
 
Telephone :PABX : 9661920-73/4980
DEPT. OF APPLIED PHYSICS, ELECTRONICS &COMMUNICATION ENGINEERING
UNIVERSITY OF DHAKA
 
DHAKA-1000, BANGLADESHFAX: 880-2-8615583E-MAIL: APECE@
univdhaka.edu
 
Ref. No............................ Dated, the………………………….
In case of any query or suggestion please contact Sazzad, Lecturer, APECE, DU (url: sazzadmsi.webs.com)
When
EN 
is in its active LOW state, the conditions at the address inputs determine which row/register will beenabled so that its data can be read at the data outputs.For example, to read ROW 0, the A
1
A
0
inputs are set to 00. This places HIGH at the ROW 0 lines, all other row linesare at 0V. This HIGH at ROW 0 turns on transistors Q
0
, Q
1
, Q
2
and Q
3
. With all of the transistors in the rowconducting, V
dd
will be switched on to each transistor’s source lead. Outputs D
3
and D
1
will go HIGH, since Q
0
and Q
2
 are connected to their respective columns. D
2
and D
0
will remain LOW because there is no path from the Q
1
and Q
3
 source leads to their columns.In a similar manner, application of the other address codes will produce data outputs from the corresponding register.
Programmable ROMs:
 A mask-programmable ROM is very expensive and would not used except in high-volume applications, where thecost would be spread out over many units. For lower-volume applications, fusible-link PROMs are used. These areuser-programmable, that is, they are not programmed during the manufacturing process but are custom-programmedby the user. Once programmed, however, it cannot be erased and reprogrammed.In a PROM each of the connections from the MOSFET source lead to the output column is made with a thin fuse linkthat comes intact from the manufacturer. The user can selectively blow any of these fuse links to produce the desiredstored memory data.A data value is programmed or burned-into an address location by –(I) applying the address to the address inputs,(II) placing the desired data at the data pins and then(III) applying V
PP
, a high-voltage pulse of 10-30V, to a special programming pin on the IC.Fig.: Basic memory cell of a PROM.Figure shows the programming operation in a PROM. All of the transistors in the selected row are turned on and V
PP
 is applied to their drain leads. Those columns/data lines that have a logic 0 on them will provide a high-current paththrough the fusible link, burning it open and permanently storing a logic 0.Those columns that have a logic 1 have V
PP
on one side of the fuse and V
dd
on the other side, drawing much lesscurrent and leaving the fuse intact.Once all address locations have been programmed in this manner, the data are permanently stored in the PROM andcan be read over and over again by accessing the appropriate address. The data will not change when power isremoved from the PROM chip.The process of programming a PROM and verifying that the stored data are correct is done automatically by aspecial apparatus called a PROM programmer. The data to be burned into the PROM are input to the programmer from a keyboard or from a disk drive, or they are transferred from a computer.
+V
dd
/V
pp
Q
0
Fusiblelink
 
V
dd
 “1”+V
dd
/V
pp
Q
1
Meltingfuse
 
0V“0”
 
High current
 
Row 0
 
Data lines (columns)
 
Stored data
 
Lec-10, Pg-02
 
July 11, 2010
`~ivjvcbx twc,G,we,G·, 9661920-73/4980
 
dwjZ c`v_© weÁvb, B‡jKUªwb· 
I
 KwgDwb‡Kkb BwÄwbqvwis wefvM 
XvKv wek¦we`¨vjq 
XvKv-1000, evsjv‡`k 
 
Telephone :PABX : 9661920-73/4980
DEPT. OF APPLIED PHYSICS, ELECTRONICS &COMMUNICATION ENGINEERING
UNIVERSITY OF DHAKA
 
DHAKA-1000, BANGLADESHFAX: 880-2-8615583E-MAIL: APECE@
univdhaka.edu
 
Ref. No............................ Dated, the………………………….
In case of any query or suggestion please contact Sazzad, Lecturer, APECE, DU (url: sazzadmsi.webs.com)
Erasable Programmable ROM:
 An EPROM can be programmed by the user, and it can also be erased and reprogrammed as often as desired. Onceprogrammed, the EPROM is a nonvolatile memory that will hold its stored data indefinitely.The storage cells in an EPROM are MOS transistors with a silicon gate that has no electrical connections, i.e., afloating gate. In its normal state, each transistor is off and each cell is storing a logic 1. A transistor can be turned onby the application of a high-voltage programming pulse that injects high-energy electrons into the floating-gate region.These electrons remain trapped in this region once the pulse is terminated, since there is no discharge path. Thiskeeps the transistor on permanently even when power is removed from the device, and the cell is now storing a logic0.Once an EPROM cell has been programmed, it can be erased by exposing it to UV light applied through a window onthe chip package. The UV light produces a photocurrent from the floating gate back to the silicon substrate, therebyremoving the stored charges, turning the transistor off and restoring the cell to the logic 1 state. The UV light erasesall cells at the same time so that an erased EPROM stores all 1s. Once erased, the EPROM can be reprogrammed.Fig.: Logic symbol and operating modes for 2764 EPROM.The 2764 is an 8Kx8 CMOS EPROM that operates from a single +5V power source during normal operation. It has13 address inputs since 2
13
=8192 and 8 data outputs. It has several operating modes that are controlled by thefollowing four control inputs –(I)
CE 
is the chip enable input that is used to place the device in a standby mode where its power consumptionis reduced.(II)
OE 
is the output enable and is used to control the device’s data output tristate buffers so that the devicecan be connected to a microprocessor data bus without bus contention.(III) V
PP
is the special programming voltage required during the programming process.(IV)
PGM 
is the program enable input that is activated to store data at the selected address.It has a characteristic window which allows the internal circuitry to be exposed to UV light when the complete memorycontents are to be erased. A sticker is placed over the window after erasure and reprogramming to protect againstaccidental erasure from ambient light.
EPROM8Kx827C64D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
AddressinputsControlinputsDataoutputs---+V
CC
+V
PP
A
12
A
11
A
1
A
0
OE 
 
CE 
 
PGM 
 
Inputs OutputsMode
CE 
 
OE 
 
PGM 
 V
PP
D
7
-D
0
Read 0 0 1 0-5V DATA
out
OutputDisable0 1 1 0-5V High ZStandby 1 X X X High ZProgram 0 1 0 12.75V DATA
in
PGMVerify0 0 1 12.75V DATA
out
Lec-10, Pg-03

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