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Class Notes Digital Lec17

Class Notes Digital Lec17

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Published by: Sazzad Hossain Lemon on Mar 21, 2011
Copyright:Attribution Non-commercial

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10/02/2013

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August 03, 2010
`~ivjvcbx twc,G,we,G·, 9661920-73/4980
 
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I
 KwgDwb‡Kkb BwÄwbqvwis wefvM 
XvKv wek¦we`¨vjq 
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Telephone :PABX : 9661920-73/4980
DEPT. OF APPLIED PHYSICS, ELECTRONICS &COMMUNICATION ENGINEERING
UNIVERSITY OF DHAKA
 
DHAKA-1000, BANGLADESHFAX: 880-2-8615583E-MAIL: APECE@
univdhaka.edu
 
Ref. No............................ Dated, the………………………….
In case of any query or suggestion please contact Sazzad, Lecturer, APECE, DU (url: sazzadmsi.webs.com)
[Continuation of Circuit Operations (previous lecture)]Fig.: The NAND gate in its HIGH output state.With input B is connected to ground, D
3
is forward-biased so that current will flow from the +5V source terminal,through R
1
and D
3
, and through terminal B to ground.The forward voltage across D
3
will hold point Y at approximately 0.7V. This voltage is not enough to forward-bias D
4
 and the E-B junction of Q
2
.With Q
2
off, there is no base current for Q
4
, and it turns off.Since there is no Q
2
collector current, the voltage at Q
3
’s base will be large enough to forward-bias Q
3
and D
1
, so thatQ
3
will conduct.With no load connected from point X to ground, V
OH
will be around 3.4 to 3.8V.Thus, HIGH output can be produced by connecting either or both inputs Low.
Totem-Pole Arrangement:
Transistors Q
3
and Q
4
constitute what is known as a totem-pole output arrangement. In such an arrangement, either Q
3
or Q
4
conducts at a time depending upon the logic status of the inputs. A totem-pole connection is that it offerslow-output impedance in both the HIGH and LOW output states.In the HIGH state, Q
3
acts as an emitter follower and has an output impedance of about 70. In the LOW state, Q
4
issaturated and the output impedance is approximately 10. Because of the low output impedance, any straycapacitance at the output can be charged or discharged very rapidly through this low impedance, thus allowing quicktransitions at the output from one state to the other.Again, in the logic LOW state, transistor Q
4
would need to conduct a fairly large current if its collector were tied to V
CC
 through R
4
only. With Q
3
in the circuit, there will be no current through R
4
and it will keep the circuit power dissipationdown.A disadvantage of the totem-pole output arrangement occurs during the transition from LOW to HIGH. Unfortunately,Q
4
turns off more slowly than Q
3
turns on. So there is a period of a few nanoseconds during which both transistorsare conducting and a relatively large current will be drawn from the 5V supply. So whenever a totem-pole TTL outputgoes from LOW to HIGH, a high-amplitude current spike is drawn from the V
CC
supply. The most common techniqueuses small radio-frequency capacitors connected from V
CC
to GROUND essentially to short out these high-frequencyspikes. This is called power-supply decoupling.
+5VD2D3D4+5VR31kQ4D1R4130R21.6kR14kQ3Q2
 
ONONOFFOFFOFFOFFABYXV
OH
≥2.4VLec-17, Pg-01
 
August 03, 2010
`~ivjvcbx twc,G,we,G·, 9661920-73/4980
 
dwjZ c`v_© weÁvb, B‡jKUªwb· 
I
 KwgDwb‡Kkb BwÄwbqvwis wefvM 
XvKv wek¦we`¨vjq 
XvKv-1000, evsjv‡`k 
 
Telephone :PABX : 9661920-73/4980
DEPT. OF APPLIED PHYSICS, ELECTRONICS &COMMUNICATION ENGINEERING
UNIVERSITY OF DHAKA
 
DHAKA-1000, BANGLADESHFAX: 880-2-8615583E-MAIL: APECE@
univdhaka.edu
 
Ref. No............................ Dated, the………………………….
In case of any query or suggestion please contact Sazzad, Lecturer, APECE, DU (url: sazzadmsi.webs.com)
Current-Sinking Action:
Fig.: Current sinking action of TTL NAND gate.A TTL output acts as a current sink in the LOW state in that it receives current from the input of the gate that it isdriving. Figure shows one TTL gate driving the input of another gate for LOW output voltage.Transistor Q
4
of the driving gate is on and essentially shorts point X to ground. This LOW voltage at X forward-biasesthe emitter-base junction of Q
1
, and current flows back through Q
4
.Thus, Q
4
is performing a current-sinking action that drives its current from the input current I
IL
of the load gate.Q
4
is often referred to as the current-sinking transistor or as the pull-down transistor because it brings the outputvoltage down to its LOW state.
Current-Sourcing Action:
Fig.: Current sourcing action of TTL NAND gate.
+5V+5VR14kQ1R4130D1Q4Q3
 
LOW outputOFFONONXI
IL
V
OL
Output circuit of driving gateInput circuit of load gate
+5V+5VR14kQ1R4130D1Q4Q3
 
HIGH outputONOFFOFFXI
IH
V
OH
Output circuit of driving gateInput circuit of load gateLec-17, Pg-02

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