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Table Of Contents

ISIS AND SIMULATION
ISIS AND NETWORKS
HOW TO USE THIS DOCUMENTATION
TUTORIAL
A GUIDED TOUR OF THE ISIS EDITOR
LABELLING AND MOVING PART REFERENCES
BLOCK EDITING FUNCTIONS
PRACTICE MAKES PERFECT
ANNOTATING THE DIAGRAM
The Property Assignment Tool (PAT)
The Automatic Annotator
CREATING NEW DEVICES
FINISHING TOUCHES
SAVING, PRINTING AND PLOTTING
MORE ABOUT CREATING DEVICES
Making a Multi-Element Device
The Visual Packaging Tool
Making Similar Devices
Replacing Components in a design
SYMBOLS AND THE SYMBOL LIBRARY
A LARGER DESIGN
GENERAL CONCEPTS
SCREEN LAYOUT
The Menu Bar
The Toolbars
The Editing Window
The Overview Window
The Object Selector
Co-ordinate Display
CO-ORDINATE SYSTEM
False Origin
The Dot Grid
Snapping to a Grid
Real Time Snap
FILING COMMANDS
Starting a New Design
Loading a Design
Saving the Design
Import / Export Section
Quitting ISIS
GENERAL EDITING FACILITIES
Object Placement
Tagging an Object
Deleting an Object
Dragging an Object
Dragging an Object Label
Resizing an Object
Reorienting an Object
To reorient an object:
Editing an Object
Editing an Object Label
Copying all Tagged Objects
Moving all Tagged Objects
Deleting all Tagged Objects
WIRING UP
Wire Placement
The Wire Auto-Router
Wire Repeat
Dragging Wires
THE AUTOMATIC ANNOTATOR
Value Annotation
MISCELLANEOUS
The Sheet Border
The Header Block
Send to Back / Bring to Front
GRAPHICS AND TEXT STYLES
Editing Global Styles
Editing Local Styles
Working With The Template
TEMPLATES AND THE TEMPLATE MENU
PROPERTIES
OBJECT PROPERTIES
System Properties
User Properties
Property Definitions (PROPDEFS)
SHEET PROPERTIES
Introduction
Defining Sheet Properties
Scope Rules for Sheet Properties
DESIGN PROPERTIES
PARAMETERIZED CIRCUITS
An Example
Property Substitution
Property Expression Evaluation
The Rounding Functions E12 (), E24 ()
THE PROPERTY ASSIGNMENT TOOL
The PAT Dialogue Form
PAT Actions
PAT Application Modes
The Search and Tag Commands
Examples
PROPERTY DEFINITIONS
Creating Property Definitions
Default Property Definitions
Old Designs
OBJECT SPECIFICS
COMPONENTS
Selecting Components from the Device Libraries
To select components from the device libraries:
Placing Components
Replacing Components
Editing Components
Component Properties
Hidden Power Pins
DOTS
Placing Dots
Auto Dot Placement
Auto Dot Removal
WIRE LABELS
Placing And Editing Wire Labels
Deleting Wire Labels
Using a Wire Label to Assign a Net Name
Using a Wire Label to Assign a Net Property
Wire Label Properties
SCRIPTS
Placing and Editing Scripts
Script Block Types
Part Property Assignments (*FIELD)
Sheet Global Net Property Assignments (*NETPROP)
Sheet Property Definitions (*DEFINE)
Parameter Mapping Tables (*MAP ON varname)
Model Definition Tables (*MODELS)
Named Scripts (*SCRIPT scripttype scriptname)
SPICE Model Script (*SPICE)
BUSES
Placing Buses
Bus Labels
Wire/Bus Junctions
Bus Properties
SUB-CIRCUITS
Placing Sub-Circuits
Editing Sub-Circuits
Sub-Circuit Properties
TERMINALS
Logical Terminals
Physical Terminals
Placing Terminals
Editing Terminals
Terminal Properties
PIN OBJECTS
Placing Pin Objects
Editing Pin Objects
Pin Object Properties
SIMULATOR GADGETS
2D GRAPHICS
Placing 2D Graphics
Resizing 2D Graphics
Editing 2D Graphics
MARKERS
Marker Types
Placing Markers
LIBRARY FACILITIES
GENERAL POINTS ABOUT LIBRARIES
Library Discipline
The Pick Command
SYMBOL LIBRARIES
Graphics Symbols
User Defined Terminals
User Defined Module Ports
User Defined Device Pins
Editing an Existing Symbol
Hierarchical Symbol Definitions
DEVICE LIBRARIES
Making a Device Element
The Make Device Command
Making a Single Element Device
To make a single element device
Making a Multi-Element Homogenous Device
To make a multi-element homogenous device
Making a Multi-Element Heterogeneous Device
To make a multi-element heterogeneous device
Making a Device with Bus Pins
Property Definitions and Default Properties
Dealing with Power Pins
Editing an Existing Device
MULTI-SHEET DESIGNS
MULTI-SHEET FLAT DESIGNS
Design Menu Commands
HIERARCHICAL DESIGNS
Terminology
Sub-Circuits
Module-Components
External Modules
Moving About a Hierarchical Design
Design Global Annotation
Non-Physical Sheets
NETLIST GENERATION
NET NAMES
DUPLICATE PIN NAMES
HIDDEN POWER PINS
SPECIAL NET NAME SYNTAXES
Global Nets
Inter-Element Connections for Multi-Element Parts
BUS CONNECTIVITY RULES
The Base Alignment Rule
Using Bus Labels to Change the Connectivity Rule
Using Bus Terminals to Interconnect Buses
Connections to Individual Bits
Tapping a Large Bus
General Comment & Warning
GENERATING A NETLIST FILE
Format
Logical/Physical/Transfer
Scope
Depth
Errors
NETLIST FORMATS
BOARDMAKER
EEDESIGNER
FUTURENET
MULTIWIRE
RACAL
SPICE
SPICE-AGE FOR DOS
TANGO
VALID
VUTRAX
REPORT GENERATION
BILL OF MATERIALS
Generating the Report
Bill of Materials Configuration
ASCII DATA IMPORT
The IF...END Command
The DATA...END Command
ELECTRICAL RULES CHECK
ERC Error Messages
HARD COPY GENERATION
PRINTER OUTPUT
PLOTTER OUTPUT
Plotter Pen Colours
CLIPBOARD AND GRAPHICS FILE GENERATION
Bitmap Generation
Metafile Generation
DXF File Generation
EPS File Generation
ISIS AND ARES
PACKAGING
Default Packaging
Manual Packaging
Automatic Packaging
Using the Bill of Materials to Help with Packaging
The Package Verifier
Packaging with ARES
NET PROPERTIES AND ROUTING STRATEGIES
FORWARD ANNOTATION - ENGINEERING CHANGES
Adding New Components
Removing Existing Components
Changing the connectivity
Re-Annotating Components, and Re-Packaging Gates
PIN-SWAP/GATE-SWAP
Specifying Pin-Swaps and Gate-Swaps for ISIS Library Parts
Specifying Pin-Swaps in Single Element Devices
Specifying Pin-Swaps in Multi-Element Devices
Specifying Gate-Swaps in Multi-Element Devices
Performing Manual Pin-Swaps and Gate-Swaps in ARES
The Gate-Swap Optimizer
RE-ANNOTATION
BACK-ANNOTATION WITH ISIS
Semi-Automatic Back-Annotation
Fully-Automatic Back-Annotation
INDEX
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proteus facil y sencillito

proteus facil y sencillito

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Published by: Jhony Villacis Sanchez on Mar 25, 2011
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