Welcome to Scribd. Sign in or start your free trial to enjoy unlimited e-books, audiobooks & documents.Find out more
Download
Standard view
Full view
of .
Look up keyword or section
Like this
2Activity

Table Of Contents

1 SCOPE
1.1 Introduction and Overview
1.1.1 System Requirements
1.1.2 T-Services Consideration
1.1.3 Modular Implementation Requirements
1.1.4 Architecture
1.1.5 Synchronization Needed for T-Services Deployment
1.2 Requirements
2 REFERENCES
2.1 Normative References
2.2 Informative References
2.3 Reference Acquisition
3 TERMS AND DEFINITIONS
4 ABBREVIATIONS AND ACRONYMS
5 PHYSICAL LAYER REQUIREMENTS
5.1 Introduction
5.2 Physical Connector Description
5.3 Cable Requirements
5.4 Electrical Description
5.4.1 Impedance
5.4.2 Isolation
5.4.3 EMI Considerations
5.4.4 Signal Strength (voltage)
5.4.5 Common-mode rejection
5.4.6 Signal Description
6 DOCSIS TIMING PROTOCOL
6.1 DTI Timing Entities
6.2 DTI Timing Structure
6.3 Traceability of DOCSIS Timestamp
6.3.1 GPS Frequency Mode
6.4 DTI Frame Structure Requirements
6.4.1 Conventions for this Specification
6.4.2 SERVER TO CLIENT
Table 6–1 - DTI Server Frame Structure
6.4.3 CLIENT TO SERVER
6.5 DTI Server-Client Protocol Interaction
7 DTI CLIENT AND SERVER OPERATION
7.1 DTI Server Modes
7.1.1 Free Running Master Mode
7.1.2 External Reference Modes
7.1.3 DTI Server Functional Requirements
7.1.4 DTI Server Test Signal Mode
7.2 DTI Client Operation23
7.2.1 DTI Normal operating conditions
7.2.2 DTI Client Operational Modes
7.2.3 DTI Client Mode Transition Diagram
7.2.4 Functional Requirements
7.2.5 DTI Client Port
7.2.6 DTI Client Test Port
Table 7–4 - DTI Client Test Port
7.2.7 DTI Client Test Port Clock
7.2.8 Alternative EQAM DTI Testing
7.2.9 DTI Status LEDs
7.3 DTI Distribution Fallback Strategies
Annex A Ranging Wander Qualification Filter
A.1 Chip Timing Jitter for Synchronous Operation
Figure A–1 - Current non-modular CMTS implementation
Appendix I DTI Server Functional Description
I.1 Server DTI Signal Processing
Appendix II DTI Client Functional Description
II.1 DTI Client PHY
II.2 DTI Client Frame Processor
II.3 DTI Client Clock Processor
Appendix III DTI Jitter Budget
III.1 Model Description
III.2 Analysis
III.2.1 Transmit Jitter Specification
III.2.2 Receive Jitter Analysis
III.2.3 Receive Frame Jitter Analysis
III.2.4 10.24 MHz Output Jitter
Appendix IV Symbol Clock Synchronization
Appendix V DTI High Speed Clock Considerations
Figure V–2 - Phase Measurement Dither Pattern 191 ps Offset
VI.1 Example Issues
VI.2 Solution
Appendix VII Acknowledgements (Informative)
Appendix VIII Revision History (Informative)
VIII.1 Engineering Changes for CM-SP-DTI-I02-051209
VIII.2 Engineering Changes for CM-SP-DTI-I03-060728
VIII.3 Engineering Changes for CM-SP-DTI-I04-061222
0 of .
Results for:
No results containing your search query
P. 1
CM-SP-DTI-I04-061222

CM-SP-DTI-I04-061222

Ratings:
(0)
|Views: 272|Likes:
Published by mprakas

More info:

Published by: mprakas on Apr 08, 2011
Copyright:Attribution Non-commercial

Availability:

Read on Scribd mobile: iPhone, iPad and Android.
download as PDF, TXT or read online from Scribd
See more
See less

04/08/2011

pdf

text

original

You're Reading a Free Preview
Pages 4 to 25 are not shown in this preview.
You're Reading a Free Preview
Pages 29 to 73 are not shown in this preview.

You're Reading a Free Preview

Download
scribd
/*********** DO NOT ALTER ANYTHING BELOW THIS LINE ! ************/ var s_code=s.t();if(s_code)document.write(s_code)//-->