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ALU 07

ALU 07

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Published by Aritra Bhuto

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Published by: Aritra Bhuto on Apr 13, 2011
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04/12/2013

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PROJECT REPORT ON
Arithmetic Logic Unit  
DESIGN AND IMPLEMENTATION OF 32-BIT ALU ON XILINX FPGAUSING VHDL
Submitted by
ARITRA RANJAN PALSHREYASI KOLEY ANINDITA PAULINDRANI DEY TANAYA DAS
in partial fulfillment for the award of the degree
B.TECH IN ELECTRONICS & COMMUNICATION
 from
SEACOM ENGINEERING COLLEGE
Year of Submission: 2010
PROJECT MENTOR:
RAJ MOHAN DEY SARKAR
 
 Ack 
nowledgement:
It gives me great pleasure to find an opportunity to express my deep gratitude and sincerest thanks to my projectmentor,
Mr. Raj Mohan De Sarkar
at
 Ardent Collaboration Salt lake
of
Kolkata
for giving most valuablesuggestion, helpful guidance and encouragement in the execution of this project. His guidance andencouragement has led to the successful completion of my project titled:-
³DESIGN AND IMPLEMENTATIONOF 32-BIT ALU ON XILINX FPGA USING VHDL´.
We are highly indebted to him for the way he modeledand structured our work with his valuable tips and suggestions that he accorded to us in every respect of ourwork.Last but not the least I humbly extend my sense of gratitude to other faculty member and staffs of the institutefor providing me their valuable help and time with a congenial working environment.
 
 
 Abs
tra
t:
T
he aim of the project was to make a 32-bit Arithmetic and Logical Unit, using VHDL module in Xilinx I.S.E.8.2i. here we have tried to design and implement the 32-bit A.L.U. by behavioral programming method inVHDL module. We have used various techniques as per our knowledge, we have used various logic gates,arithmetic circuits using logic gates and using them we have prepared the arithmetic unit and the logicalunit of the A.L.U...
T
hen using multiplexers we have combined them and organized the A.L.U. structure. Inthis report we have shown various diagrams to show the structures of the A.L.U. and also the basicstructures which constitutes the A.L.U. as a proof that the output is as per expected one can check theoutput waveforms of the different blocks with their respective theoretical values and truth tables.
roje
t Category:
V.L.S.I. chip design using A.S.I.C. and F.P.G.A. procedure.A.S.I.C. (Application Specific Integrated Circuit) is an integrated circuit designing method for integratedchip and circuit boards. But in this method designing can be done for one purpose only, it can·t bemodified. Circuit diagrams were previously used to specify the configuration, as they were for ASICs, butthis is increasingly rare.F.P.G.A. (Field-Programmable Gate Array) is an integrated circuit designed to be configured by thecustomer or designer after manufacturing³hence "field-programmable".
T
he FPGA configuration isgenerally specified using a hardware description language (HDL), similar to that used for an application-specific integrated circuit (ASIC). FPGAs can be used to implement any logical function that an ASIC couldperform.
T
he ability to update the functionality after shipping, partial re-configuration of the portion ofthe design and the low non-recurring engineering costs relative to an ASIC design offer advantages formany applications.
O
b
 je
tive
s
:
T
he objective of the project was to make a 32-bit Arithmetic and Logic Unit using V.H.D.L. module in XilinxI.S.E. 8.2i. this report shows explicit details of Xilinx, Spartan 3E starter kit board, F.P.G.A., V.H.D.L., theprogram coding of the A.L.U. blocks and its basic blocks are also given in this report. Diagrammaticrepresentation of the block diagrams and the gates and the circuits as well as the waveforms of each andevery design is also supplied so that one can easily understand and check whether the output is correct ornot.

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