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(ISSN 1933–9631) is a publication o AldrichChemical Co., Inc. Aldrich is a member o the Sigma-AldrichGroup. © 2011 Sigma-Aldrich Co.
Vol. 6, No. 1
Welcome to the irst 2011 issue o
Methodsfor Nanopatterning and Lithography
. This issue describes a number o methods used to create patterned material eatures on the nanoscale,which are crucial in the generation o electronic devices. There area variety o techniques or abricating on sub-micron-length scales,spanning rom sophisticated, top-down lithographic methods that havetheir origins in the electronics industry to more recent advancementsincorporating bottom-up approaches that rely on sel-organization. Fornanopatterning, several approaches o both types have been proposedand well-demonstrated. The vast majority o electronic devices today are abricated using top-down photolithographic techniques that rely on sophisticated, cutting-edge instrumentationand tailored materials. For example, a typical integrated circuit consists o various patternedthin ilms o metals, dielectrics and semiconductors on substrates including silicon, galliumarsenide, or germanium. Such a device is generally abricated by lithography, whereradiation-sensitive polymeric materials called resists are used to produce desired circuitpatterns in the substrates. However, the search still continues or non-photolithographicmethods, which could provide technologically simpler and more cost-eectivenanoabrication strategies. Such methods, some o which are described in this issue, includenano-imprint lithography (including micro-contact printing, mold-assisted lithography,and hot embossing lithography), near-ield optical lithography, direct patterning on thenanometer scale using scanning-probe microscopes or inkjet printing systems, sel-assemblyo monolayers, etc.Some o these approaches are better suited or producing individual nano-structures or theinvestigation o nanometer-scale devices; the throughput is likely to remain impracticablylow or commercial application. Others, such as nanoimprint lithography, have the potentialo high throughput due to parallel processing, less sophisticated tools, and nanoscalereplication or applications such as data storage. Some new developments, includinga number o key enabling materials designed to relieve some o the high-resolutionchallenges, are presented in this issue. The issue begins with an article by researchers at the IBM Almaden Research Center(San Jose, Caliornia) who utilize luorinated methacrylate polymers as high-static, highlysoluble photoresists or 193 nm lithography. In the ollowing article, researchers at theFraunhoer Institute and Chemnitz University o Technology, Germany, describe the versatilityo inkjet printing technology in the direct-write abrication o electronic structures on avariety o rigid and lexible substrates. Proessor Rahman and his colleagues (University o Glasgow, UK) show the use o conductive polymers as charge dissipation layers or state-o-the-art high resolution patterning techniques, including electron-beam lithography. The inalarticle by Proessor Graham Leggett shows an elegant, combined bottom-up and top-downphotochemical approach using alkylphosphonic acid monolayers. Patterns are created on themonolayer by either (i) applying a mask and subsequent exposure to UV light or (ii) couplinga scanning near-ield optical microscope with a UV laser to obtain <10 nm resolution.Each article in this issue is accompanied by a list o materials available rom Aldrich® MaterialsScience. Please contact us at
i you need any material that you cannot indin our catalog, or would like a custom grade or your development work. We welcome yournew product requests and suggestions as we continue to grow our lithography/patterningmaterial oer.
About Our Cover
The abrication and testing o most electronic semiconductor-based devices is currentlycarried out in commercialized, expansive acilities employing highly automatedphotolithographic techniques where eatures down to 45 nm and beyond are notuncommon. This top-down approach in creating integrated circuits using ilters and photomasks is considered standard practice; however, bottom-up sel-assembly approaches thatcan urther miniaturize eatures below 10 nm are now being included. The basic concept o using UV light and a mask to transcribe eatures onto an electronic substrate, such as singlecrystal silicon, is shown.
Kaushik Patel, Ph.D.Materials ScienceSigma-Aldrich Corporation