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Intel(R) Architecture Software Developer's Manual, Volume 2: Instruction Set Reference Manual

Intel(R) Architecture Software Developer's Manual, Volume 2: Instruction Set Reference Manual

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Published by Setyo Nugroho
Intel(R) Architecture Software Developer's Manual, Volume 2: Instruction Set Reference Manual
This manual describes the instruction set and the opcode structure, including the new Intel MMX™ technology instruction set, for Intel Architecture processors, including the Intel 286, Intel386™, Intel486™, Pentium® processors, Pentium Pro processors and Pentium® II processors. The target audience is application programmers writing programs to run under existing operating systems or executives.

The Pentium processor, Pentium Pro processors and Pentium II processors may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Such errata are not covered by Intel's warranty. Current characterized errata are available on request. For the latest Specification Updates containing this information, contact the Intel Literature Center at 800-548-4725 in the U.S and ask for the Pentium® Processor Specification Update (Order Number 242480), Pentium® Pro Processor Specification Update (Order Number 242689) or the Pentium® II Processor Specification Update (Order Number 243337). In other geographies, please contact your local sales office.

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24319101.pdf
6773008 bytes
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http://download.intel.com/design/intarch/manuals/24319101.pdf
Intel(R) Architecture Software Developer's Manual, Volume 2: Instruction Set Reference Manual
This manual describes the instruction set and the opcode structure, including the new Intel MMX™ technology instruction set, for Intel Architecture processors, including the Intel 286, Intel386™, Intel486™, Pentium® processors, Pentium Pro processors and Pentium® II processors. The target audience is application programmers writing programs to run under existing operating systems or executives.

The Pentium processor, Pentium Pro processors and Pentium II processors may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Such errata are not covered by Intel's warranty. Current characterized errata are available on request. For the latest Specification Updates containing this information, contact the Intel Literature Center at 800-548-4725 in the U.S and ask for the Pentium® Processor Specification Update (Order Number 242480), Pentium® Pro Processor Specification Update (Order Number 242689) or the Pentium® II Processor Specification Update (Order Number 243337). In other geographies, please contact your local sales office.

File Name/Size:
24319101.pdf
6773008 bytes
From
http://download.intel.com/design/intarch/manuals/24319101.pdf

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Published by: Setyo Nugroho on Sep 05, 2008
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Intel Architecture
Software Developer’sManual
Volume 2:Instruction Set Reference
NOTE
: The
 Intel Architecture Software Developer’s Manual
consists of three volumes:
 Basic Architecture
, Order Number 243190;
Instruction Set  Reference,
Order Number 243191; and the
System Programming Guide,
Order Number 243192.Please refer to all three volumes when evaluating your design needs.
1999
 
Information in this document is provided in connection with Intel products. No license, express or implied, by estoppelor otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms andConditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or impliedwarranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particularpurpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products arenot intended for use in medical, life saving, or life sustaining applications.Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or“undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts orincompatibilities arising from future changes to them.Intel’s Intel Architecture processors (e.g., Pentium®, Pentium® II, Pentium® III, and Pentium® Pro processors) maycontain design defects or errors known as errata which may cause the product to deviate from publishedspecifications. Current characterized errata are available on request.Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing yourproduct order.Copies of documents which have an ordering number and are referenced in this document, or other Intel literature,may be obtained by calling 1-800-548-4725, or by visiting Intel's literature center at http://www.intel.com.
COPYRIGHT © INTEL CORPORATION 1999*THIRD-PARTY BRANDS AND NAMES ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS.
 
iii
TABLE OF CONTENTS
CHAPTER 1ABOUT THIS MANUAL
1.1.OVERVIEW OF THE
INTEL ARCHITECTURE SOFTWARE DEVELOPER’S MANUAL,VOLUME 2 
: INSTRUCTION SET REFERENCE 1-11.2.OVERVIEW OF THE
INTEL ARCHITECTURE SOFTWARE DEVELOPER’S MANUAL,VOLUME 1
: BASIC ARCHITECTURE 1-21.3.OVERVIEW OF THE
INTEL ARCHITECTURE SOFTWARE DEVELOPER’S MANUAL,VOLUME 3 
: SYSTEM PROGRAMMING GUIDE 1-31.4.NOTATIONAL CONVENTIONS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-51.4.1.Bit and Byte Order. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-51.4.2.Reserved Bits and Software Compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-61.4.3.Instruction Operands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-71.4.4.Hexadecimal and Binary Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-71.4.5.Segmented Addressing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-71.4.6.Exceptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-81.5.RELATED LITERATURE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-9
CHAPTER 2INSTRUCTION FORMAT
2.1.GENERAL INSTRUCTION FORMAT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12.2.INSTRUCTION PREFIXES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12.3.OPCODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22.4.MODR/M AND SIB BYTES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22.5.DISPLACEMENT AND IMMEDIATE BYTES. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-32.6.ADDRESSING-MODE ENCODING OF MODR/M AND SIB BYTES. . . . . . . . . . . . 2-3
CHAPTER 3INSTRUCTION SET REFERENCE
3.1.INTERPRETING THE INSTRUCTION REFERENCE PAGES . . . . . . . . . . . . . . . . 3-13.1.1.Instruction Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-13.1.1.1.Opcode Column . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-23.1.1.2.Instruction Column . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-33.1.1.3.Description Column . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-53.1.1.4.Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-53.1.2.Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-63.1.3.Intel C/C++ Compiler Intrinsics Equivalent . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-93.1.3.1.The Intrinsics API . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-93.1.3.2.
MMX™ Technology Intrinsics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-103.1.3.3.SIMD Floating-Point Intrinsics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-103.1.4.Flags Affected . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-113.1.5.FPU Flags Affected. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-123.1.6.Protected Mode Exceptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-123.1.7.Real-Address Mode Exceptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-123.1.8.Virtual-8086 Mode Exceptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-133.1.9.Floating-Point Exceptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-143.1.10.SIMD Floating-Point Exceptions - Streaming SIMD Extensions Only. . . . . . . . .3-14

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