Objective:

An entry level engineering position in electrical industry to fully utilize my k

nowledge and experience on ASIC/FPGA design
Education:
Polytechnic Institute of New York University, Brooklyn, NY M. S. Computer Engin
eering GPA: 3.8/4.0
East China Normal University, Shanghai, China B.S. of Microelectronics Cla
ss Rank: 5/55
Related courses:
VLSI System and Architecture Design High Performance Switches & Routers Compute
r Architecture II
Advanced Computer Hardware Design Physics of semiconductor Analog Amplifier
Design
Skills:
Programming: C, Assembly, VHDL, Verilog, Verilog-A Operating System: Windows
, Linux
Tools: Cadence, SOC Encounter, RTL compiler, Modelsim, HSpice, Xilinx ISE, MS o
ffice
Projects:
Memristor thermal sensor design Jan 2010 till now
Studying conceptual model of memristor, reading relevant papers and writing Ver
ilog-A model
Applying temperature compensation techniques and low power design consideration
Schematics and layout design, Spice model simulation and performance evaluation
NOC VHDL design Jan 2009 ~ Jan 2010
NOC topology studying, AMBA bus protocol studying and wormhole flow control stu
dying
Writing functional block specifications, VHDL coding and RTL simulation
Functional and timing verification, power consumption and timing analysis
Hash function VHDL implementation Jan 2009 ~ May 2009
SandStorm Hash function studying, design division and algorithm level verificat
ion
VHDL coding, RTL simulation, synthesis, place and route, performance evaluation
FPGA on-board implementation, on-chip testing and verification
32-bit ALU implementation Oct 2008 ~ Jan 2009
Design division, schematics and layout design, Spice model simulation, DRC and
LVS
Pre- and post- layout verification, and the chip is taped out with MOSIS CMOS 0
.25um
RC5 encryption/decryption implementation Oct 2008 ~ Dec 2008
RC5 function studying, design division, VHDL coding and RTL simulation
Functional and timing verification, performance evaluation, and FPGA on-board i
mplementation
Experiences:
Research Assistant Polytechnic Institute of NYU, Brooklyn, NY Jan 2009 til
l now
Presentation and group discussion in weekly meeting, technical report writing a
nd participating DAC paper competition
Teaching Assistant: Polytechnic Institute of NYU, Brooklyn, NY Jan 2010 ~ M
ay 2010
Lab Assistant: Polytechnic Institute of NYU, Brooklyn, NY Sep 2009 ~ May
2010
Honors:
Polytechnic institute of NYU Graduate Center Scholarship 2 years (Fall 200
8 ~ Spring 2010)
East China Normal University Outstanding Student Award 4 years (Fall 2004
~ Spring 2008)