SERVICE MANUAL MODEL : LAC-M8410

CD/MP3/WMA Player Receiver Car Stereo

SERVICE MANUAL
CAUTION
BEFORE SERVICING THE UNIT, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

MODEL : LAC-M8410

[CONTENTS]

SECTION 1. SUMMARY

SERVICING PRECAUTIONS .......................................................................................................... 1-2 ESD PRECAUTIONS....................................................................................................................... 1-3 SPECIFICATIONS ........................................................................................................................... 1-4

SECTION 2. ELECTRICAL

ELECTRICAL TROUBLESHOOTING GUIDE ................................................................................. 2-1 CD PART TROUBLESHOOTING GUIDE........................................................................................ 2-3 WAVEFORMS OF MAJOR CHECK POINT .................................................................................. 2-12 INTERNAL BLOCK DIAGRAM of ICs ............................................................................................ 2-14 BLOCK DIAGRAM ......................................................................................................................... 2-35 - MAIN SCHEMATIC DIAGRAM ................................................................................................... 2-37 - FRONT SCHEMATIC DIAGRAM ............................................................................................... 2-39 - CDP SCHEMATIC DIAGRAM .................................................................................................... 2-41 - H/F & MOTOR SCHEMATIC DIAGRAM ................................................................................... 2-43 PRINTED CIRCUIT DIAGRAM ...................................................................................................... 2-45

SECTION 3. CABINET MAIN CHASSIS & MECHANISM

EXPLODED VIEW ........................................................................................................................... 3-1 Accessory part ................................................................................................................................. 3-5

SECTION 4. REPLACEMENT PARTS LIST.................................................................... 4-1

- 1-1 -

SECTION 1. SUMMARY
SERVICING PRECAUTIONS
Always disconnect the power source before:
1) Removing or reinstalling any component, circuit board, module or any other instrument assembly. 2) Disconnecting or reconnecting any instrument electrical plug or other electrical connection. 3) Connecting a test substitute in parallel with an electrolytic capacitor in the instrument. CAUTION: A wrong part substitution or incorrect polarity installation of electrolytic capacitors may result in an explosion hazard.

Do not defeat any plug/socket B+ voltage interlocks with which instruments covered by this service
manual might be equipped.

Do not apply power to this instrument and or any of its electrical assemblies unless all solid-state
device heat sinks are correctly installed.

Always connect a test instruments ground lead to the instrument chassis ground before
connecting the test instrument positive lead. Always remove the test instrument ground lead last. 1) The service precautions are indicated or printed on the cabinet, chassis or components. When servicing, follow the printed or indicated service precautions and service materials. 2) The Components used in the unit have a specified conflammability and dielectric strength. When replacing any components, use components which have the same ratings. Components marked in the circuit diagram are important for safety or for the characteristics of the unit. Always replace with the exact components. 3) An insulation tube or tape is sometimes used and some components are raised above the printed writing board for safety. The internal wiring is sometimes clamped to prevent contact with heating components. Install them as they were. 4) After servicing always check that the removed screws, components and wiring have been installed correctly and that the portion around the service part has not been damaged. Further check the insulation between the blades of attachment plug and accessible conductive parts.

- 1-2 -

 ESD PRECAUTIONS
Electrostatically Sensitive Devices (ESD)
Some semiconductor (solid state) devices can be damaged easily by static electricity. Such components commonly are called Electrostatically Sensitive Devices (ESD). Examples of typical ESD devices are integrated circuits and some field-effect transistors and semiconductor chip components. The following techniques should be used to help reduce the incidence of component damage caused by static electricity. 1. Immediately before handling any semiconductor component or semiconductor-equipped assembly, drain off any electrostatic charge on your body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging wrist strap device, which should be removed for potential shock reasons prior to applying power to the unit under test. 2. After removing an electrical assembly equipped with ESD devices, place the assembly on a conductive surface such as aluminum foil, to prevent electrostatic charge buildup or exposure of the assembly. 3. Use only a grounded-tip soldering iron to solder or unsolder ESD devices. 4. Use only an anti-static solder removal device. Some solder removal devices not classified as "anti-static" can generate electrical charges sufficient to damage ESD devices. 5. Do not use freon-propelled chemicals. These can generate electrical charges sufficient to damage ESD devices. 6. Do not remove a replacement ESD device from its protective package until immediately before you are ready to install it. (Most replacement ESD devices are packaged with leads electrically shorted together by conductive foam, aluminum foil or comparable conductive materials). 7. Immediately before removing the protective material from the leads of a replacement ESD device, touch the protective material to the chassis or circuit assembly into which the device will by installed.
CAUTION : BE SURE NO POWER IS APPLIED TO THE CHASSIS OR CIRCUIT, AND OBSERVE ALL OTHER SAFETY PRECAUTIONS.

8. Minimize bodily motions when handing unpackaged replacement ESD devices. (Otherwise harmless motion such as the brushing together of your clothes fabric or the lifting of your foot from a carpeted floor can generate static electricity sufficient to damage an ESD device).

CAUTION. GRAPHIC SYMBOLS

THE LIGHTNING FLASH WITH APROWHEAD SYMBOL. WITHIN AN EQUILATERAL TRIANGLE, IS INTENDED TO ALERT THE SERVICE PERSONNEL TO THE PRESENCE OF UNINSULATED DANGEROUS VOLTAGE THAT MAY BE OF SUFFICIENT MAGNITUDE TO CONSTITUTE A RISK OF ELECTRIC SHOCK. THE EXCLAMATION POINT WITHIN AN EQUILATERAL TRIANGLE IS INTENDED TO ALERT THE SERVICE PERSONNEL TO THE PRESENCE OF IMPORTANT SAFETY INFORMATION IN SERVICE LITERATURE.

- 1-3 -

 SPECIFICATIONS
General Output Power Power Source Speaker impedance Ground System Dimensions (W x H x D) Net Weight (approx.) FM tuner Frequency Range S/N Ratio Distortion Usable sensitivity MW(AM) tuner Frequency Range S/N Ratio Distortion Usable sensitivity CD Frequency Range S/N Ratio Distortion Design and specifications are subject to change without notice.

50W x 4CH(Max.) DC 12V 4 Negative type 185 x 50 x 170 mm (Without Front Panel) 1.8 kg 87.5-108 MHz 55 dB 1.0% 12 dB 522-1620 kHz 45 dB 1.0% 32 dB 42 - 20000 Hz 60 dB 0.5%

- 1-4 -

SECTION 2. ELECTRICAL
ELECTRICAL TROUBLESHOOTING GUIDE
(1) No Power.

Any Key power on. YES NO Is power turnd on? YES NO DISC loading? YES NO Check laser circuitry. Q501, IC502 Check focusing circuitry. Q501,IC502 Check DISC.
Check loading supply circuitry. Check power supply circuitry.

Q260, Q380, Q381, IC401 Pin83 IC201 Pin2

Q350,Q351,CN505, IC401 Pin84

Does initial reading occur?

YES

Can disc be played? YES

NO

Check tracking servo circuitry. Q501,IC502

Is audio output supplied? YES

NO

Check audio circuitry. IC502,IC601,IC801

OK

- 2-1 -

(2) LCD light abnornal.

Any Key power on. (without DISC)

NO Do display LCD then light?

Check voltage in the power supply circuitry. YES Is u-com IC401 reset circuit normal? Pin11

NO

Power supply circuitry defective. Q380,Q381,IC403

NO

Reset circuit defective. IC821 Surrounding circuit defective.

YES

Is u-com IC401X1, X2 terminal Pin15, 16 input? OSC : 9.8304MHz YES Is u-com IC401 keyin Pin17, 46 72, 76 5volt input? YES Is u-com IC401 Pin 3,9,27,76 output waveform normal?

NO

X401, C413,C414 defective.

NO

Q260, CN401 front PCB pattern defective.

NO

IC401, Pin3, 9, 27, 76 front PCB pattern defective.

YES Is IC901 Com1, Com2, Com3 output waveform normal?

NO

IC901, Surrounding circuit PCB pattern defective.

YES

Display LCD connector defective.

- 2-2 -

(3) No Hands Free

Hand Free key on. YES NO Is H/F on? YES Does reset circuit appear normally to IC501 pin56? 3.3V Check whether is power output (3.3V) to IC502 pin2.

NO

Defect to IC503

YES Is it oscillates to IC501 pin 23, 24 by X501 oscillator? OSC: 19.2MHz YES Does signal output appear to IC501 Pin 26, 27, 33, 34? YES Does signal output appear to IC501 Pin 30, 37. YES NO Defect to MIC901, JK503, JK504. NO Defect to MIC901, JK503, JK504.

NO

Defect to X501, C505, C506.

OK

- 2-3 -

- 2-4 -

- 2-5 -

- 2-6 -

- 2-7 -

- 2-8 -

- 2-9 -

- 2-10 -

- 2-11 -

 WAVEFORMS OF MAJOR CHECK POINT

#1. MICOM INTERFACE WAVEFORM (CN503 1 9,2 1 ,1 8,20) during normal play #2. SLED DRIVE AND MOTOR WAVEFORM (IC504 pin5, 1 4) when focus search

#3. FOCUS DRIVE AND MOTOR WAVEFORM (R5 1 3, IC504 pin 1 5) When focus search failed or there is no disc on the tray

There is disc on tray and focus search success

- 2-12 -

#4. SPINDLE DRIVE AND MOTOR WAVEFORM (IC504 pin6, 1 2) when TOC reading

#5. TRACK DRIVE AND MOTOR WAVEFORM (R508, IC504 pin23) during normal play

#6. RF, TRACKING AND FOCUS ERROR WAVEFORM (IC502 pin8, 2 1 , 23) during normal play

- 2-13 -

 INTERNAL BLOCK DIAGRAM of ICs

I IC401 LC876B 1) PORT ASSIGNMENT

2) PORT DESCRIPTION
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Name in Micom P16/T1PWML P17/T1PWMH/BUZ SI2P0/SO2 SI2P1/SI2/SB2 P32/INT4/T1IN P33/INT4/T1IN P34/INT5/T1IN P35/INT5/T1IN SI2P2/SCK2/INT5/T1IN/AN12 SI2P3/SCK20/INT5/T1IN/AN13 /RESET XT1/AN10 XT2/AN11 VSS1 CF1 Name in Model PEV_DO PBEEP PMCM_DO PMCM_DI PDSP_OGCTL PEV_CLK PCD_IFSEQ PPLL_CE PMCM_CLK PSTANDBY /RESET XT1 XT2 GND CF1 Enable I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I I I/O I I/O setted O O O I O O I O I O I I O I Output Format CMOS CMOS CMOS N-ch CMOS CMOS N-ch CMOS CMOS CMOS Descripation To volume controller, data output Beep sound output To front micom, data output From front micom, data input RF IC control signal output (gain up) Clock for interface with volume controller Constant velocity signal input PLL IC enable output Clock output for interface with front micom To power amp, STANDBY command output Reset Sub clock 32.7 68 KHz Sub clock 32.7 68 KHz Ground Xtal 9.8304 MHz

- 2-14 -

Pin 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74

Name in Micom CF2 VDD1 P80/AN0 P81/AN1 P82/AN2 P83/AN3 P84/AN4 P85/AN5 P86/AN6 P87/AN7/MICIN P70/INT0/T0LCP/AN8 P71/INT1/T0HCP/AN9 P72/INT2/T0IN/NKIN P73/INT3/T0IN S0/T0 S1/T1 S2/T2 S3/T3 S4/T4 S5/T5 S6/T6 S7/T7 S8/T8 S9/T9 S10/T10 S11/T11 S12/T12 S13/T13 S14/T14 S15/T15 VDD3 S16/PC0 S17/PC1 S18/PC2 S19/PC3 VP S20/PC4 S21/PC5 S22/PC6 S23/PC7 S24/PD0 S25/PD1 S26/PD2 S27/PD3 S28/PD4 S29/PD5 S30/PD6 S31/PD7 S32/PE0 S33/PE1 S34/PE2 S35/PE3 S36/PE4 S37/PE5 S38/PE6 S39/PE7 VDD4 S40/PF0 S41/PF1

Name in Model CF2 VDD PLVL_MTR PS_MTR PAF_MUTE PHF_CTR PHF_SEND PPWR_MUTE PCDC_DO PRDS_DI PRDS_CLK PCD_IWRQ PCDC_DI PMCM_CE N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C VDD PFRT_DET PFRT_OPEN N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C PPER_SNS PACC PTEL_MUTE PST PERT_CLOSE PCD_SW1 PCD_SW2 PCD_SW4 PLMT_ISW POPT_IN2 POPT_IN1 POPT_IN0 VDD POPT_OUT1 POPT_OUT0

Enable I/O O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O O O O O O O O O O O O O O O O O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O

I/O setted O I I O O O O O I I I I I O O O O O O O O O O O O O O O O I I I I I I I I I I I I I I I I I I I I I I I I I O O

Output Format N-ch N-ch N-ch N-ch N-ch N-ch N-ch N-ch N-ch CMOS CMOS CMOS P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch P-ch

Descripation Xtal 9.8304 MHz Power supply +5V Sound levels signal input Radio stations strength signal input To tuner pack, AF mute output Hands free ON/OFF output Hands free send output To power amp, MUTE command output To CD changer, data output From tuner pack, RDS data input From tuner pack, RDS clock input Sub-Q read standard level signal input From CD changer, data input From front micom, chip select input Not to be used Not to be used Not to be used Not to be used Not to be used Not to be used Not to be used Not to be used Not to be used Not to be used Not to be used Not to be used Not to be used Not to be used Not to be used Not to be used Power supply +5 Front detachable switch signal input Front open state input Not to be used Not to be used Not to be used Not to be used Not to be used Not to be used Not to be used Not to be used Not to be used Not to be used Not to be used From ISO jack, BACKUP signal input From ISO jack, ACC signal input Telephone mute input Stereo indigaters signal input Front close state input In MD, SW1 state input In MD, SW2 state input In MD, SW4 state input In MD, limit switch state input For diode option check, signal 1 or 2 inter2 For diode option check, signal 1 or 2 inter1 For diode option check, signal 1 or 2 inter0 Power supply +5 For diode option check, signal 2 output For diode option check, signal 1 output

input port setted output port setted Used I/O port Interrupt A/D Converter

42 54 67 4 2

- 2-15 -

I IC501 MSM7731 (MAIN) 1) PIN CONFIGURATION (TOP VIEW)

- 2-16 -

2) BLOCK DIAGRAM

- 2-17 -

I IC501 MN6627932 (CD) 1) PORT ASSIGNMENT

- 2-18 -

2) Block Diagram

MDATA MCLK MLD ST AT

AV DD 2 AV SS2

IREF ARF DS LF RFSW PLLF PLLF0

X2 X1

PM CK SM CK

DVDD DVSS

TIMING GE NERATOR

MICROCO MPUTER INTERACE

DS PLL, VCO L, SU BCODE INTERFACE

TXTCK TXTD DQSY S BCK SU TXTD/SMCK BC NCLDCK DQSY FLAG BLKCK

A/D CONVERT ER

ADPVCC FE TE RFENV

EFM DEMODULATION SPINDLE SERVO MP3 DECORDER S YNC INTERP OLATION CIRC ECC CDROMECC CIRC RAM

FS CONVERTOR

DRVDD

DSV
BUS CON TROL OF T NRFDET BDO SERVO CPU digital out DIGITAL FILTER D/A CONVERTER ADPCM ANALOG LOW PA F SS ILTER S ERIAL OU TPUT INTERFACE (DAO) UNIT (BCU) DRAM INTERFACE INPUT PORT

A9 A0 NRAS NCAS 0 NCAS 1 NWE D3 D0

PWMS EL SPPOL

OUTPUT PORT

TX SPOUT TRVP TRVM TRP TRM FOP FOM TBAL FBAL LDON

LRCK(TXTCK/EXT1) BCLK(DQS Y/EXT2) S RDATA(TXTD/EXT0) IPFLAG FLAG)

OUTR AV DD 1 AV SS1

OUTL

LRCKIN(EXT1) BCLKIN(EXT2) S RDATAIN(EXT0)

- 2-19 -

3) PORT DESCRIPTION
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 Symbol D11 D10 D9 D8 UDQM SDRCK A11 A9 A8 A7 A6 A5 A4 LDQM NWE NCAS NRAS NCS A3 A2 A1 A0 DRVDD1 DVSS1 A10 *BA1 *BA0 DVDD1 SPOUT *SPPOL TRVP *TRVM *TRVP2 *TRVM2 TRP *TRM FOP *FOM IOVDD1 TBAL FBAL FE TE ADPVCC RFENV LDON NRFDET OFT BDO AVDD1 IREF ARF DSLF PWMSEL PLLF PLLFO AVSS1 LOOUTL LOVSS1 I/O I/O I/O I/O I/O O O O O O O O O O O O O O O O O O O I I O O O I O O O O O O O O O O I O O I I I I O I I I I I I O I O O I O I Function DRAM data signal I/O 11 DRAM data signal I/O 10 DRAM data signal I/O 9 DRAM data signal I/O 8 SDRAM upper byte data mask signal output SDRAM clock signal output DRAM address signal output 11 DRAM address signal output 9 DRAM address signal output 8 DRAM address signal output 7 DRAM address signal output 6 DRAM address signal output 5 DRAM address signal output 4 SDRAM lower byte data mask signal output DRAM write enable signal output DRAM CAS control signal output DRAM RAS control signal output SDRAM chip select signal output DRAM address signal output 3 DRAM address signal output 2 DRAM address signal output 1 DRAM address signal output 0 Power supply 1 for DRAM interface I/O Ground 1 for digital circuits DRAM address signal output 10 SDRAM bank selection signal output 1 SDRAM bank selection signal output 0 Power supply 1 for internal digital circuits Spindle drive signal output (absolute value) Spindle drive signal output (polarity) Traverse drive signal output (positive polarity) Traverse drive signal output (negative polarity) Traverse drive signal output 2 (positive polarity) Traverse drive signal output 2 (negative polarity) Tracking drive signal output (positive polarity) Tracking drive signal output (negative polarity) Focus drive signal output (positive polarity) Focus drive signal output (negative polarity) Power supply 1 for digital I/O Tracking balance adjustment signal output Focus balance adjustment signal output Focus error signal input Tracking error signal input Voltage input for supply voltage monitor RF envelope signal input Laser ON signal output RF detectoion signal input Off-track signal input Dropout signal input Power supply 1 for analog circuits Analog reference current input RF signal input DSL loop filter pin PWM output mode selection input Low: Direct High: 3-state PLL loop filter pin (for phase comparison) PLL loop filter pin (for speed comparison) Ground 1 for analog circuits L-ch audio output for line-out output Ground for line-out output

- 2-20 -

Pin No. 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100

Symbol LOOUTR LOVDD1 N.C. TMON1 N.C. N.C. TMON2 DVDD3 DVSS2 *EXT0 *EXT1 *EXT2 MCLK MDATA MLD *STAT *BLKCK *SMCK *PMCK *TX *FLAG NRST NTEST DVSS3 X1 X2 IOVDD2 DVDD2 D2 D1 D0 D3 D4 D5 D6 D7 D15 D14 DRVDD2 D13 D12

I/O O I O O I I I/O I/O I/O I I I O O O O O O I I I I O I I I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I I/O I/O

Function R-ch audio output for line-out output Power supply for line-out output Test monitor output 1 Test monitor output 2 Power supply 3 for digital circuits Ground 2 for digital circuits Expansion I/O port 0 Expansion I/O port 1 Expansion I/O port 2 Microcontroller command clock signal input Microcontroller command data signal input Microcontroller command load signal input Status signal output Subcode block clock signal output 4.2336-/8.4672-MHz clock signal output 88.2-kHz clock signal output Digital audio interface signal output Flag signal output LSI reset signal input Test mode setting input Ground 3 for digital circuits Crystal oscillator circuit input Crystal oscillator circuit output Power supply 2 for digital I/O Power supply 2 for internal digital circuits DRAM data signal I/O 2 DRAM data signal I/O 1 DRAM data signal I/O 0 DRAM data signal I/O 3 DRAM data signal I/O 4 DRAM data signal I/O 5 DRAM data signal I/O 6 DRAM data signal I/O 7 DRAM data signal I/O 15 DRAM data signal I/O 14 Power supply 2 for DRAM interface I/O DRAM data signal I/O 13 DRAM data signal I/O 12

- 2-21 -

I IC503 M12L16161A 1) PORT ASSIGNMENT

2) Block Diagram

I/O Control

LWE LDQM

Bank Select

Data Input Regidter

Row Buffer Refresh Counter

Row Decoder

Output Buffer

Sense AMP

512K x 16 512K x 16

Address Register

DQI

CLK ADD

LRAS

LCBR

Column Decoder Latency & Burst Length Programming Register

Col. Buffer

LCKE

LRAS

LCBR

LWE

LCAS

LWCBR

LDQM

Timing Register

CLK

CKE

CS

RAS

CAS

WE

L(U)DQM

- 2-22 -

3) PIN Function table

Pin CLK CS CKE A0~A10/AP BA RAS CAS WE L(U)DQM DQ0~15 VDD/VSS VDDQ/VSSQ N.C/RFU Input Function Active on the positive going edge to sample all inputs. Disables or enables device operation by masking or enabling all inputs except Chip Select CLK, CKE and L(U)DQM. Masks system clock to freeze operation from the next clock cycle. CKE Clock Enable should be enabled at least one cycle prior to new command. Disable input buffers for power down in standby. Row/Column addresses are multiplexed on the same pins. Row address: Address RA0~RA10, column address: CA0~CA7 Selects bank to be activated during row address latch time. Selects bank for Bank Select Address read/write during column address latch time. Latches row addresses on the positive going edge of the CLK with RAS low. Row Address Strobe Enables row access & precharge. Latches column addresses on the positive going edge of the CLK with CAS Column Address Strobe low. Enables column access. Enables write operation and row precharge. Latches data in starting from Write Enable CAS, WE active. Makes data output Hi-Z, tSHZ after the clock and masks the output. Blocks Data Input / Output Mask data input when L(U)DQM active. Data Input / Output Data inputs/outputs are multiplexed on the same pins. Power Supply/Ground Power and ground for the input buffers and the core logic. Isolated power supply and ground for the output buffers to provide improved Data Output Power/Ground noise immunity. No Connection/ This is recommended to be left No Connection on the Reserved for Future Use device. Name System Clock

I IC504 BA5810FM

28

27

26

25

24

23

22

21

20

19

18

17
10k

16
10k

15

CD1~ CB4 MUTE

POWVCC34 (CH3, CH4)

10k

10k

10k

7.5k 7.5k + 16k

16k

10k 10k

10k

+ +
LEVEL SHIFT 10k 10k

LOADING PRE FWE REV

7.5k 16k 7.5k 16k

10k LEVEL SHIFT

10k 10k

X3

POWER SAVE

PREVCC (PRE. LODING)

PREVCC12 (CH1. CH2) 10k

10

11

12

- 2-23 -

13

LEVEL SHIFT

LEVEL SHIFT

14

I IC505 AMC1117

1) Block Diagram

- 2-24 -

I IC599 BA6289F/BA6417F 1) Block Diagram

2) Pin descriptions

- 2-25 -

I IC601 TDA7437T 1) PINCONNECTION

44 43 42 41 40 39 38 37 36 35 34 TREB_R IN_R MUXOUT_R LOUD_R DIFFGND_R DIFF_R STEREO4_R STEREO1_R STEREO2_R STEREO3_R MONO 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 LOUD_L DIFFGND_L STEREO4_L STEREO1_L STEREO2_L STEREO3_L MUXOUT_L DIFF_L IN_L MID_RI CSM 33 32 31 30 29 28 27 26 25 24 23 OUT_RF OUT_LR MID_LI MID_LO OUT_RR SMEXT BASS_RO BASS_RI BASS_LO BASS_LI MID_RO

OUT_LF
D96AU435B

TREB-L

- 2-26 -

PAUSE

DGND

AGND

DVDD

ADDR

AVDD

CREF

SDA

SCL

2.2F 47nF IN_L

MUXOUT_L LOUD_L MID_LO 44 30 31 25 24 MID_LI BASS_LO BASS_LI 12 21 20

2) BLOCK DIAGRAM

4 x 470nF

STEREO1_L

16

STEREO2_L SPKR ATT

17 34 OUT_LF

STEREO3_L

18

STEREO4_L INGAIN VOLUME + LOUDN TREBLE MIDDLE BASS S-MUTE

15

TREBL_L

5.6nF

2.7K 22nF 100nF

5.6K 18nF 100nF

2 x 4.7F

DIFF_L

14

SPKR ATT

33

OUT_LR

DIFFGND_L I2 C BUS DECODER + LATCHES

13

40 38 37 36

ADDR SCL SDA DIGGND

STEREO1_R

IN_R

MUXOUT_R

2.7K

BASS_RO)

2.2F

TREB_R

22nF

18nF 100nF 5.6K

100nF

SMEXT

47nF

PAUSE

- 2-27 INGAIN VOLUME + LOUDN TREBLE MIDDLE BASS 39 CREF 22F 47nF LOUD_R 3 2 4 1 23 MID_RO 5.6nF 22 MID_RI 27 BASS_RI 26

STEREO2_R

STEREO3_R

10 S-MUTE SPKR ATT 29 OUT_RR

STEREO4_R

2 x 4.7F

DIFF_R

DIFFGND_R

5 MUTE CONTROL SOFT, ZERO SPKR ATT 32 OUT_RF

DVDD

41

AVDD

42

SUPPLY 28 35 19 CSM
D95AU249B

43

AGND

MULTIPLEXER

5 x 470nF

MONO

11

47nF

I IC602 S4560 1) BLOCK DIAGRAM

I IC801 TA8275H 1) BLOCK DIAGRAM

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I IC901 PD703260GC-105-8EA

1) PORT DESCRIPTION
Pin 1 2 3 4 5 6 7 8 Name in Micom AVREFO AVSS P10/ANO0 P11/ANO1 AVREF1 PDH4/A20 PDH5/A21 IC/FLMD0 Name in Model AVREFO AVSS PVOLA PVOLB AVREF1 PMEMAD19 PMEMAD20 N.C Enable I/O I/O I/O I/O I/O I/O setted I I O O Descripation Analog reference voltage(3.3V) Analog ground Volume encoder A Pin input Volume encoder B Pin input Analog reference voltage(3.3V) External memory address 19 output External memory address 20 output MASK version : Ground FLASH version : Normal mode : pull down Flash memory programming mode : pull-up Power supply(3.3V) Regulator control (connect to VSS Via a 4.7F capacitor) Ground X'tal 4.9152 MHz X'tal 4.9152 MHz Reset(Low active) Connect to Vss Open Open Open

9 10 11 12 13 14 15 16 17 18

VDD REGC VSS X1 X2 /RESET XT1 XT2 P02/NMI P03/INTPO/ADTRG

VDD N.C VSS X'tal X'tal /RESET N.C N.C N.C N.C

I I I I/O I/O

I I I O O

- 2-29 -

Pin 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74

Name in Micom P04/INTP1 P05/INTP2//DRST P06/INTP3 P40/SIB0/SDA01 P41/SOB0/SCL01 P42//SCKB0 P30/TXDA0/SOB4 P31/RXDA0/INTP7/SIB4 P32/ASCKA0//SCKB4/TIP00/TOP00 P33/TIP01/TOP01 P34/TIP10/TOP10 P35/TIP11/TOP11 P36/CTXD0//IETX0 P37/CRXD0//IERX0 EVSS EVDD P38/TXDA2/SDA00 P39/RXDA2/SCL00 P50/TIQ01/KR0/TOQ01/RTP00 P51/TIQ02/KR1/TOQ02/RTP01 P52/TIQ03/KR2/TOQ03/RTP02/DDI P53/SIB2/KR3/TIQ00/TOQ00/RTP03/DDO P54/SOB2/KR4/RTP04/DCK P55/SCKB2/KR5/RTP05/DMS P90/A0/KR6/TXDA1/SDA02 P91/A1/KR7/RXDA1/SCL02 P92/A2/TIP41/TOP41 P93/A3/TIP40/TOP40 P94/A4/TIP31/TOP31 P95/A5/TIP30/TOP30 P96/A6/TIP21/TOP21 P97/A7/SIB1/TIP20/TOP20 P98/A8/SOB1 P99/A9//SCKB1 P910/A10/SIB3 P911/A11/SOB3 P912/A12//SCKB3 P913/A13/INTP4 P914/A14/INTP5/TIP51/TOP51 P915/A15/INTP6/TIP50/TOP50 PDH2/A18 PDH3/A19 PCM0//WAIT PCM1/CLKOUT PCM2//HLDAK PCM3//HLDRQ PCT0//WR0 PCT1//WR1 PCT4//RD PCT6/ASTB BVSS BVDD PDL0/AD0 PDL1/AD1 PDL2/AD2 PDL3/AD3

Name in Model PMCM_CE N.C PRMC PMDI PMCLK PMCLK PLCDDAT0 PLCDDAT1 PLCDDAT2 PLCDDAT3 PLCDDAT4 PLCDDAT5 PLCDDAT6 PLCDDAT7 EVSS EVDD PLCDA0 /PLCDWR N.C N.C /PLCDCS /PLCDRES N.C N.C N.C PMEMAD0 PMEMAD1 PMEMAD2 PMEMAD3 PMEMAD4 PMEMAD5 PMEMAD6 PMEMAD7 PMEMAD8 PMEMAD9 PMEMAD10 PMEMAD11 PMEMAD12 PMEMAD13 PMEMAD14 PMEMAD17 PMEMAD18 N.C N.C N.C N.C N.C N.C N.C N.C BVSS BVDD PMEMDAT0 PMEMDAT1 PMEMDAT2 PMEMDAT3

Enable I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O

I/O setted I O I I O O O O O O O O O O O O I I I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O I I I I

Descripation Chip select input from main micom Open Remote controller input Serial data input from main micom Serial data output to main micom Serial clock for interface with main micom LCD data0 output LCD data1 output LCD data2 output LCD data3 output LCD data4 output LCD data5 output LCD data6 output LCD data7 output Power supply for port Ground for port LCD address 0 output LCD data weite signal output Open Open LCD driver chip select signal output LCD driver reset signal output Open Open Open External memory address0 output External memory address1 output External memory address2 output External memory address3 output External memory address4 output External memory address5 output External memory address6 output External memory address7 output External memory address8 output Normal mode : External memory address9 output Flash memory programming mode : Serial data input Normal mode : External memory address10 output Flash memory programming mode : Serial data input Normal mode : External memory address11 output Flash memory programming mode : Serial data input External memory address12 output External memory address13 output External memory address14 output External memory address17 output External memory address18 output Open Open Open Open Open Open Open Open Power supply for bus interface Groind for bus interface External memory data0 input External memory data1 input External memory data2 input External memory data3 input

input port setted output port setted Used I/O port Interrupt A/D Converter

24 36 60 3 3

- 2-30 -

I IC902 MR27V3202F 1) PIN CONFIGURATION (TOP VIEW)

2) BLOCK DIAGRAM

- 2-31 -

3) PIN DESCRIPTIONS

I LCD MODULE 1) BLOCK DIAGRAM

- 2-32 -

2) PIN ASSIGNMENT

- 2-33 -

- 2-34 -

 BLOCK DIAGRAM

2-35

2-36

 MAIN SCHEMATIC DIAGRAM

2-37

2-38

 FRONT SCHEMATIC DIAGRAM

2-39

2-40

 CDP SCHEMATIC DIAGRAM

2-41

2-42

 H/F & MOTOR SCHEMATIC DIAGRAM

2-43

2-44

 PRINTED CIRCUIT DIAGRAM

1. LED P.C.BOARD

2. FRONT P.C. BOARD (BOTTOM SIDE)

2-45

2-46

2. FRONT P.C. BOARD (TOP SIDE)

2-47

2-48

3. MAIN P.C. BOARD (BOTTOM SIDE)

2-49

2-50

3. MAIN P.C. BOARD (TOP SIDE)

2-51

2-52

4. CDP P.C. BOARD

2-53

2-54

SECTION 3. EXPLODED VIEWS

I CABINET AND MAIN FRAME SECTION
NOTE) Refer to SECTION 4 REPLACEMENT PARTS LIST in order to look for the part number of each part.

330

286 451 A40 268 A43 451 263 310 A26 257 251 269 452

266

309
TU1 01
253 A49 452

452

ANT1 01

287 307 A47

262 261

250

264
252

PN801 299

*Option 306 452

820 *Option

A41

453 295 A46 297 300 298 453 455 290 289 457 285 294 304 458 282 454 452

288

285 453 291

292

308

284 450 283 270 311

280

3-1

3-2

3-3

3-4

 Accessory part

900
825

830 827

*Option

- 3-5 -