PLLs with frequency dividers
, frequency multipliers are often used along with frequency dividers and phase-locked loops togenerate any desired frequency from an external reference frequency. The frequency multiplication is carried out inthe phase-locked loop's feedback loop, by using a frequency divider on the output of the voltage controlled oscillator(VCO). This
is fed-back to the input comparator and compared to the reference frequency.Since the divided down frequency is smaller than the reference frequency, the comparator generates a voltage signalto the VCO, telling it to increase the output frequency. It continues to do this via the feedback loop, raising the VCOoutput frequency, until the divided-down frequency from the VCO output is equal to the reference frequency. At thispoint the comparator stabilizes and generates no more signals to the VCO, or only minor changes to maintainstability. The output frequency from the VCO will be stable at the input reference frequency multiplied by the valueof the feedback divider.A PLL with a frequency divider in its feedback loop acts as a frequency multiplier and is a type of frequencysynthesizer.
In a configuration with an integer-N divider, its VCO's output frequency is N times its reference, or input, frequency.
Periodic changes in the integer value of an integer-N frequency divider will effectively result in a multiplier withboth whole number and fractional component. Such a multiplier is called a fractional-N synthesier after its fractionalcomponent. Fractional-N synthesizers provide an effective means of achieving fine frequency resolution with lowervalues of N, allowing loop architectures with tens of thousands of times less phase noise than alternative designswith lower reference frequencies and higher integer N values. They also allow a faster settling time because of theirhigher reference frequencies, allowing wider closed and open loop bandwidths.
Delta sigma synthesizer
A delta sigma synthesizer adds a randomization to programmable-N frequency divider of the fractional-Nsynthesizer. This is done to shrink sidebands created by periodic changes of an integer-N frequency divider.
•Egan, William F. 2000.
Frequency Synthesis by Phase-lock
, 2nd Ed., John Wiley & Sons, ISBN 0-471-32104-4•Fractional N frequency synthesizer with modulation compensation
U.S. Patent 4,686,488, Attenborough, C.(1987, August 11)•Programmable fractional-N frequency synthesizer
U.S. Patent 5,224,132, Bar-Giora Goldberg, (1993, June 29)
See Parseval's theorem.For example, the old Hewlett Packard 83590A.http://www.