A Low-Power CMOS Implementation of a CellularNeural Network for Connected Component Detection.
S. El-Din, A. K. Abol Seoud, and A. El-Fahar
Electrical Engineering DepartmentUniversity of AlexandriaAlexandria, Egypt.E-mail: eng_salah_alx@yahoo.com
ABSTRACT
- In this paper, we describe an analog VISIimplementation of a Cellular Neural Network (CNN) forConnected Component Detector (CCD) applications. In thisimplementation, a novel compact network architecture based ona low-power CMOS realization has been employed. Thefunctionality of the proposed network has been verified throughSPICE simulations for 1-D vectors of arbitrary black-and-whitepixels.
Keywords: Cellular Neural Network, Low-power CMOS, Connected Component Detector.
I. INTRODUCTIONThe connected component detector (CCD) (alternativelycalled connected component analysis, blob extraction, blobdiscovery, region labeling, or region extraction) is analgorithmic application of graph theory, where subsets of connected components are uniquely labeled based on a givenheuristic. The CCD is used in computer vision to detectconnected regions in binary digital images, although colorimages and data with higher-dimensionality can also beprocessed [1, 2]. When integrated into an image recognitionsystem or human-computer interaction interface, the CCD canoperate on a variety of information [3, 4]. Blob extraction isgenerally performed on the resulting binary image from athreshold step. Blobs may be counted, filtered, and tracked.Blob extraction is related to but distinct from blob detection[5]. In this paper, starting from the function of ConnectedComponent Detection [6], and through the proposed low-power CNN cell circuit with opposite-sign templates [7, 8], wecan realize a complete pattern for VLSI CCD. By using abipolar pattern [9], we can represent the transient behavior.Performance of the transient behavior is evaluated usingPSPICE simulation.II. CONNECTED COMPONENT DETECTIONFUNCTIONALITYFor VLSI implementation of CNNs, it is usual to considersimplified versions of the Chua-Yang model in order to reducecircuit complexity [10]. A cellular system was defined as astructured collection of identical elements called cells.Consider the analog processing cell circuit, henceforth called acell, as shown in Fig.1(a), with only one nonlinear elementwhose characteristics is shown in Fig.1(b). This cell is
located
M. El-Sayed Ragab
School of Electronics, Comm. and Computer Eng.E-JUST.Alexandria, Egypt.E-mail: m.ragab@ejust.edu.egin the ( i , j ) position of a two-dimensional regular array of
N M
cells. The r-neighborhood
ji
N
r
,
of a typicalcell
jiC
,
is defined as:
)(,max,,,
eger t inr jlik lk C ji
N
r
(1)An
r
=1 neighborhood of a cell within a cell array consists of all those cells shown shaded in Fig.1(c).
(a)(b)
(c)Figure 1.
The cell circuit model and its neighborhood in a cell array. (a) Thecell circuit model (b) The characteristics of the single nonlinear element of thecell (a voltage-controlled current source). (c) An r =1 neighborhood in a partof a cell array.
The dynamical system equations describing the Chua-YangCNN model shown in Fig. 1, are expressed as:1) State equation:
),(),(
),(),(
)(),;,(
)(),;,()(
1
jilk C
ukl jilk C
ykl xij x xij
N I t lk ji B
N t lk ji At
dt C
r r
V V V RdV
(2)where
.1;1
N j M i
2) Output equation:
1)(1)(5.0)(
t t t
V V V
xij xij yij
(3)
(IJCSIS) International Journal of Computer Science and Information Security,Vol. 9, No. 6, June 2011148http://sites.google.com/site/ijcsis/ISSN 1947-5500
3) Constraint conditions:
.1;1)0(
V V
uij xij
and
where
u, x
and
y
refer to the input, state, and output,respectively.It is noted that the network defined by the above set of equations is completely stable if the self-feedback coefficient
1),(
ji A
and the symmetry conditions
),;,(),;,(
jilk Alk ji A
are satisfied [10]. However, froman applications point of view, nonsymmetrical templates arealso of interest and the associated stability properties have tobe considered. An interesting class of CNN with opposite-signtemplates is defined by the A-template values satisfying thefollowing structures and sign conditions:
000000
s ps A
(4)where
1
p
and
0
s
. Moreover, because the stability of the network is controlled by matrix A, the part of stateequation (2), given by
,)(),;,(
),(),(
I t N lk ji B
jilk c
ukl
r
V
isnot of interest and can be taken equal to zero. In such a type of networks, three important sub-classes have been investigateddepending on the relationship between the coefficients
p
and
s
[6]:i) If
s > p-1,
the network will have no stable equilibriumstates.ii) If
s < (p-1)/2,
the network is completely stable.iii) If
s
is in the interval
((p-1)/2,(p-1)),
the complete stabilityis strongly conjectured because in some saturation regions, inwhich
,1
V
xij
there exists no equilibrium states.The network sub-class (iii) has led to an interesting applicationin digital image processing, the connected componentdetection (CCD), in which the dynamics of a cell chainconsisting of black
)1(
V
xi
and white
)1(
V
xi
pixels, with an initial pattern, will converge to a final patternhaving the CCD properties. To be specific, we consider thefollowing two basic combinations in the cell chain:the combination tends toward ; andthe combination tends toward .In fact, the natural results of this dynamical behavior have ledto the functionality of the CCD, as followsEach one-colored connected region of cells will be shifted tothe right and finally compressed into a single cell with thissame color. Then these compressed cells will line up at theright hand end of the cell chain. Finally the one
–
coloredleftmost region will expand to the alternating-colored cells atthe right.Fig. 2 shows two examples of two CCD operations in twodifferent cell chain
1,1
12
, and
1,1
25
.
initial patternfinal pattern(a)nitial patternfinal pattern(b)Figure 2. The initial states and final states of a CCD(a) for
1,1
12
cell chain.(b) for
1,1
25
cell chain.
III. Low-Power CMOS Implementation of a CNN cell.In this section, a practical low power VLSI implementation of a simplified version of the CNN model is presented, togetherwith simulation results. Fig. 3 shows a block diagram for theCNN cell model.
Figure 3. Block diagram of CNN cell.
It includes an integrator that has as inputs weightedcontributions of the outputs and inputs of the set of m cells in aneighborhood of cell c. V
xij
is the state of cell C
ij
, with aninitial condition V
xij
(0), R
x
C conforms the integration timeconstant of the system. The cell output is V
yij
(t) =
f
(V
xij
(t)),where
f
can be any convenient non-linear function. The block A can be implemented using a set of four quadrant multiplierswhose inputs are the outputs of the cells within the assumedneighborhood and the template A values. Similarly, block Bcan be implemented using a set of four quadrant multiplierswhose inputs are the inputs of the cells within the assumedneighborhood and the template B values. The outputs of blocks A and B are (in the current form)
I
xy
and
I
xu
,respectively. Those currents are summed with the bias currentI of the cell and then integrated in the R
x
C circuit, to result inthe cell state voltage V
xij
. The output voltage of the cell Vy
ij
isobtained through the limiting transfer function
f
(V
xij
).Alternatively, the nonlinear transfer function
f
(V
xij
) can beincorporated in the multiplier circuits themselves, resulting ina small area CNN cell. This can be realized using low-power
(IJCSIS) International Journal of Computer Science and Information Security,Vol. 9, No. 6, June 2011149http://sites.google.com/site/ijcsis/ISSN 1947-5500
BB0 B1 B2 B3B4
I0I0I1 I2 I3 I4VddVggIbV1 V2V3 V3
I1I2Io
VddVddV4VddVddVa
CMOS four quadrant multipliers operating in weak inversionregime. The basic difference with respect to the original Chua-Yang model is that a sigmoid-like function, instead of theconventional piecewise-linear function, is used to generate thecell output.The proposed circuit of a programmable low-power CMOSfour quadrant multiplier and its circuit symbol are shown inFig. 4 [11]. It is composed of registers which store the weightvalues, a linear DAC, and a tranconductance amplifier. Thecell has five bits. Each bit is controlled by a pass transistor.Assuming weak inversion operation for all MOS devices in themultiplier circuit, it can be shown that the output current Io isexpressed as:
highisand lowisif k
lowisand highisif k
V V V V I V V V V I I I I
bbo
4321432121
))2(tanh())2(tanh(
(5)where
nU
T
k
1
, with
n
is a slope factor ( in practice it liesbetween 1 and 2 and is close to 1 for high values of gatevoltage), and
U
T
is the thermal voltage whose value is 26mVat room temperature. Current switching logic controlled by V
3
and V
4
enables the output to change sign. It is noted that theoutput current is linearly proportional to one of the multiplierinputs, I
b
, and varies nonlinearly with the other input, (V
1
-V
2
).The transfer characteristic of the multiplier circuit is shown inFig. 5
(a)(b)Figure 4. (a) circuit diagram of programmable low-power CMOS fourquadrant multiplier and (b) its circuit symbol.Figure 5. The transfer function of the proposed circuit
Fig. 6 shows a complete implementation of a CNN cell usingthe proposed multiplier circuit. The sets of multipliers in thelower and upper parts of Fig.3 represent the second and thirdterms in the left hand side of equation (2), respectively. Eachmultiplier in the lower set accepts one of the cells' outputswithin the given neighborhood, as one input, and thecorresponding template value A (
)
as the other input. The A-template values are determined by the programmable tailcurrent sources I
b,y
and their signs are controlled by themultiplier control inputs V
3
's and V
4
's. On the other hand, eachmultiplier in the upper set accepts one of the cell's inputswithin the given neighborhood as one input, and thecorresponding template value B (
)
as the other input. Also,those B- template values are determined by the programmabletail current source, I
b,u
and their signs are controlled by thecorresponding multiplier control inputs V
3
's and V
4
's. Theoutput currents of the two multiplier sets are summed togetherand applied to the R
x
C current integrator. The resistor R
x
isimplemented using the diode-connected transistor M
r
.
Io,u1Vu1VcomIb,u1IMr CVxVddV4,u1V3,u1VcomIo,u2Vu2VcomIb,u2V4,u2V3,u2VcomIo,y2Vy2VcomIb,y2V4,y2V3,y2VcomIo,y1Vy1VcomIb,y1V4,y1V3,y1VcomVunVyn
Cells’ inputs
u
(Nr)
Cells’ outputs
y
(Nr)
Figure 6. Complete CNN cell.
V1V2IoIbV3 V4
(IJCSIS) International Journal of Computer Science and Information Security,Vol. 9, No. 6, June 2011150http://sites.google.com/site/ijcsis/ISSN 1947-5500
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A Low-Power CMOS Implementation of a Cellular Neural Network for Connected Component Detection
In this paper, we describe an analog VISI implementation of a Cellular Neural Network (CNN) for Connected Component Detector (CCD) applications. In this implementation, a novel compact network architecture based on a low-power CMOS realization has…
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