Code No: 54225/MT

NR
M.Tech. – II Semester Regular Examinations, September, 2008

ADVANCED COMPUTER ARCHITECTURE

(Common to VLSI System Design/ Electronics & Communications/
Computer Science & Engineering)

Time: 3hours Max. Marks:60

Answer any FIVE questions

All questions carry equal marks
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1.a) State Amdahl’s law.

b) Following measurements are observed
Frequency of FP operations (other than FPSQR) = 25%
Average CPI of FP operations = 4.0
Average CPI of other instructions = 1.33
Frequency of FPSQR = 2%
CPI of FPSQR = 20
Assume that the two design alternatives are to decrease CPI of all
FPSQR to 2 or to decrease the average CPI of all FP operations to
2.5. Compare these two design alternatives using the CPU
performance equation.

2.a) Write notes on addressing modes for control flow instructions.

b) What are the different competing forces an architect must observe
when encoding the instruction set.

3.a) Give a brief account on Instruction-level parallelism.

b) What is meant by dynamic scheduling? Explain.

4.a) Write notes on VLIW approach.

b) Clearly bring out the differences between hardware and software
speculation mechanism.

5.a) Which has the lowest miss rate:

a 16KB instruction cache with a 16KB data cache or a 32KB
unified cache?
b) Clearly bring out the differences between cache and virtual
memory.

6.a) What is multiprocessor cache coherence?

b) Write short notes on Synchronization and multithreading.

Contd…2.,
Code No: 54225/MT ::2::

7.a) What is meant by Block Interleaved parity and Distributed Block-

Interleaved parity?
b) Write short notes on Transaction-Processing Benchmarks.

8.a) What are the partial issues to be considered for commercial

interconnection network?
b) Write short notes on designing a cluster.

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