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Table Of Contents

Basic Computer Structure and the 6812
1.1 Basic Computer Structure
1.2 The Instruction
1.3 A Few Instructions and Some Simple Programs
Figure 1.4. Data Operator Arithmetic
Figure 1.6. Bits in the Condition Code Register
Figure 1.8. Program for 16-Bit Addition
Figure 1.10. Most Efficient Program for 16-Bit Addition
1.4 MC68HC812A4 and MC68HC912B32 Organizations
Figure 1.12. Expanded Wide Multiplexed Bus Mode of the MC68HC812A4
Figure 1.14. Single-Chip Mode of the MC68HC912B32
Figure 1.15. Expanded Wide Multiplexed Bus Mode of the MC68HC912B32
1.5 Variable Word Width
Figure 1.16. Variable Word Width Implementation
1.6 Summary And Further Reading 21
1.6 Summary and Further Reading
The Instruction Set
2.1 Move Instructions
Table 2.1. Move Instructions Using an Effective Address
Figure 2.2. A Stack
Table 23. Special Move Instructions
Figure 23. Transfers between Registers
2.2 Arithmetic Instructions
Figure 2.5. Program Segment for 32-Bit Addition
Table 2.5. Arithmetic Instructions That Do Not Use an Effective Address
Figure 2.8. Program Segment for BCD Addition
2.3 Logic Instructions
Table 2.6. Logic Instructions
Table 2.7. Edit Instructions
2,4 Edit Instructions 41
Figure 2.13. Shift Hardware
2.4 Edit Instructions
Figure 2.15. Program Segment for Insertion of Some Bits
2.5 Control Instructions
Table 2.10. Special Instructions
2.8 Remarks 51
Figure 2.23. Program Segment for a Multiply and Add Operation
2.8 Remarks
3.1 OP Code Byte Addressing Modes
Figure 3.1. Op Code Byte Coding
3.2 Post-Byte Index Addressing Modes
Figure 3.2. Post Byte Coding
Figure 33, Program Segment to Add Two Bytes Using Vector Indexing
Figure 3.7. Accumulator Index Address Calculation
3.3 Relative Addressing And Position Independence 67
3.3 Relative Addressing and Position Independence
Figure 3.8. Simplified Control Hardware for Relative Addressing
3.4 Stack Index Addressing, Reentrancy and Recursion 71
3.4 Stack Index Addressing, Reentrancy, and Recursion
Figure 3.11. A Stack Buffer for Two Stacks
Figure 3.12. Subroutine to Compute n! Recursively
Figure 3.14. Nonreentrant Subroutine to Clear Memory
Figure 3.16. A Stack Buffer for Nested Segments
3.5 Examples
Figure 3.18. Program Segment to Move a Block of Memory
Figure 3.20. Program Segment to Compute an Inner Product
3.6 Architectural Notions of Addressing
3.7 Summary
4,! Introductory Example and Assembler Printout 89
4.1 Introductory Example and Assembler Printout
Figure 4.2. Assembler Source Code for the Program MAX
Table 4.2. Addressing Modes
Figure 43. Assembler Listing for the Program MAX
4.2 Assembler Directives
Table 43. Assembler Directives
Figure 4.4. Assembler Listing for the Program Square
4.3 Mechanics of a Two-Pass Assembler
Figure 4.5. Program to Select Negative Odd Numbers
Figure 4.6. Program with Illegal Forward Reference
4,4 Character String Operations 99
Figure 4.7. Program without Forward Reference
4.4 Character String Operations
Figure 4.8. Print Program
4.6 Summary
Figure 4.22. Program with Relative Address Reference
Figure 4.25. Another Program with Errors
Figure 4.27. FINDLBL Subroutine with Errors
Figure 4.28. Line Print Subroutine with Errors
5.1 Cross Assemblers and Downloaders
Figure 5.1. Loader Record
5.2 Relocatable Assemblers and Loaders ! 23
5.2 Relocatable Assemblers and Loaders
Table 5.2. Relocation Directives
5.3 Conditional Assemblers 125
5.3 Conditional Assemblers
5.4 Macro Assemblers 1.27
5.4 Macro Assemblers
Table 5.5. Macro Arguments
Figure 5.6. Loop Macro to Add Consecutive Values
5.5 Documentation
Figure 5.9. Flowchart for Example Control Sequence
5.6 Summary
Figure 6.1. Subroutine Calling and Returning
6.1 Local Variables 139
6.1 Local Variables
Figure 63. Changing a Global Variable before It Has Been Completely Used
Figure 6.5. Inner Product Utilizing Different Global Variables (a Bad Example)
Figure 6.7, Inner Product Program Segment Utilizing Local Variables on the Stack
Figure 6.10. Using Symbolic Names for Stacked Local Variables
Figure 6.11. Defining Symbolic Names for Stacked Local Variables by Sizes
Figure 6.13. Declaring Symbolic Names for Extended Local Access
Figure 6.14. Accessing Stacked Local Variables Using a Stack Marker
6.2 Passing Parameters 149
6.2 Passing Parameters
Figure 6.15. A Subroutine with Parameters in Registers
Figure 6.16. Change a Global Parameter before Its Subroutine Has Used It
Figure 6.17. A Subroutine with Parameters in Global Variables
Figure 6.18. Calling a Subroutine for Figure 6.17
Figure 6.19. Calling a Subroutine with Parameters on the Stack for Figure 6.2]
Figure 6.20. Location of Parameters Passed on the Hardware Stack
Figure 6.23. Calling a Subroutine with Parameters on the Stack for Figure 6.22
Figure 6.24. Parameters Passed after the Call
Figure 625. A Subroutine with Parameters after the Call, which Pulls the Return
Figure 626. A Subroutine Calling Sequence for Figure 6.25
Figure 6.28. A Subroutine Call with Parameters after the Call for Figure 6.27
Figure 6.29. A Subroutine With In-Line Parameters that Are Addresses
Figure 630. An In-Line Argument List of Addresses for Figure 6.29
Figure 632. Parameters in a Table
Figure 633. Calling Sequence for Passing Arguments in a Table
6.3 Passing Arguments by Value, Reference, and Name
6.4 Calling And Returning Mechanisms 163
6.4 Calling and Returning Mechanisms
Figure 634. Simple Subroutine
Figure 635. A Subroutine Saving and Restoring Registers
Figure 636. Saving and Restoring All the Registers
Figure 637. A Subroutine with Multiple Entry Points
Figure 638. Calling the ith Subroutine for Figure 6.37
Figure 639. A Jump Vector
Figure 6.40. Calling the ith Subroutine of a Jump Vector
Figure 6.41. Emulation of SWI
Figure 6.43. An SWI Handler
Figure 6.45. A Trap Handler
6,5 Summary
Figure 6.47. Program for Problem 13
Arithmetic Operations
7.1 Multiplication and Division
Figure 73.8-Bit Signed Multiply Subroutine
7.2 Integer Conversion
Figure 7.7 Conversion from Binary to Decimal by Division by Powers of Ten
Figure 7.8 Conversion from Binary to Decimal by Division by 10
7.3 From Formulas to Subroutine Calls 191
7.3 From Formulas to Subroutine Calls
Figure 7.11. Stack Movement when Evaluating (8)
Figure 7.13. Algorithm to Write a Sequence of Subroutine Calls for (8)
7.4 Long Integer Arithmetic
Figure 7.15. 32-Bit Compare Subroutine
Figure 7.17.32-Bit by 32-Bit Unsigned Multiply Subroutine
Figure 7.19. Push-and-Add Subroutine
Figure 7.20. Procedure for Floating-Point Addition
7,6 Fuzzy Logic
Figure 7.21. Fuzzy Logic Control System
7.7 Summary
Programming in C and C++
8.1 Compilers and Interpreters
8.2 Operators and Assignment Statements 223
8.2 Operators and Assignment Statements
Table 8.1. Conventional C Ooerators Used in Exoressions
8.3 Conditional and Loop Statements
8.4 Constants and Variables 227
Figure 8.2. Case Statements
8.4 Constants and Variables
8.6 An Example
8.7 Object-Oriented Programming in C++
8.8 Summary
Problems
Implementation of C Procedures
9,1 Global and Local Variables
9.2 Expressions and Assignment Statements 257
9.2 Expressions and Assignment Statements
Figure 93. A C Program with Some Operators
9,3 Conditional Statements 265
9.3 Conditional Statements
9.4 Loop Statements, Arrays, and Structs
Figure 9.13. A Program Setting and Testing a Bit
9,5 Procedure Calls and Arguments 279
9.5 Procedure Calls and Arguments
Figure 9.14. A Subroutine to Raise a Number to a Power
9.6 Examples from Character String Procedures
9.7 Summary
Elementary Data Structures
10.1 What a Data Structure Is
10.2 Indexable Data Structures 293
10.2 Indexable Data Structures
Figure 10.2. A Histogram
Figure 10.4. Subroutine ZTRANS
10.3 Sequential Data Structures
Figure 10.5. Deque Data Structure
Figure 10.7. Subroutines for Pushing and Pulling B from the Top of the Deque
10.4 Linked List Structures
Figure 10.11. Flowchart for Scanning Tree
Figure 10.12. Subroutine SCAN Using Indexes
Figure 10.14. Subroutine SCAN Using Address Pointers
10.5 Summary
11.3 Input and Output Software
11.4 Synchronization Hardware
11.5 Gadfly Synchronization
Figure 11.8. Status Port
11.6 Interrupt Synchronization
Figure 11.9. Interrupt Request Path
Table 11.1. Interrupt Vectors in the 6812 'A4
11.7 Analog-to-Digital and Digital-to-Analog Conversion
Figure 11.10. D-to-A Converter
Figure 11.11. A-D Subsystem of the 'A4 or 'B32
11.8 UART Protocol
Figure 11.13.6812 Serial Communication Interface
11.9 Summary and Further Reading
PROBLEMS
Figure 11.14. Parallel Output Port of the 'A4 or 'B32
Figure 11.16. Parallel D-to-A Output Port of the 'A4 or 'B32
Other Microcontrollers
12.1 The 6811
Figure 12.1. A 6811 Dot Product Subroutine
12.2 The 6808
Figure 12.2. Registers of the 6808
Table 12.2. Instruction Set and Addressing Modes of the 6808
Figure 12.5. The Register Set of the 6805
12.3 The 6805
Table 123. Instruction Set and Addressing Modes of the 6805
Figure 12.7. A 6805 Dot Product Subroutine
12.4 The 68300 Series
Figure 12.8. Register Set of 68300 Series Microcomputers
Figure 12.9. Memory Spaces in the 68300 Series
Table 12.4. Addressing Modes for the 68300 Series
12.5 The 500 Series 367
12.5 The 500 Series
Table 12.7. Instructions for the 500 Series
Figure 12.13. M-CORE Register Set
Table 12.8. Instructions for the M-CORE Series
Figure Al.l. 4-Bit Binary Representations
A2.2 Opening the HIWARE Toolbox
A2.3 Running Examples From the ManualProgramFolder
A2.4 Running Examples From the AssemblyProgramFolder
A2.5 Downloading to a 'B32 Board
A2.7 Techniques for Hi Ware Tools
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Ebooksclub.org Introduction to Micro Controllers Architecture Programming and Interfacing for the Motorola 68HC12 Academic Press Series in Engineering

Ebooksclub.org Introduction to Micro Controllers Architecture Programming and Interfacing for the Motorola 68HC12 Academic Press Series in Engineering

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