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Arm7tdmi Instruction Set Reference

Arm7tdmi Instruction Set Reference

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Published by: bhch1173 on Aug 31, 2011
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Department of Electrical and Computer EngineeringUniversity of Wisconsin-Madison
ECE 353/315
 ARM7TDMIInstruction SetReference
 
Michael G. Morrow2007
 
Last updated 3/1/2007 7:59 AM
 
Page 1
Table of Contents
1
 
Instruction Encoding............................................................................................................................................1
 1.1 ARM7TDMI ARM Instructions..............................................................................................................................11.2 ARM7TDMI THUMB Instructions..........................................................................................................................2
2
 
Conditional Execution...........................................................................................................................................2
 2.1 Condition Field......................................................................................................................................................22.2 Condition Codes....................................................................................................................................................2
3
 
 Addressing, Operands and Directives...................................................................................................................3
 3.1 General Notes.......................................................................................................................................................33.2 Shifter Operands...................................................................................................................................................33.3 Load/Store Register Addressing Modes...................................................................................................................63.4 Miscellaneous Load/Store Addressing Modes...........................................................................................................83.5 Memory Allocation and Operand Alignment.............................................................................................................93.6 Miscellaneous Assembler Directives.......................................................................................................................10
4
 
Instruction Descriptions.....................................................................................................................................12
 4.1 General Information.............................................................................................................................................124.2 ADC Add with Carry...........................................................................................................................................124.3 ADD - Add...........................................................................................................................................................134.4 AND Bit-wise AND.............................................................................................................................................134.5 B, BL Branch, Branch and Link...........................................................................................................................144.6 BIC Bit Clear.....................................................................................................................................................154.7 BX Branch and Exchange...................................................................................................................................154.8 CMN Compare Negative.....................................................................................................................................164.9 CMP - Compare....................................................................................................................................................164.10 EOR Bit-wise Exclusive-OR.................................................................................................................................174.11 LDM Load Multiple.............................................................................................................................................174.12 LDR Load Register.............................................................................................................................................194.13 LDRB Load Register Byte...................................................................................................................................204.14 LDRH Load Register Halfword............................................................................................................................204.15 LDRSB Load Register Signed Byte......................................................................................................................214.16 LDRSH Load Register Signed Halfword...............................................................................................................214.17 MLA Multiply-Accumulate...................................................................................................................................224.18 MOV Move........................................................................................................................................................224.19 MRS Move PSR into General-Purpose Register.....................................................................................................234.20 MSR Move to Status Register from ARM Register................................................................................................234.21 MUL Multiply.....................................................................................................................................................244.22 MVN Move Negative..........................................................................................................................................254.23 ORR Bit-wise Inclusive-OR.................................................................................................................................254.24 RSB Reverse Subtract........................................................................................................................................264.25 RSC Reverse Subtract with Carry........................................................................................................................264.26 SBC Subtract with Carry....................................................................................................................................274.27 SMLAL Signed Multiply-Accumulate Long............................................................................................................274.28 SMULL Signed Multiply Long..............................................................................................................................284.29 STM Store Multiple............................................................................................................................................284.30 STR Store Register............................................................................................................................................304.31 STRB Store Register Byte..................................................................................................................................304.32 STRH Store Register Halfword............................................................................................................................314.33 SUB - Subtract.....................................................................................................................................................314.34 SWI Software Interrupt.....................................................................................................................................324.35 SWP - Swap.........................................................................................................................................................324.36 SWPB Swap Byte..............................................................................................................................................334.37 TEQ Test Equivalence........................................................................................................................................344.38 TST - Test...........................................................................................................................................................344.39 UMLAL Unsigned Multiply-Accumulate Long........................................................................................................354.40 UMULL Unsigned Multiply Long..........................................................................................................................35
5
 
Pseudo-Instructions...........................................................................................................................................36
 5.1 ADR Load Address (short-range)........................................................................................................................365.2 ADRL Load Address (medium-range)..................................................................................................................365.3 ASR Arithmetic Shift Right.................................................................................................................................365.4 LDR Load Register.............................................................................................................................................375.5 LSL Logical Shift Left.........................................................................................................................................375.6 LSR Logical Shift Right.......................................................................................................................................375.7 NOP No Operation.............................................................................................................................................385.8 POP - Pop............................................................................................................................................................385.9 PUSH - Push........................................................................................................................................................385.10 ROR Rotate Right..............................................................................................................................................385.11 RRX Rotate Right with Extend............................................................................................................................39

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