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Huong Dan Su Dung KIT8051

Huong Dan Su Dung KIT8051

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Published by: api-3696281 on Oct 14, 2008
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03/18/2014

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H\u01af\u1edaNG D\u1eaaN S\u1eec D\u1ee4NG B\u1ed8 TH\u00cd NGHI\u1ec6M 8051
1. Kh\u1ed1i \u0111i\u1ec1u khi\u1ec3n trung t\u00e2m
\u0110\u00e2y l\u00e0 kh\u1ed1i ch\u00ednh thi\u1ebft k\u1ebf cho ch\u00edp vi \u0111i\u1ec1u khi\u1ec3n 89C51/52 c\u1ee7a Atmel hay
c\u00e1c d\u00f2ng ch\u00edp t\u01b0\u01a1ng th\u00edch v\u1edbi ki\u1ebfn tr\u00fac c\u1ee7a vi \u0111i\u1ec1u khi\u1ec3n 8051.
Th\u00e0nh ph\u1ea7n c\u1ee7a kh\u1ed1i trung t\u00e2m bao g\u1ed3m:
Kh\u1ed1i trung t\u00e2m, bao g\u1ed3m:

CPU89C51 ho\u1eb7c89S8252
Giao ti\u1ebfp ngo\u1ea1i vi qua PPI8255
Ram 32KB 62256
Serial EEPROMT 24Cxx

RTC DS1307
Gi\u1ea3i m\u00e3 \u0111\u1ecba ch\u1ec9 74LS138
Truy\u1ec1n th\u00f4ng RS485
Kh\u1ed1i n\u00e0y c\u00f3 th\u1ec3 s\u1ef1 d\u1ee5ng ngu\u1ed3n tr\u1ef1c ti\u1ebfp qua c\u00e1p USB n\u1ed1i v\u1edbi m\u00e1y
t\u00ednh ho\u1eb7c s\u1eed d\u1ee5ng ngu\u1ed3n ngo\u00e0i.
1.1.Gh\u00e9p n\u1ed1i b\u1ed9 nh\u1edb RAM 62256

B\u1ed9 nh\u1edb RAM 62256 \u0111\u01b0\u1ee3c s\u1eed d\u1ee5ng l\u00e0 b\u1ed9 nh\u1edb 32K gh\u00e9p n\u1ed1i v\u1edbi 89C51 qua bus m\u1edf r\u1ed9ng tr\u00ean c\u1ed5ng P0 v\u00e0 P2. B\u1ed9 nh\u1edb n\u00e0y \u0111\u01b0\u1ee3c gi\u1ea3i m\u00e3 tr\u1ef1c ti\u1ebfp v\u00e0 c\u00f3 th\u1ec3 truy c\u1eadp n\u1ed9i dung tr\u00ean d\u1ea3i \u0111\u1ecba ch\u1ec90000h-7FFFh.

\u0110\u1ec3 truy xu\u1ea5t d\u1eef li\u1ec7u trong RAM ta s\u1eed d\u1ee5ng l\u1ec7nh movx dest,src c\u1ee7a vi
\u0111i\u1ec1u khi\u1ec3n 89C51
D\u01b0\u1edbi \u0111\u00e2y l\u00e0 \u0111o\u1ea1n ch\u01b0\u01a1ng tr\u00ecnh m\u1eabu truy c\u1eadp b\u1ed9 nh\u1edb RAM 62256
lcall RxByte

; nh\u1eadn 1 k\u00fd t\u1ef1 qua c\u1ed5ng RS232
mov DPH,#00h ; byte cao c\u1ee7a DPTR
mov DPL,#03h ; byte th\u1ea5p c\u1ee7a DPTR
movx @DPTR,a ; l\u01b0u k\u00fd t\u1ef1 nh\u1eadn \u0111\u01b0\u1ee3c v\u00e0o \u0111\u1ecba ch\u1ec9 0003h
clr LED_STATUS ; turn LED on
mov DPH,#01h ; byte cao c\u1ee7a DPTR
mov DPL,#0AEh ; byte th\u1ea5p c\u1ee7a DPTR
movx a,@DPTR ; \u0111\u1ecdc d\u1eef li\u1ec7u ra t\u1ea1i \u0111\u1ecba ch\u1ec9 01AEH

lcall TxByte
; g\u1eedi byte nh\u1eadn \u0111\u01b0\u1ee3c qua RS232
1.2.Gh\u00e9p n\u1ed1i RS232
T X
V C C
G N D
R X
U 9
M A X 2 3 2
1 3
8
1 1
1 01345
26
1 29
1 4
71 6
1 5
R 1IN
R 2IN
T 1 I N
T 2 I N
C +
C 1-
C 2+
C 2-
V +
V -
R 1O U T
R 2O U T
T1O U T
T2O U T
V C C
G N D
C 6
1 0 u F
C 5
1 0 u F
C 7
1 0 u F
P 1
D B 9
594837261
C 8
1 0 u F

Chu\u1ea9n RS232 l\u00e0 chu\u1ea9n truy\u1ec1n th\u00f4ng c\u1ee7a c\u1ed5ng COM m\u00e1y t\u00ednh. Chu\u1ea9n n\u00e0y truy\u1ec1n d\u1eef li\u1ec7u tr\u00ean \u0111\u01b0\u1eddng d\u00e2y v\u1edbi m\u1ee9c \u0111i\u1ec7n \u00e1p l\u00e0 -3V \u0111\u1ebfn -24V cho m\u1ee9c logic 1 v\u00e0 +3V \u0111\u1ebfn +24V cho m\u1ee9c logic 0. Ch\u00edp chuy\u1ec3n \u0111\u1ed5i MAX232C s\u1ebd l\u00e0m nhi\u1ec7m v\u1ee5 chuy\u1ec3n m\u1ee9c t\u00edn hi\u1ec7u t\u1eeb TTL sang t\u00edn hi\u1ec7u ch\u1ea9n RS232.

S\u01a1 \u0111\u1ed3 n\u00e0y s\u1eed d\u1ee5ng ch\u1ebf \u0111\u1ed9 truy\u1ec1n 2 d\u00e2y Rx,Tx kh\u00f4ng b\u1eaft tay ph\u1ea7n
c\u1ee9ng. C\u00e1p k\u1ebft n\u1ed1i v\u1edbi m\u00e1y t\u00ednh l\u00e0 c\u00e1p th\u1eb3ng \u0111\u1ea5u theo s\u01a1 \u0111\u1ed3 sau:
Sau \u0111\u00e2y l\u00e0 \u0111o\u1ea1n ch\u01b0\u01a1ng tr\u00ecnh kh\u1edfi t\u1ea1o c\u1ed5ng RS232 c\u1ee7a KIT 89C51
mov PSW,#00h ; clear SMOD bit
mov TMOD,#20h
; set timer 1 for auto reload - mode 2

Ch\u00e2n 2 Ch\u00e2n 3 Ch\u00e2n 5

Ch\u00e2n 3 Ch\u00e2n 2 Ch\u00e2n 5

KIT 8051
M\u00e1y t\u00ednh

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