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AT25256-8

AT25256-8

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Published by api-3700809

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Published by: api-3700809 on Oct 14, 2008
Copyright:Attribution Non-commercial

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05/09/2014

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1
8-pin SOIC
1234
8765

CS
SO
WP
GND

VCC
HOLD
SCK
SI

Features

\ue000Serial Peripheral Interface (SPI) Compatible
\u2022Supports SPI Modes 0 (0,0) and 3 (1,1)
\u2022Low-voltage and Standard-voltage Operation

\u2013 2.7 (VCC= 2.7V to 5.5V)
\u2013 1.8 (VCC= 1.8V to 3.6V)

\u20223 MHz Clock Rate
\u202264-byte Page Mode and Byte Write Operation
\u2022Block Write Protection

\u2013 Protect 1/4, 1/2, or Entire Array
\u2022Write Protect (WP) Pin and Write Disable Instructions for
Both Hardware and Software Data Protection
\u2022Self-timed Write Cycle (5 ms Typical)
\u2022High-reliability
\u2013 Endurance: 100,000 Write Cycles
\u2013 Data Retention: >200 Years
\u2022Automotive Grade and Extended Temperature Devices Available
\u20228-pin PDIP, 8-pin EIAJ SOIC, 8-pin and 16-pin JEDEC SOIC, 14-pin and 20-pin TSSOP,
8-pin Leadless Array, and 8-ball dBGA\u2122Packages
Description

The AT25128/256 provides 131,072/262,144 bits of serial electrically-erasable pro- grammable read only memory (EEPROM) organized as 16,384/32,768 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The devices are available in space saving 8-pin PDIP (AT25128/256), 8-pin EIAJ SOIC (AT25128/256), 8-pin and

Rev. 0872H\u2013SEEPR\u201302/02
*Note: Pins 3, 4 and 17, 18 are internally connected for 14-lead TSSOP socket compatibility.
SPI Serial
EEPROMs
128K (16,384 x 8)
256K (32,768 x 8)
AT25128
AT25256
Pin Configurations
Pin Name
Function
CS
Chip Select
SCK
Serial Data Clock
SI
Serial Data Input
SO
Serial Data Output
GND
Ground
VCC
Power Supply
WP
Write Protect
HOLD
Suspends Serial Input
NC
No Connect
DC
Don't Connect
(continued)
20-lead TSSOP*
12345678910

20 19 18 17 16 15 14 13 12 11

NC
CS
SO
SO
NC
NC
WP
GND
DC
NC

NC
VCC
HOLD
HOLD
NC
NC
SCK
SI
DC
NC

8-pin PDIP
1234
8765

CS
SO
WP
GND

VCC
HOLD
SCK
SI

16-pin SOIC
12345678

16 15 14 13 12 11 109

CS
SO
NC
NC
NC
NC
WP
GND

VCC
HOLD
NC
NC
NC
NC
SCK
SI

14-lead TSSOP
1234567

14 13 12 11 1098

CS
SO
NC
NC
NC
WP
GND

VCC
HOLD
NC
NC
NC
SCK
SI

8-pin Leadless Array
Bottom View
1234
8765

VCC
HOLD
SCK
SI

CS
SO
WP
GND

8-ball dBGA
Bottom View

VCC
HOLD
SCK
SI

CS
SO
WP
GND

1234
8765
2
AT25128/256
0872H\u2013SEEPR\u201302/02

16-pin JEDEC SOIC (AT25128), 14-pin TSSOP (AT25128), 20-pin TSSOP (AT25128/256), 8-pin Leadless Array (AT25128/256), and 8-ball dBGA packages. In addition, the entire family is available in 5.0V (4.5V to 5.5V), 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 3.6V) versions.

The AT25128/256 is enabled through the Chip Select pin (CS) and accessed via a 3-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial Clock (SCK). All programming cycles are completely self-timed, and no sep- arate ERASE cycle is required before WRITE.

BLOCK WRITE protection is enabled by programming the status register with top \u00bc, top \u00bd or entire array of write protec- tion. Separate program enable and program disable instructions are provided for additional data protection. Hardware data protection is provided via the WPpin to protect against inadvertent write attempts to the status register. The HOLD pin may be used to suspend any serial communication without resetting the serial sequence.

Block Diagram
Absolute Maximum Ratings*
Operating Temperature.................................. -55\u00b0C to +125\u00b0C
*NOTICE:

Stresses beyond those listed under \u201cAbsolute Maxi-
mum Ratings\u201d may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other condi-
tions beyond those indicated in the operational sec-
tions of this specification is not implied. Exposure to
absolute maximum rating conditions for extended
periods may affect device reliability.

Storage Temperature..................................... -65\u00b0C to +150\u00b0C
Voltage on Any Pin

with Respect to Ground.....................................-1.0V to +7.0V Maximum Operating Voltage.......................................... 6.25V DC Output Current........................................................ 5.0 mA

16384/32768 x 8
3
AT25128/256
0872H\u2013SEEPR\u201302/02
Note:
1. This parameter is characterized and is not 100% tested.
Note:
1. VILand VIHmax are reference only and are not tested.
Pin Capacitance(1)
Applicable over recommended operating range from TA = 25\u00b0C, f = 1.0 MHz, VCC = +5.0V (unless otherwise noted).
Symbol
Test Conditions
Max
Units
Conditions
COUT
Output Capacitance (SO)
8
pF
VOUT = 0V
CIN
Input Capacitance (CS, SCK, SI, WP, HOLD)
6
pF
VIN = 0V
DC Characteristics
Applicable over recommended operating range from TAI = -40\u00b0C to +85\u00b0C, VCC = +1.8V to +5.5V,
TAC= 0\u00b0C to +70\u00b0C, VCC= +1.8V to +5.5V(unless otherwise noted).
Symbol
Parameter
Test Condition
Min
Typ
Max
Units
VCC1
Supply Voltage
1.8
3.6
V
VCC2
Supply Voltage
2.7
5.5
V
VCC3
Supply Voltage
4.5
5.5
V
ICC1
Supply Current
VCC = 5.0V at 1 MHz, SO = Open, Read
2.0
3.0
mA
ICC2
Supply Current
VCC= 5.0V at 2 MHz,
SO = Open, Read, Write
3.0
5.0
mA
ISB1
Standby Current
VCC = 1.8V, CS = VCC
0.1
2.0
\u00b5A
ISB2
Standby Current
VCC = 2.7V, CS = VCC
0.2
2.0
\u00b5A
ISB3
Standby Current
VCC = 5.0V, CS = VCC
2.0
5.0
\u00b5A
IIL
Input Leakage
VIN = 0V to VCC
-3.0
3.0
\u00b5A
IOL
Output Leakage
VIN = 0V to VCC, TAC = 0\u00b0C to 70\u00b0C
-3.0
3.0
\u00b5A
VIL(1)
Input Low-voltage
-1.0
VCC x 0.3
V
VIH(1)
Input High-voltage
VCC x 0.7
VCC + 0.5
V
VOL1
Output Low-voltage
4.5\u2264 VCC\u22645.5V
IOL= 3.0 mA
0.4
V
VOH1
Output High-voltage
IOH = -1.6 mA
VCC - 0.8
V
VOL2
Output Low-voltage
1.8V\u2264 VCC\u22643.6V
IOL= 0.15 mA
0.2
V
VOH2
Output High-voltage
IOH = -100 \u00b5A
VCC - 0.2
V

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