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Table Of Contents

Overview of the Talus Platform
1.Overview of the Talus Platform
Differentiating Talus Flows
Automated Chip Creation Flow Considerations
Flat Flow Considerations
2.Talus Design Flat Flow
Before You Start: Importing Libraries and RTL
Setting Variables
Importing the Library
Setting RTL Configurations
Understanding Compatible RTL Coding
Importing RTL into Talus
Import RTL Directories
Elaborating the Design
fix rtl
fix netlist
Configuring Area Optimization Settings
Using Distributed Processing
Configuring fix netlist for Third-Party Tools
Talus Design Flat Flow Using DFT in the Talus Design Flow
Using DFT in the Talus Design Flow
fix time
Preparing to Use fix time
Using Multiprocessing
Setting fix time Options
fix time Examples
Quality of Results Improvements
Checking fix time Results
fix plan
Reusing Floorplans
Configuring the fix plan Command
Primary Floorplan and Inner Shape Creation
Power Domain Creation
Power and Ground Creation
Cover Macro Creation
Pad and Pin Placement
Macro Placement
Halo Specifications
fix power
Preparing to Use fix power
Configuring fix power
Defining Power Requirements Manually
Defining Power Requirements Automatically
Defining Power Requirements With Scripts
Defining Additional Requirements
Defining Power Structure Names
fix power Example
Checking fix power Results
Talus Power
Quartz Rail
fix cell
Preparing fix cell
Configuring fix cell
fix cell Example
Checking fix cell Results
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Talus Design

Talus Design

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Published by fredkumar

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Published by: fredkumar on Oct 09, 2011
Copyright:Attribution Non-commercial

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07/22/2013

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