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NTC-SDR-128M-F-R13

NTC-SDR-128M-F-R13

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Published by Guillermo Hernandez

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Published by: Guillermo Hernandez on Oct 19, 2011
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NT5SV8M16FS / NT5SV8M16FT
128Mb Synchronous DRAM
1
REV 1.3 
9/2008
©
NANYA TECHNOLOGY CORPORATION
NANYA reserves the right to change products and specifications without notice.
Features
High Performance:Single Pulsed RAS InterfaceFully Synchronous to Positive Clock EdgeFour Banks controlled by BA0/BA1 (Bank Select)Programmable CAS Latency: 2, 3Programmable Burst Length: 1, 2, 4, 8 or full pageProgrammable Wrap: Sequential or InterleaveMultiple Burst Read with Single Write OptionAutomatic and Controlled Precharge CommandDual Data Mask for byte control (x16)Auto Refresh (CBR) and Self RefreshSuspend Mode and Power Down ModeStandard Power operationRandom Column Address every CK (1-N Rule)Single Power Supply, either 3.3VLVTTL compatiblePackages:TSOP-Type IILead-free & Halogen-free product available
Description
The NT5SV8M16FS, and NT5SV8M16FT are four-bank Syn-chronous DRAMs organized as 2Mbit x 16 I/O x 4 Bank.These synchronous devices achieve high-speed data trans-fer rates of up to 166MHz by employing a pipeline chip archi-tecture that synchronizes the output data to a system clock.The device is designed to comply with all JEDEC standardsset for synchronous DRAM products, both electrically andmechanically. All of the control, address, and data input/out-put (I/O or DQ) circuits are synchronized with the positiveedge of an externally supplied clock.RAS, CAS, WE, and CS are pulsed signals which are exam-ined at the positive edge of each externally applied clock(CK). Internal chip operating modes are defined by combina-tions of these signals and a command decoder initiates thenecessary timings for each operation. A fifteen bit addressbus accepts address data in the conventional RAS/CAS mul-tiplexing style. Twelve addresses (A0-A11) and two bankselect addresses (BA0, BA1) are strobed with RAS. Nine col-umn addresses (A0-A8) plus bank select addresses and A10are strobed with CAS.Prior to any access operation, the CAS latency, burst length,and burst sequence must be programmed into the device byaddress inputs A0-A11, BA0, BA1 during a mode register setcycle. In addition, it is possible to program a multiple burstsequence with single write cycle for write through cacheoperation.Operating the four memory banks in an interleave fashionallows random access operation to occur at a higher ratethan is possible with standard DRAMs. A sequential and gap-less data rate of up to 166MHz is possible depending onburst length, CAS latency, and speed grade of the device.Auto Refresh (CBR) and Self Refresh operation are sup-ported.
Maximum Operating SpeedCASLatencyPC166(6K/6KI)PC133(75B/75BI)
2
7.510ns
3
67.5ns
 
NT5SV8M16FS / NT5SV8M16FT
128Mb Synchronous DRAM
REV 1.3 
9/2008
2
©
NANYA TECHNOLOGY CORPORATION
NANYA reserves the right to change products and specifications without notice.
Nanya Technology CorporationHwa Ya Technology Park 669Fu Hsing 3rd Rd., Kueishan,Taoyuan, 333, Taiwan, R.O.C.Tel: +886-3-328-1688
Please visit our home page for more information: www.nanya.com
Ordering Information
OrganizationPart NumberPackagePowerSpeed GradeClock FrequencyCL
-
t
RCD
-
t
RP
Notes
8M x 16NT5SV8M16FS-6K400mil 54-PINTSOP IILead-Free3.3V166MHz-3-3-3Lead free packagingNT5SV8M16FS-6KILead free packagingNT5SV8M16FS-75B133MHz-3-3-3Lead free packagingNT5SV8M16FS-75BILead free packagingNT5SV8M16FT-6K400mil 54-PINTSOP II166MHz-3-3-3NT5SV8M16FT-6KINT5SV8M16FT-75B133MHz-3-3-3NT5SV8M16FT-75BICL = CAS LatencyLead-free products are also halogen-free
 
NT5SV8M16FS / NT5SV8M16FT
128Mb Synchronous DRAM
REV 1.3 
9/2008
3
 © 
 
NANYA TECHNOLOGY CORPORATION
NANYA reserves the right to change products and specifications without notice.
Pin Configuration - 54 pins 400 mill TSOPII Package
<Top View >
54-pin Plastic TSOP(II) 400 mil
1234569101112131478151617181920212254535251504946454443424148474039383736353433V
DD
DQ0V
DDQ
DQ1DQ2V
SSQ
V
DDQ
DQ5DQ6V
SSQ
DQ7V
DD
DQ3DQ4LDQMWECASRASCSBA0BA1V
SS
DQ15V
SSQ
DQ14DQ13V
DDQ
V
SSQ
DQ10DQ9V
DDQ
DQ8V
SS
DQ12DQ11NCUDQMCKCKENCA11A9232425323130A10/APA0A1A2A8A7A6A526272928A3V
DD
A4V
SS

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