###############################################################

# Generated by:
Cadence First Encounter 08.10-p004_1
# OS:
Linux i686(Host ID 192.168.1.222)
# Generated on:
Fri Oct 8 18:45:15 2010
# Command:
checkDesign -all -noHtml -outfile design.txt
###############################################################
------ Design Summary:
Total Standard Cell Number
Total Block Cell Number
Total I/O Pad Cell Number
Total Standard Cell Area
Total Block Cell Area
Total I/O Pad Cell Area

(cells)
(cells)
(cells)
( um^2)
( um^2)
( um^2)

:
:
:
:
:
:

11235
6
136
1576666.00
3623999.82
5736880.80

==============================
Design Stats
==============================
-----------------------------Cells in design
-----------------------------gpio_padA
gpio_padB_2946
gpio_padB_2958
gpio_padB_2970
gpio_padB_2982
gpio_padB_2994
gpio_padB_3006
gpio_padB_3018
gpio_padA_2862
gpio_padA_2874
gpio_padA_2886
gpio_padA_2898
gpio_padA_2910
gpio_padA_2922
gpio_padA_2934
gpio_padB
reset_sinc
reset_gen
add_unsigned
jtbl
wrapper
jbc_jpc_width11
bcfetch_jpc_width11_pc_width11
decode_i_width10
add_signed
add_signed_327
rom_width12_addr_width11
fetch_pc_width11_i_width10
add_unsigned_1455_6000
add_unsigned_1455
add_unsigned_768
shift_width32
xram_init_width32_addr_width8
ram_width32_addr_width8
addsub_signed_653
stack_width32_jpc_width11
core_jpc_width11_width32_pc_width11_i_width10
add_unsigned_4738

geq_unsigned
geq_unsigned_5937
geq_unsigned_5938
add_unsigned_357
add_unsigned_357_5945
lt_unsigned
lt_unsigned_5939
add_unsigned_2903
add_unsigned_2907_5893
add_unsigned_2907_5894
add_unsigned_2907_5895
add_unsigned_2907
add_unsigned_2897_5896
add_unsigned_2897_5897
add_unsigned_2897_5898
add_unsigned_2897_5899
add_unsigned_2897_5900
add_unsigned_2897_5901
add_unsigned_2897_5902
add_unsigned_2897
add_unsigned_2903_5892
leq_unsigned_5919
leq_unsigned_5920
leq_unsigned_5921
leq_unsigned_5922
leq_unsigned_5923
leq_unsigned_5924
leq_unsigned
leq_unsigned_2877_5925
leq_unsigned_2877_5926
leq_unsigned_2877_5927
leq_unsigned_2877
leq_unsigned_2889_5928
leq_unsigned_2889
leq_unsigned_2895
leq_unsigned_5918
cache_jpc_width11_block_bits4
ocache_size_bits2
sub_unsigned_4798
mem_sc_jpc_width11_block_bits4
add_unsigned_6540
add_unsigned_6544
mul_width32
jopcpu_jpc_width11_block_bits4_spm_width0
sc_gpio_addr_bits4
intstate
intstate_2009
intstate_2020
increment_unsigned_843
increment_unsigned_843_5998
sc_sys_addr_bits4_cpu_id0_cpu_cnt1_num_io_int2
fifo_elem_width8_2255
fifo_elem_width8_2275
fifo_width8_depth2_thres1_2254
fifo_elem_width8
fifo_elem_width8_2234
fifo_width8_depth2_thres1
sc_uart_addr_bits4_txf_depth2_txf_thres1_rxf_depth2_rxf_thres1
scio_cpu_id0_cpu_cnt1
lt_unsigned_8268

sc_mem_if_ram_ws3_rom_ws14_addr_bits19
jop_ram_cnt4_rom_cnt15_jpc_width11_block_bits4_spm_width0
mem_access
reg_ocds
ocds
tap_top
soc_ram_cnt4_rom_cnt15_jpc_width11_block_bits4_spm_width0
Design Name soc_chip
Number Of Components 105
==============================
Physical Library(LEF) Integrity Check
==============================
-----------------------------Cell dimensions not interger multiple of its site
-----------------------------Cell Cell Dimension Site Dimension
IOCORNP 424200 424200 11200 424200
IOCORNCLMRP 424200 424200 11200 424200
IOCORNCLMP 424200 424200 11200 424200
Cells with missing LEF 0
Cells with missing PG PIN 0
Cells with missing dimension 0
Cells dimesions not multiple integer of site 3
Cells pin with missing direction: 0
Cells pin with missing geometry: 0
Cells PG Pins with missing geometry: 0
==============================
Timing information check
==============================
Cells with missing Timing data: 0
==============================
SPEF Coverage
==============================
Annotation to Verilog Netlist: 100%
Annotation to Physical Netlist: 100%
==============================
Top level netlist Check
==============================
Ports Connect to Core Cells: 0
Ports Connect to multiple Pads: 0
Floating Ports: 0
==============================
Instance Pin Check
==============================
Output pins connected to Power Ground net 0
Floating Instance terminals 0
Floating IO terms 0
Tie Hi/Lo output terms floating 0
Output term shorted to Power Ground net 0
==============================
Multiple driven netlist Check
==============================
-----------------------------Undriven Net

-----------------------------soc/jop/FE_UNCONNECTED_0
soc/jop/FE_UNCONNECTED_1
soc/jop/FE_UNCONNECTED_2
soc/jop/FE_UNCONNECTED_3
soc/jop/FE_UNCONNECTED_4
soc/jop/FE_UNCONNECTED_5
soc/jop/FE_UNCONNECTED_6
soc/jop/FE_UNCONNECTED_7
soc/jop/FE_UNCONNECTED_8
soc/jop/FE_UNCONNECTED_9
soc/jop/FE_UNCONNECTED_10
soc/jop/FE_UNCONNECTED_11
soc/jop/FE_UNCONNECTED_12
soc/jop/FE_UNCONNECTED_13
soc/jop/FE_UNCONNECTED_14
soc/jop/FE_UNCONNECTED_15
soc/jop/cpu/core/FE_OFN292_stack_tos_0_
soc/jop/cpu/core/FE_OFN315_stack_tos_5_
soc/jop/cpu/core/FE_OFN316_stack_tos_5_
soc/jop/cpu/core/stk/stkram/FE_UNCONNECTED_0
soc/jop/cpu/core/stk/stkram/FE_UNCONNECTED_1
soc/jop/cpu/core/stk/stkram/FE_UNCONNECTED_2
soc/jop/cpu/core/stk/stkram/FE_UNCONNECTED_3
soc/jop/cpu/core/stk/stkram/FE_UNCONNECTED_4
soc/jop/cpu/core/stk/stkram/FE_UNCONNECTED_5
soc/jop/cpu/core/stk/stkram/FE_UNCONNECTED_6
soc/jop/io/FE_PT0_
soc/jop/io/FE_UNCONNECTED_2
soc/jop/scm/FE_PT1__sc_mem_in_rdy_cnt__0__
Multiple driven nets 0
Undriven nets 29
Parallel Driving nets: 0
Tristate Driving nets: 48
Output Floating nets(No FanOut): 133
Hign Fanout nets (>50): 20
==============================
Sub Module Port Definition Check
==============================
Tie Hi/Lo instances connected to output: 0
Verilog output port connected to outside driver: 0
==============================
Dont use cells used in design
==============================
-----------------------------Dont use cells in design
-----------------------------ROM2048X12
DPRAM512X8
DPRAM256X32
VDDALLP
IOIBFILL1P
IOCORNCLMP
GNDALLP
A_ICP
A_ICHDP
A_BT6H2P
A_BBC6H2P

FEEDCAP5
Dont use cells in design 12
==============================
I/O Pin Check
==============================
Unplaced I/O Pins: 0
Floating I/O Pins: 0
I/O Pins connected to Non-IO Insts: 0
==============================
Unplaced IO Pads
==============================
Unplaced I/O Pads: 0
==============================
Power Ground Nets
==============================
GND : Routed
CLAMPC : Unrouted
VDD : Routed
==============================
Power/Ground pin connectivity
==============================
Floating Power Ground terms 0
Power/Ground pins connected to non Power/Ground net 0
Power pin connected to Ground net 0
Ground pin connected to Power net 0
1) Number of error=0 & warning=0.
==============================
Top level Floorplan Check
==============================
Off-Grid Horizontal Tracks: 0
Off-Grid Vertical Tracks: 0
Placement grid on Mfg. grid: FALSE
User grid a multiple of Mfg. grid: FALSE
User grid a multiple of Mfg. grid: FALSE
Core Row grid not a multiple of Mfg. grid: 0
Horizontal GCell Grid off Mfg. grid: 0
Vertical GCell Grid off Mfg. grid: 0
AreaIO rows not on core-grid: 0
BlackBoxes Off Mfg. Grid: 0
Blocks Off Mfg. Grid: 0
BlackBoxes Off placement Grid: 0
Blocks off placement Grid: 0
Instances not snapped to row site: 0
Instances not on Mfg. Grid: 0
PrePlaced hard-macro pins not on routing grid: 0
-----------------------------Unplaced Io Pins
-----------------------------clk
reset
ser_txd
ser_rxd
wd
sram_addr[18]
sram_addr[17]

sram_addr[16]
sram_addr[15]
sram_addr[14]
sram_addr[13]
sram_addr[12]
sram_addr[11]
sram_addr[10]
sram_addr[9]
sram_addr[8]
sram_addr[7]
sram_addr[6]
sram_addr[5]
sram_addr[4]
sram_addr[3]
sram_addr[2]
sram_addr[1]
sram_addr[0]
sram_we_n
sram_oe_n
sram_data[31]
sram_data[30]
sram_data[29]
sram_data[28]
sram_data[27]
sram_data[26]
sram_data[25]
sram_data[24]
sram_data[23]
sram_data[22]
sram_data[21]
sram_data[20]
sram_data[19]
sram_data[18]
sram_data[17]
sram_data[16]
sram_data[15]
sram_data[14]
sram_data[13]
sram_data[12]
sram_data[11]
sram_data[10]
sram_data[9]
sram_data[8]
sram_data[7]
sram_data[6]
sram_data[5]
sram_data[4]
sram_data[3]
sram_data[2]
sram_data[1]
sram_data[0]
sram_ncs
flash_ncs
jtag_trst
jtag_tdi
jtag_tms
jtag_tck
jtag_tdo
gpio[16]
gpio[15]

gpio[14]
gpio[13]
gpio[12]
gpio[11]
gpio[10]
gpio[9]
gpio[8]
gpio[7]
gpio[6]
gpio[5]
gpio[4]
gpio[3]
gpio[2]
gpio[1]
Floating/Unconnected IO Pins 0
Unplaced Io Pins 81
IO Pin off Mfg. grid: 0
IO Pin outside Die area: 0
Overlapping IO pins: 0
IO Pin off track: 0
Modules with off-grid Constraints: 0
Groups with off-grid Constraints: 0
Floating/Unconnected Ptn Pins: 0
Partition Pin off M. Grid: 0
Unplaced Partition Pins: 0
Partition Pin outside Partition box: 0
Overlapping Partition Pins: 0
Partition Pin Off-Track: 0
PartitionPower Domain off Grid: 0
PreRoute not on Mfg. grid: 0
Off Track Pre-Routes: 0
Off Grid Power/Ground Pre-routes: 0