Implementation of Industrial Process Controller Using Lab VIEW 7.1(July 2005 to February
In this project we have tried to control the production operations of an industrial (PASUPATI
ACRYLON LTD, Moradabad) process that deals with the manufacturing of acrylic fiber.
The project adds significant flexibility and customization to the industrial control hardware and
deals with the use of the integrated Lab VIEW environment to interface with real-world signals.
This project is aimed at generation of E3 framed data, which is used in synchronous serial transmission of data via telephone lines using TDM. The E3 transmitter is developed and tested functionally by coding and testing using test bench in VHDL.
A Digital Alarm Clock, which can display current time, load new time, set alarm time and Sound alarm, was implemented in Verilog HDL. The design was implemented using a Finite State Machine (FSM) to control the operations of the clock. Test benches were written and the functionality was verified.
The arbiter is to control the access of three processors connected to same SRAM. The testing of
arbiter comprises of generation of constrained random test vectors and checking complete
functional coverage using cover property and assert property by using System Verilog for
complete assertion based verification of the arbiter using Questa-Sim.
The front end project I undertook in Sandeepani is the design and implementation of complete
data path and control unit of Pico processor ISA which comprises of 34 instructions. I designed
the complete control unit base on FSM approach which inculcates the multi cycle
implementation. The longest cycle comprises of 5 clock cycles. The complete design and
verification is done usingVHDL.Modelsim simulator is used for the functional verification of
the design and Leonardo Spectrum is used for the synthesizing the RTL from VHDL code.
Then the complete design is implemented on Spartan 3 board by doing the place and route on
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