voltage regulation controls for paralleled digital signal processor- based soft switching-mode rectifiers (SSMRs). First, the design and implementation of single-module SSMRs are made. In dealing with the current control loop design of each SSMR module, the small- signal model is derived and used to design the current-controlled pulse-width modulation (PWM) scheme. As to the common voltage control loop, its dynamic model is estimated from measurements. Then, a quantitative design procedure is developed to find the pa- rameters of the voltage controller according to the prescribed con- trol specifications. As the changes of parallel number and oper- ating condition occur, the robust control is added to reduce the voltage regulation control performance degradation.
The proposed multimodule operation control scheme consists of a master controller and N slave controllers. The former further consists of a common voltage controller and a current distribu- tion unit, and the latter are the current-controlled PWM schemes of all SSMRs. Each slave controller receives the weighted sinu- soidal current command from the master controller and regulates the feedback current of SSMR. The results confirm that the de- signed parallel SSMR system possesses good line drawn current power quality, module current sharing and voltage regulation con- trol performances.
build up dc-link voltage from utility grid for the followed power converter stage. By applying power factor correction (PFC) control, the SMR can be controlled to have good line drawn current power quality and well-regulated dc output voltage. Among the existing SMRs , the boost-type one is the easiest to perform line current waveform shaping control. By applying soft-switching techniques \u2013, the switching stresses, switching losses and electromagnetic interference (EMI) yielded by the SMR can be significantly reduced.
As generally recognized, sophisticated current and voltage controls are indispensable for yielding satisfactory power conditioning control performance for a SMR. Although analog control \u2013 is simple and fast, its flexibility in control law adaptation is low. Digital control possesses many advantages, such as without offset and drift effects, having high flexibility in changing controller structure and parameters, and easy to
Manuscript received December 3, 2002; revised September 9, 2003. This work was supported by Delta Electronics, Inc., Chungli, Taiwan, R.O.C. Rec- ommended by Associate Editor P. K. Jain.
perform the adaptive and compensation controls. Due to the great progress made in microcontrollers, digital control has been gradually employed in power supplies ,  and SMRs \u2013. Recently, some specifically designed digital signal processors (DSPs), which are embedded with pulse-width mod- ulation (PWM) modulator , can further facilitate the digital realization of controllers. However, proper considerations in performing digital control should be made to yield performance being comparable to those of analog controllers .
1) the converters can be designed in modular fashion, and thus the system power capacity can be enlarged more easily;
3) with proper operation control management, the overall power conversion efficiency and the life of converter module can be increased.
During the past decades, a lot of researches concerning the par- allel operation control of various kinds of converters have been made by many authors \u2013, and a detailed survey can be referred to . Basically, the parallel current sharing control can be categorized into two groups, namely the droop method and the active current sharing method. And according to the con- troller structure and current-programming approach, the latter can further be classified into many configurations, each one has its merits and limitations. As generally recognized, the in- dividual converter with current-mode control is easier to per- form current sharing control in parallel operation . As far as the control scheme realization issue is concerned, it can be performed via analog, hybrid or fully digital fashion.
Although some parallel operation control methods of SMRs have been made , , the dynamic modeling, quantita- tive and robust controller design and fully digital control using DSP for parallel SSMRs are still seldom performed till now. In this paper, the digital parallel operation control with quan- titative and robust control performance of multimodule paral- leled single-phase SSMR system is studied. The proposed par- allel operation control scheme consists of a master controller and n slave controllers. The former further consists of a common voltage control loop and a current distribution unit (CDU), and the n slave controllers are basically the current-controlled PWM schemes of the SSMRs to be parallel connected.
In this paper, the single-module SSMRs and their switching schemes are first designed and implemented. For each module, the dynamic model of its current-loop is derived, and then the frequency response method is used to design the current-con- trolled PWM scheme. As to the design of common voltage
controller, the dynamic model is estimated from measurements . Then the governing equations relating to the controller parameters and control specifications are derived, and they are employed to find the controller parameters systematically and quantitatively. As the changes of paralleled module number and system parameters occur, a simple robust controller is further added to reduce the performance degradation. The voltage controller and the current-controlled PWM schemes are all realized in an ADMC401 DSP-based control environment, wherein the PWM switching signals are generated directly from the DSP.
Configuration of the proposed DSP-based paralleled SSMR system is shown in Fig. 1, the power circuits of all SSMRs are connected in parallel with the features of common input ac source and common load bus. The control system is cas- cade arrangement with all its constituted parts being realized using the ADMC401 DSP manufactured by Analog Devices Company. Due to the close current tracking control possessed by the individual SSMR, good current sharing control perfor- mance under well-regulated output voltage can be yielded by the system shown in Fig. 1, which is briefly described as follows.
The master controller consists of a common voltage control loop and a current distribution unit. The voltage controller yields a current magnitude commandthrough regulating the voltage tracking error. Then by multiplying
, ac- cording to the ratings of SSMR modules, the parallel operation of SSMRs with different ratings becomes possible.
Thanks to the great progress made in the DSP development in the past years, the computation and signal processing capa- bilities of an DSP have been significantly improved. Moreover, some specifically designed DSPs are equipped with embedded PWM modulators. These significantly facilitate the fully digital realization of control system. Accordingly, the slave controllers of the proposed parallel control scheme contain the current controllers and the soft-switching signal generating schemes of all SSMR modules. In each slave controller, its line input current
SSMR are generated and directly outputted from the PWM modulator embedded in the DSP.
The power circuit and its current-controlled PWM scheme with ZVT soft-switching of each SSMR module are shown in Fig. 2(a) and (b), respectively. For concision, the subscripts of all variables in Fig. 2(a) and (b) for identifying the number of module are neglected. Detailed description about the design of
The digital control law design approaches can be roughly classified into the redesign and direct digital design. For a DSP- based digital control system, its response behavior will be very close to those yielded by analog control due to high sampling rate. And moreover, the derivations in making the controller analysis and design are easier to do in continuous domain. If fol- lows that the redesign approach is employed here to perform the controller design. The bilinear transformation method is applied to perform the model transformation, and the sampling rates for the current and voltage control loops are chosen to be 30 kHz and 300 Hz, respectively.
). The soft switching of the main switch is ob- tained by employing the zero voltage transition (ZVT) technique . This is achieved by slightly delaying the turn-on instant of the PWM switching signal for the main switch. The generation of switching signals for the main and auxiliary switches of the single-module SSMR is illustrated in Fig. 2(b).
V is assumed. The design and implementation of the cir- cuit and control scheme of this SSMR are briefly described as followed.
operate in continuous conduction mode owing to its many ad- vantages, and the ramp-comparison current-controlled PWM scheme is employed. In performing the design, it is assumed that the line current is regulated to be sinusoidal and kept in phase with the input voltage. Accordingly, the maximum amplitude of the input current
) is 140 V, the maximum duty ratio can be found by neglecting the diode voltage drop to be
A, and their maximum voltage is 300 V. Accordingly, the power MOSFET IRFP460 and the fast diode RURP3060 are chosen for the main switchand the diode , respectively.
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