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INSTITUT FR INFORMATIK
COMPUTER ARCHITECTURE
Lecture 9
CA - IX - MCU - 1
Microprogramming is an orderly method of designing the control unit of a conventional computer (Wilkes 1951). The term icroprogramming is based on the analogy between sequence of transfer required to execute a machine instruction and the sequence of individual instructions in conventional user program.
Each step is called microinstruction and complete set of steps required to process a machine instruction is called the microprogram.
CA - IX - MCU - 2
Decoder
Control sequence for execution of the instruction "Add contents of a memory location addressed in absolute mode to register R1." Step Action 1 2 3 4 5 6 7 PCout, MARin, Read, Clear Y, Set carry-in to ALU, Add, Zin Zout, PCin, Wait for MFC MDRout, IRin Address-field-of-IRout, MARin, Read R1out, Yin, Wait for MFC MDRout , Add, Zin Zout , R1in, End
Control sequence for an unconditional branch instruction. Step Action 1 2 3 4 5 6 PCout, MARin, Read, Clear Y, Set carry-in to ALU, Add, Zin Zout, PCin, Wait for MFC MDRout, IRin PCout, Yin Address-field-of-IRout , Add, Zin Zout , PCin, End
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MICROCODE EXECUTION
1. Op-code is decoded. 2. Microinstructions are retrieved from control memory (control address register and the decoder serve as the address register and selection mechanism or control unit). 3. The control address register locates the microinstruction to be retrieved from control memory. 4. The microinstruction register holds the retrieved microinstruction - micro opcode and address of the next microinstruction in the control memory 5. Current microinstruction is executed. 6. The address of the next microinstruction is entered into the control memory to retrieve the next microinstruction. 7. If all microinstructions were executed, then store next op-code of conventional instruction in the control address register, if not, execute remaining microinstruction. 8. Conditional jumps are implemented by letting the states of some conditional flip-flops modify the address of the next microinstruction to be retrieved. CA - IX - MCU - 5
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CA - IX - MCU - 7
PC 8
Condition select
Control signals
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Control lines
2) Some encoding
0
Control fields 1
Decoder 0
Decoder 2
3) Complete encoding
Single control field
Nanodata's Computer
Bus 1 Bus 2 Bus 3 Shifter Main memory (256 x 18 bits) Main ALU Bus 1 Bus 5 Bus 6 Bus 7 Bus 10 Bus 8 Bus 9
I/O devices
Bus 12
Control signals
Bus 11
NSDR
360
Control memory 2 (nano store) Branch address
10
10
nPC
Nanoprogram counter
Page address
7
CA - IX - MCU - 11
Unused 56
60
Parity of bits 32 to 55 61 65 68
= Control fields
Unused
CM addressing information
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750 (6Kx80)
400
65 (2.75Kx87) 50 (2.75Kx85)
100
80
100
SUMMARIZING
Next address of microcode execution may be specified by: 1) Address field of the current microinstruction 2) PC (microprogam counter) 3) Address from address control store
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HARDWARE
FIRMWARE
SOFTWARE
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CA - IX - MCU - 17
unpacked decoder
PROM
ERROM
EAROM
Technology