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La diferencia de voltajes de referencia V1-V2 es conocida como histéresis
El diseño deseado se muestra a continuación:
Los eventos señalados ocurren de la siguiente manera:
En el transcurso del tiempo Tref:
En el transcurso del tiempo Tx:
Tx = (Tref/Iref)Ix = kIx
Kp = (V0 - 0)/(π - 0)
BER = (9/126)x100 = 7.14 %
M = (Salida "A igual a B") = A · B + AB
K = (Salida "A mayor que B") = AB
M1 = [Salida 'A1 igual a B1' del primer comparador] = A1B1 + A1B1
M2 = [Salida 'A2 igual a B2' del segundo comparador] = A2B2 + A2B2
K1 = [Salida 'A1 mayor que B1' del primer comparador] = A1B1
K2 = [Salida 'A2 mayor que B2' del segundo comparador] = A2B2
M = Salida 'A igual a B'
M = (A1B1 + A1B1)(A2B2 + A2B2)
K = Salida 'A mayor que B'
K = K1(A2B2 + A2B2) + K2A1 + K2A1
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PROBLEMA compuertas logicas

PROBLEMA compuertas logicas

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Published by Susy Deysi Talavera

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Published by: Susy Deysi Talavera on Nov 14, 2011
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07/13/2013

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