ON Semiconductort

1.5 A Adjustable Output, Positive Voltage Regulator

The LM317 is an adjustable 3terminal positive voltage regulator capable of supplying in excess of 1.5 A over an output voltage range of 1.2 V to 37 V. This voltage regulator is exceptionally easy to use and requires only two external resistors to set the output voltage. Further, it employs internal current limiting, thermal shutdown and safe area compensation, making it essentially blowout proof. The LM317 serves a wide variety of applications including local, on card regulation. This device can also be used to make a programmable output regulator, or by connecting a fixed resistor between the adjustment and output, the LM317 can be used as a precision current regulator. Output Current in Excess of 1.5 A Output Adjustable between 1.2 V and 37 V Internal Thermal Overload Protection Internal Short Circuit Current Limiting Constant with Temperature Output Transistor SafeArea Compensation Floating Operation for High Voltage Applications Available in Surface Mount D2PAK, and Standard 3Lead Transistor Package Eliminates Stocking many Fixed Voltages

LM317
THREETERMINAL ADJUSTABLE POSITIVE VOLTAGE REGULATOR
SEMICONDUCTOR TECHNICAL DATA

T SUFFIX PLASTIC PACKAGE CASE 221A Heatsink surface connected to Pin 2.

1 2 3

Pin 1. Adjust 2. Vout 3. Vin

Standard Application
Vin LM317 Vout R1 240 Adjust + C ** O 1.0 F

D2T SUFFIX PLASTIC PACKAGE CASE 936 (D2PAK)

2 3

IAdj Cin* 0.1 F

Heatsink surface (shown as terminal 4 in case outline drawing) is connected to Pin 2.

R2

ORDERING INFORMATION
Device LM317BD2T ** Cin is required if regulator is located an appreciable distance from power supply filter. ** CO is not needed for stability, however, it does improve transient response. V out + 1.25 V 1 ) R2 R1 ) I R Adj 2 LM317BT LM317D2T LM317T TJ = 0 to +125C Operating Temperature Range TJ = 40 to +125C Package Surface Mount Insertion Mount Surface Mount Insertion Mount

Since IAdj is controlled to less than 100 A, the error associated with this term is negligible in most applications.

Semiconductor Components Industries, LLC, 2002

January, 2002 Rev. 3

Publication Order Number: LM317/D

LM317
MAXIMUM RATINGS
Rating InputOutput Voltage Differential Power Dissipation Case 221A TA = +25C Thermal Resistance, JunctiontoAmbient Thermal Resistance, JunctiontoCase Case 936 (D2PAK) TA = +25C Thermal Resistance, JunctiontoAmbient Thermal Resistance, JunctiontoCase Operating Junction Temperature Range Storage Temperature Range Symbol VIVO Value 40 Unit Vdc

PD JA JC PD JA JC TJ Tstg

Internally Limited 65 5.0 Internally Limited 70 5.0 40 to +125 65 to +150

W C/W C/W W C/W C/W C C

ELECTRICAL CHARACTERISTICS (VIVO = 5.0 V; IO = 0.5 A for D2T and T packages; TJ = Tlow to Thigh [Note 1]; Imax and Pmax
[Note 2]; unless otherwise noted.) Characteristics Line Regulation (Note 3), TA = +25C, 3.0 V VIVO 40 V Load Regulation (Note 3), TA = +25C, 10 mA IO Imax VO 5.0 V VO 5.0 V Thermal Regulation, TA = +25C (Note 6), 20 ms Pulse Adjustment Pin Current Adjustment Pin Current Change, 2.5 V VIVO 40 V, 10 mA IL Imax, PD Pmax Reference Voltage, 3.0 V VIVO 40 V, 10 mA IO Imax, PD Pmax Line Regulation (Note 3), 3.0 V VIVO 40 V Load Regulation (Note 3), 10 mA IO Imax VO 5.0 V VO 5.0 V Temperature Stability (Tlow TJ Thigh) Minimum Load Current to Maintain Regulation (VIVO = 40 V) Maximum Output Current VIVO 15 V, PD Pmax, T Package VIVO = 40 V, PD Pmax, TA = +25C, T Package RMS Noise, % of VO, TA = +25C, 10 Hz f 10 kHz Ripple Rejection, VO = 10 V, f = 120 Hz (Note 4) Without CAdj CAdj = 10 F LongTerm Stability, TJ = Thigh (Note 5), TA = +25C for Endpoint Measurements Thermal Resistance Junction to Case, T Package 4 3 1, 2 3 1 2 Figure 1 2 Symbol Regline Regload Regtherm IAdj IAdj Vref Regline Regload 3 3 3 TS ILmin Imax 1.5 0.15 N RR 66 3 S RJC 65 80 0.3 5.0 1.0 %/1.0 k Hrs. C/W 2.2 0.4 0.003 % VO dB 20 0.3 0.7 3.5 70 1.5 10 mV % VO % VO mA A 1.2 5.0 0.1 0.03 50 0.2 1.25 0.02 25 0.5 0.07 100 5.0 1.3 0.07 mV % VO % VO/W A A V %V Min Typ 0.01 Max 0.04 Unit %/V

NOTES: 1. Tlow to Thigh = 0 to +125C, for LM317T, D2T. Tlow to Thigh = 40 to +125C, for LM317BT, BD2T. 2. Imax = 1.5 A, Pmax = 20 W 3. Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used. 4. CAdj, when used, is connected between the adjustment pin and ground. 5. Since LongTerm Stability cannot be measured on each device before shipment, this specification is an engineering estimate of average stability from lot to lot. 6. Power dissipation within an IC voltage regulator produces a temperature gradient on the die, affecting individual IC components on the die. These effects can be minimized by proper integrated circuit design and layout techniques. Thermal Regulation is the effect of these temperature gradients on the output voltage and is expressed in percentage of output change per watt of power change in a specified time.

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LM317
Representative Schematic Diagram
Vin 6.3V 170 6.7k 125k 135 12.4k 12k 5.0pF 6.8k 510 160 200 13k 6.3V

31 0

310

230

120

5.6k

30 pF 6.3V 190 3.6k 5.8k 110 5.1k

30 pF

2.4k 12.5k

105 4.0 0.1 Vout Adjust

This device contains 29 active transistors.

VCC * VIH VIL Vin * Pulse testing required. * 1% Duty Cycle * is suggested. LM317 Adjust Cin 0.1 F IAdj R2 1% Line Regulation (% V) + Vout |V V | OH OL x 100 |V | OL VOH VOL

R1

240 1%

CO

1.0 F

RL

Figure 1. Line Regulation and IAdj/Line Test Circuit

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LM317
VI Vin LM317 Vout IL RL (max Load) + * 1.0 F VO (min Load) VO (max Load) RL (min Load)

Adjust Cin 0.1 F IAdj

R1

240 1% CO

R2 1%

* Pulse testing required. * 1% Duty Cycle is suggested.

Load Regulation (mV) = VO (min Load) - VO (max Load)

Load Regulation (% VO) =

VO (min Load) - VO (max Load) VO (min Load)

x 100

Figure 2. Load Regulation and IAdj/Load Test Circuit

Vin

LM317

Vout

IL

Adjust VI Cin 0.1 F IAdj R1

240 1%

Vref CO + 1.0 F

RL VO

ISET R2 1% * Pulse testing required. * 1% Duty Cycle is suggested. To Calculate R2: Vout = ISET R2 + 1.250 V To Calculate R2: Assume ISET = 5.25 mA

Figure 3. Standard Test Circuit

24 V 14 V f = 120 Hz Vin LM317 Vout

Adjust Cin 0.1 F

R1

240 1%

D1* 1N4002 CO + 1.0 F

RL VO

Vout = 10 V

R2

1.65 k 1%

CAdj

10 F

* D1 Discharges CAdj if output is shorted to Ground.

Figure 4. Ripple Rejection Test Circuit

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LM317
4.0 Vout, OUTPUT VOLTAGE CHANGE (%) 0.4 I out , OUTPUT CURRENT (A) 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 -50 -25 0 25 50 75 100 TJ, JUNCTION TEMPERATURE (C) 125 150 Vin = 15 V Vout = 10 V IL = 1.5 A IL = 0.5 A 3.0 TJ = 25C 2.0 150C 55C

1.0

10 20 30 Vin-Vout, INPUT-OUTPUT VOLTAGE DIFFERENTIAL (Vdc)

40

Figure 5. Load Regulation

Figure 6. Current Limit

3.0 I Adj, ADJUSTMENT PIN CURRENT ( A) 70 65 60 55 50 45 40 35 -50 -25 0 25 50 75 100 125 150 V in-Vout, INPUT-OUTPUT VOLTAGE DIFFERENTIAL (Vdc) Vout = 100 mV 2.5 IL = 1.5 A

2.0

1.0 A 500 mA

1.5

200 mA 20 mA -50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (C)

1.0

TJ, JUNCTION TEMPERATURE (C)

Figure 7. Adjustment Pin Current

Figure 8. Dropout Voltage

1.26 Vref, REFERENCE VOLTAGE (V) IB, QUIESCENT CURRENT (mA)

5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 -50 -25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (C) 150 0 0 10 20 30 40 Vin-Vout, INPUT-OUTPUT VOLTAGE DIFFERENTIAL (Vdc) TJ = -55C +25C +150C

1.25

1.24

1.23

1.22

Figure 9. Temperature Stability

Figure 10. Minimum Operating Current

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LM317
100 CAdj = 10 F RR, RIPPLE REJECTION (dB) RR, RIPPLE REJECTION (dB) 80 60 40 20 0 Vin - Vout = 5 V IL = 500 mA f = 120 Hz TJ = 25C 0 5.0 10 15 20 25 30 35 Without CAdj 120 100 80 60 40 20 Vin = 15 V Vout = 10 V f = 120 Hz TJ = 25C 0.1 1.0 10 IO, OUTPUT CURRENT (A) CAdj = 10 F Without CAdj

0 0.01

Vout, OUTPUT VOLTAGE (V)

Figure 11. Ripple Rejection versus Output Voltage

Figure 12. Ripple Rejection versus Output Current

100 RR, RIPPLE REJECTION (dB) 80 60 40 20 0 IL = 500 mA Vin = 15 V Vout = 10 V TJ = 25C Z O, OUTPUT IMPEDANCE ( )

101 Vin = 15 V Vout = 10 V IL = 500 mA TJ = 25C Without CAdj 10-2 CAdj = 10 F 10-3 10 100 1.0 k 10 k 100 k 1.0 M

100

10-1

CAdj = 10 F Without CAdj 10 100 1.0 k 10 k 100 k 1.0 M 10 M

f, FREQUENCY (Hz)

f, FREQUENCY (Hz)

Figure 13. Ripple Rejection versus Frequency

Figure 14. Output Impedance

Vout , OUTPUT VOLTAGE DEVIATION (V)

Vout , OUTPUT VOLTAGE DEVIATION (V)

3.0 2.0 1.0 0 CL = 1.0 F; CAdj = 10 F Vin = 15 V Vout = 10 V INL = 50 mA TJ = 25C IL 0 10 20 t, TIME (s) 30 40

1.5 1.0 0.5 0 Vout = 10 V IL = 50 mA TJ = 25C Vin 0 10 20 t, TIME (s) 30 40 CL = 1.0 F; CAdj = 10 F

-1.0 -2.0 -3.0 1.5 1.0 0.5 0 CL = 0; Without CAdj

-0.5 V in , INPUT VOTLAGE CHANGE (V) -1.0 -1.5 1.0 0.5 0

Figure 15. Line Transient Response

IL , LOAD CURRENT (A)

CL = 0; Without CAdj

Figure 16. Load Transient Response

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LM317
APPLICATIONS INFORMATION
Basic Circuit Operation External Capacitors

The LM317 is a 3terminal floating regulator. In operation, the LM317 develops and maintains a nominal 1.25 V reference (Vref) between its output and adjustment terminals. This reference voltage is converted to a programming current (IPROG) by R1 (see Figure 17), and this constant current flows through R2 to ground. The regulated output voltage is given by:
V out + V ref R 1) 2 R1 ) I R Adj 2

Since the current from the adjustment terminal (IAdj) represents an error term in the equation, the LM317 was designed to control IAdj to less than 100 A and keep it constant. To do this, all quiescent operating current is returned to the output terminal. This imposes the requirement for a minimum load current. If the load current is less than this minimum, the output voltage will rise. Since the LM317 is a floating regulator, it is only the voltage differential across the circuit which is important to performance, and operation at high voltages with respect to ground is possible.
Vin LM317 Vout + Vref R1 IPROG Vout

A 0.1 F disc or 1.0 F tantalum input bypass capacitor (Cin) is recommended to reduce the sensitivity to input line impedance. The adjustment terminal may be bypassed to ground to improve ripple rejection. This capacitor (CAdj) prevents ripple from being amplified as the output voltage is increased. A 10 F capacitor should improve ripple rejection about 15 dB at 120 Hz in a 10 V application. Although the LM317 is stable with no output capacitance, like any feedback circuit, certain values of external capacitance can cause excessive ringing. An output capacitance (CO) in the form of a 1.0 F tantalum or 25 F aluminum electrolytic capacitor on the output swamps this effect and insures stability.
Protection Diodes

Adjust

When external capacitors are used with any IC regulator it is sometimes necessary to add protection diodes to prevent the capacitors from discharging through low current points into the regulator. Figure 18 shows the LM317 with the recommended protection diodes for output voltages in excess of 25 V or high capacitance values (CO > 25 F, CAdj > 10 F). Diode D1 prevents CO from discharging thru the IC during an input short circuit. Diode D2 protects against capacitor CAdj discharging through the IC during an output short circuit. The combination of diodes D1 and D2 prevents CAdj from discharging through the IC during an input short circuit.
D1

IAdj Vref = 1.25 V Typical

R2

Vout Vin

1N4002 LM317 Cin Adjust R2 CAdj Vout R1 + D2 CO

Figure 17. Basic Circuit Configuration Load Regulation

The LM317 is capable of providing extremely good load regulation, but a few precautions are needed to obtain maximum performance. For best performance, the programming resistor (R1) should be connected as close to the regulator as possible to minimize line drops which effectively appear in series with the reference, thereby degrading regulation. The ground end of R2 can be returned near the load ground to provide remote ground sensing and improve load regulation.

1N4002

Figure 18. Voltage Regulator with Protection Diodes

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LM317
PD(max) for TA = +50C 70 60 50 40 RJA 30 0 5.0 10 15 20 L, LENGTH OF COPPER (mm) Free Air Mounted Vertically Minimum Size Pad 3.0 2.0 oz. Copper L 2.5 2.0 1.5 PD, MAXIMUM POWER DISSIPATION (W) 80 R JA, THERMAL RESISTANCE JUNCTION TO AIR ( C/W) 3.5

Figure 19. D2PAK Thermal Resistance and Maximum Power Dissipation versus P.C.B. Copper Length

D6* 1N4002 Vin 32 V to 40 V Vin1 0.1 F Adjust 1 Current Limit Adjust * Diodes D1 and D2 and transistor Q2 are added to * allow adjustment of output voltage to 0 V. * D6 protects both LM317's during an input short circuit. 1.0K LM317 (1) Vout1 RSC Vin2 LM317 (2) Vout 2 240 D1 1N4001 D2 1N4001 5.0 k Adjust 2 Voltage Adjust 1N4001 D3 D4 -10 V Q2 2N5640 -10 V IN4001 Output Range: 0 VO 25 V Output Range: 0 IO 1.5 A D5 IN4001 + 10 F

Q1 2N3822

Figure 20. Laboratory Power Supply with Adjustable Current Limit and Output Voltage

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25

1.0 30

Iout Vout + 1.0 F Tantalum

LM317
+25 V Vin LM317 Adjust Vout R1 1.25 R2 100 * To provide current limiting of IO to the system * ground, the source of the FET must be tied to a * negative voltage below - 1.25 V. R1 = Vref IOmax + IDSS R2 Vref IDDS VSS* Iout Vin D1 1N4001 D2 1N4001 2N5640 D1* 1N4002 LM317 120 Adjust 720 Vout + 1.0 F MPS2222 1.0 k

TTL Control

Minimum Vout = 1.25 V * D1 protects the device during an input short circuit.

VO < BVDSS + 1.25 V + VSS, ILmin - IDSS < IO < 1.5 A. As shown 0 < IO < 1.0 A.

Figure 21. Adjustable Current Limiter

Figure 22. 5.0 V Electronic Shutdown Regulator

Vin

LM317

Vout 240 1N4001 50 k MPS2907 + 10 F

Vin LM317

Vout

R1

Iout

Adjust R2

Adjust I out +

IAdj ref ) I Adj R1 + 1.25 V R1 10 mA Iout 1.5 A V

Figure 23. Slow TurnOn Regulator

Figure 24. Current Regulator

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LM317
PACKAGE DIMENSIONS
T SUFFIX PLASTIC PACKAGE CASE 221A09 ISSUE AA
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. DIM A B C D F G H J K L N Q R S T U V Z INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.147 0.095 0.105 0.110 0.155 0.018 0.025 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 ----0.080 MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 3.73 2.42 2.66 2.80 3.93 0.46 0.64 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 ----2.04

T B
4

SEATING PLANE

F T S

Q
1 2 3

A U K

H Z L V G D N R J

D2T SUFFIX PLASTIC PACKAGE CASE 93603 (D2PAK) ISSUE B

OPTIONAL CHAMFER

TERMINAL 4

K B

S V H F
1 2 3

NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS A AND K. 4. DIMENSIONS U AND V ESTABLISH A MINIMUM MOUNTING SURFACE FOR TERMINAL 4. 5. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH OR GATE PROTRUSIONS. MOLD FLASH AND GATE PROTRUSIONS NOT TO EXCEED 0.025 (0.635) MAXIMUM. INCHES MIN MAX 0.386 0.403 0.356 0.368 0.170 0.180 0.026 0.036 0.045 0.055 0.051 REF 0.100 BSC 0.539 0.579 0.125 MAX 0.050 REF 0.000 0.010 0.088 0.102 0.018 0.026 0.058 0.078 5 _ REF 0.116 REF 0.200 MIN 0.250 MIN MILLIMETERS MIN MAX 9.804 10.236 9.042 9.347 4.318 4.572 0.660 0.914 1.143 1.397 1.295 REF 2.540 BSC 13.691 14.707 3.175 MAX 1.270 REF 0.000 0.254 2.235 2.591 0.457 0.660 1.473 1.981 5 _ REF 2.946 REF 5.080 MIN 6.350 MIN

M J D 0.010 (0.254) M T G N R

L P

DIM A B C D E F G H J K L M N P R S U V

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LM317

Notes

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LM317

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LM317/D