A common set of a control register group and a queue selection control part are provided for plural TASK EXECUTION queue for executing plural tasks. Under the control of the control register group, one CPU is occupied by the plural tasks in a time-shared manner, so that the plural tasks may be processed concurrently. The user has only to set a flag bit of information to 1 or 0 in a register which is part of the "hardware", and the TASK EXECUTION specification can be determined.
A common set of a control register group and a queue selection control part are provided for plural TASK EXECUTION queue for executing plural tasks. Under the control of the control register group, one CPU is occupied by the plural tasks in a time-shared manner, so that the plural tasks may be processed concurrently. The user has only to set a flag bit of information to 1 or 0 in a register which is part of the "hardware", and the TASK EXECUTION specification can be determined.
A common set of a control register group and a queue selection control part are provided for plural TASK EXECUTION queue for executing plural tasks. Under the control of the control register group, one CPU is occupied by the plural tasks in a time-shared manner, so that the plural tasks may be processed concurrently. The user has only to set a flag bit of information to 1 or 0 in a register which is part of the "hardware", and the TASK EXECUTION specification can be determined.