Chapter 2: Hierarchical Modeling Concepts

by tarique on October 4th, 2011

1. An interconnect switch (IS) contains the Iollowing components, a shared memory (MEM), a
system controller (SC) and a data crossbar (Xbar).
a) DeIine the modules MEM, SC, and Xbar, using the module/endmodule keywords. You do not
need to deIine the internals. Assume that the modules have no terminal lists.
b) DeIine the module IS, using the module/endmodule keywords. Instantiate the modules MEM,
SC, Xbar and call the instance mem1, sc1, and xbar1, respectively. You do not need to deIine the
internals. Assume that the module IS has no terminals.
c) DeIine a stimulus block (Top), using the module/endmodule keywords. Instantiate the design
block IS and call the instance is1. This is the Iinal step in building the simulation environment.
ANSWER:
a)

b)

c)

2. A 4-bit ripple carry adder (RippleAdd) contains Iour 1-bit Iull adders (FA).
a) DeIine the module FA. Do not deIine the internals or the terminal list.
b) DeIine the module RippleAdd. Do not deIine the internals or the terminal list. Instantiate
Iour Iull adders oI the type FA in the module RippleAdd and call them Ia0, Ia1, Ia2, Ia3.
ANSWER:
a)

b)