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ADSD Fall2011 03 Sequential Logic Blocking Non Blocking 30Sep11

ADSD Fall2011 03 Sequential Logic Blocking Non Blocking 30Sep11

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Published by Rehan Hafiz

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Published by: Rehan Hafiz on Dec 18, 2011
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11/04/2012

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Dr. Rehan Hafiz
<rehan.hafiz@seecs.edu.pk>
Lecture # 03
 
Course Website for ADSD Fall 2011
http://lms.nust.edu.pk/Key:EE803
2
Lectures: Tuesday @ 5:30-6:20 pm
,
Friday @ 6:30-7:20 pm
 
Contact: By appointment/Email Office: VISpro Lab above SEECS Library 
 
Acknowledgement: Material from the following sources has been consulted/used in theseslides:1.[SHO] Digital Design of Signal Processing System by Dr Shoab A Khan
Material/Slides from these slides CAN be used with following citing reference:
Dr. Rehan Hafiz: Advanced Digital System Design 2010
Creative Commons Attribution-NonCommercial-ShareAlike 3.0 Unported License.
 
3
1 Introduction Outline & Introduction, Initial Assessment of students, Digital designmethodology & design flow
 
2 Verilog+Combinational LogicCombinational Logic Review + Verilog Introduction, Combinational BuildingBlocks in Verilog
 
3 Verilog + Sequential Logic Sequential Common Structure in Verilog (LFSR /CRC+ Counters + RAMS),Sequential Logic in Verilog
 
4 Synthesis in Verilog
 
Synthesis of Blocking/Non-Blocking Statements
 
5 Micro-Architecture Design Partitioning + RISC Microprocessor + Micro architecture Document 
 
6 Optimizing Speed Architecting Speed in Digital System Design: [Throughput, Latency, Timing]
 
7 Optimizing Area Architecting Area in Digital System Design: [Area Optimization]
 
8 FIR Implementation
 
FIR Implementations + Pipelining & Parallelism in Non Recursive DFGs
 
10 CDC Issues
 
Cross-Clock Domain Issues & RESET circuits
 
11 Fixed-Point Arithmetic
 
 Arithmetic Operations: Review Fixed Point Representation
 
12 Adders
 
 Adders & Fast Adders Multi-Operand Addition
 
13
 
Multipliers
 
Multiplication , Multiplication by Constants + BOOTH Multipliers
 
13 CORDIC CORDIC (sine, cosine, magnitude, division, etc), CORDIC in HW14 AlgorithmicTransformations forSystem Design
 
DFG representation of DSP Algorithms, Iteration Bound& Retiming15 AlgorithmicTransformations forSystem Design
 
UnfoldingLook ahead transformations
 
16 Project Course Review & Project Presentations17 Project Project Presentations

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