electric circuits, using a TiO2-based material and the other is a high permittivity capacitor with a BaTiO3- or Pb(Zr,Ti)O3-based material. More precisely, there are four primary categories of dielectrics:
operating frequency ranges.1) Ceramic capacitors with a single parallel plate design are still the most popular, while multilayer ceramic capacitors are 1/20 - 1/30 the size of the single parallel plate type. Semiconductor capacitors exhibit large capacitance using very thin dielectric layers in a semiconductor based ceramic (see Chapter 9, Section 9.3). Micro-chip capacitors are ultra-small capacitors for high frequency applications.
Ferroelectrics with a high dielectric constant are sometimes associated with dielectric dispersion, which must be taken into account for practical applications.
at the integration of electrical circuit components. Figure 4.2 schematically shows a multilayer capacitor chip. Thin sheets made by the tape casting technique, starting from a slurry of the dielectric powder and organic solvents, are coated with Ag-Pd, Ag, or cheaper Ni or Cu paste is used to form the electrodes, then several tens of sheets are stacked together and sintered. Finally, external electrodes, used to connect the chip with the circuit, are painted on. See Chapter 3, Section 3.3(2) for the details of the manufacturing process.
The layer thickness of multilayer capacitors has been reduced remarkably, with thickness currently on the order of 7 - 10\u00b5m. The electrostatic capacitance of a multilayer capacitor is given by the following formula:
where\u03b5 is the relative permittivity of the dielectric material, n the number of layers, S the electrode area, and L the total thickness of the capaciator. Note that the capacitance increases in proportion to the square of the number of layers, when the
total size is fixed. Table 4.1 summarizes specifications for several multilayer capacitors.2) The conventional capacitor of 10\u00b5F with a 30\u00b5m layer thickness has a volume of 70 mm3. By decreasing the layer thickness down to 10\u00b5m, the device volume can be reduced to 7.7 mm3. Note that by reducing the layer thickness by 1/n, the total volume is reduced by a factor of (1/n)2 to sustain the same
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