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UTC 4052

UTC 4052

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Published by Adril Bari Nursalam
Single 8-Channel Analog Multiplexer/Demultiplexer . Dual 4-Channel Analog Multiplexer/Demultiplexer . Triple 2-Channel Analog Multiplexer/Demultiplexe
Single 8-Channel Analog Multiplexer/Demultiplexer . Dual 4-Channel Analog Multiplexer/Demultiplexer . Triple 2-Channel Analog Multiplexer/Demultiplexe

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Published by: Adril Bari Nursalam on Mar 10, 2012
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UTC 4052 CMOS
 
UTC
UNISONIC TECHNOLOGIES CO., LTD.
1
QW-R502-013,A
 ANALOG MULTIPLEXERS/DEMULTIPLEXERS
DESCRIPTION
 
The UTC 4052 analog multiplexers is digitally –controlled analog switch. The device feature low ONimpedance and very low OFF leakage current. Controlof analog signals up to the complete supply voltagerange can be achieved.
FEATURES
 
*Triple Diode Protection on Control Inputs*Switch Function is Break Before Make*Supply Voltage Range=3.0 Vdc to 18 Vdc*Analog Voltage Range(VDD-VEE)=3.0 to 18V*Note:VEE must be
Vss*Linearized Transfer Characterisstics*Low-noise-12nV/
Cycle ,f 
1.0kHz Typical
DIP-16SOP-16
 ABSOLUTE MAXIMUM RATINGS*
1
 
PARAMETER SYMBOL RATING UNIT
DC Supply Voltage (Referenced to V
EE
,Vss
V
EE
)V
DD
-0.5 ~ +18.0 VInput or Output Voltage (DC or Transient) (Referenced toVss for Control Inputs and V
EE
for switch I/O)Vin,Vout -0.5 ~ V
DD
+0.5VInput Current (DC or Transient) per Control Pin Iin
±
10mASwitch Through Current I
SW
 
±
25mAPower Dissipation *
2
DIP-16SOP-16P
D
 700500mW Ambient Temperature Range T
 A
-55 ~ +125
°
CStorage Temperature Range Tstg -65 ~ +150
°
CLead Temperature (8-Second Soldering) T
LEAD
260
°
C*1. Maximum Ratings are those values beyond which damage to the device may occur.*2. Temperature Derating : 7.0 mW/
From 65
~ 125
 
 
UTC 4052 CMOS
 
UTC
UNISONIC TECHNOLOGIES CO., LTD.
2
QW-R502-013,AINHIBIT ABX0X1X2X3Y0Y1Y2Y36109121415111524XY
Dual 4-Channel AnalogMultiplexer/Demultiplexer 
CONTROLSSWITCHESIN/OUTCOMMONSOUT/IN139
V
DD
=PIN16, V
SS
=PIN8, V
EE
=PIN7
12345678Y0Y2YY3Y1INHV
EE
Vss910111213141516V
DD
X2X1XX0X3 AB
PIN ASSIGMENTNote: Control Inputs referenced to Vss.Analog Inputs and Outputs reference to VEE.VEE must be <Vss.
 
ELECTRICAL CHARACTERISTICS
 
-55
°
C
25
°
C
125
°
C
 PARAMETER SYMBOL TEST CONDITIONSMIN MAXMINTYP
*3
MAX MIN MAXUNIT
SUPPLY REQUIREMENTS (Voltages Referenced to VEE)
Power Current Per RangeV
DD
 V
DD
-3.0
Vss
V
EE
 3.0 18 3.0 18 3.0 18 VQuiescent CurrentPer PackageI
DD
Control Inputs:Vin=Vss or V
DD
,SwitchI/O : V
EE
V
I/O
≤≤
V
DD,
and
Vswitch
500mV
*4
V
DD
=5.0V
V
DD
=10V
V
DD
=15V5.010200.0050.0100.0155.01020150300600µATotal Supply Current(Dynamic PlusQuiescent, Per PackageI
D(AV)
 TA=25
only (Thechannel component,(Vin-Vout) /Ron, is notincluded.)
V
DD
=5.0V
V
DD
=10V
V
DD
=15V(0.07µA/kHz)f+I
DD
 Typical (0.20µA/kHz)f+I
DD
 (0.36µA/kHz)f+I
DD
 µA
CONTROL INPUTS-INHIBIT, A, B, C (Voltages Referenced to Vss)
Low-Level InputVoltageV
IL
Ron=per spec,Ioff=per spec
V
DD
=5.0V
 V
DD
=10V
V
DD
=15V
 
1.53.04.02.254.506.751.53.04.01.53.04.0VHigh-Level InputVoltageV
IH
Ron=per spec,Ioff=per spec
V
DD
=5.0V
V
DD
=10V
V
DD
=15V3.57.0113.57.0112.755.508.253.57.011---V
 
UTC 4052 CMOS
 
UTC
UNISONIC TECHNOLOGIES CO., LTD.
3
QW-R502-013,A
-55
°
C
25
°
C
125
°
C
 PARAMETER SYMBOL TEST CONDITIONSMIN MAXMINTYP
*3
MAX MIN MAXUNIT
Input LeakageCurrentIin
V
DD
=15V ,Vin=0 or 
V
DD
 
±
0.1 
±
10
-5
±
0.11.0 µAInput Capacitance Cin 5.0 7.5 pF
SWITCHES IN/OUT AND COMMONS OUT/IN –X,Y,Z(Voltages Referenced to V
EE
)
RecommendedPeak-to-PeakVoltage Into or Out of the SwitchV
I/O
Channel On or Off 0 V
DD
0 V
DD
0 V
DD
VppRecommended Staticor Dynamic Voltage Across the Switch *
4
(Figure 3)
V
switch
 Channel On 0 6000 6000 300 mVOutput OffsetVoltageVoo Vin=0V,No Load 10 µVON Resistance Ron
V
switch
500mV *
4
Vin=V
IL
or V
IH
(Control),and Vin=0 to V
DD
(Switch)
V
DD
=5.0V
V
DD
=10V
V
DD
=15V800400220 250120801050500280 1200520300
Ω
 
ON ResistanceBetween Any TwoChannels in theSame Package
Ron
V
DD
=5.0V
V
DD
=10V
V
DD
=15V7050452510107050451359565
Ω
 Off-Channel LeakageCurrent(Figure 8)Ioff 
V
DD
=15V ,Vin=VIL or VIH(Control) Channel toChannel or Any OneChannel
±
100
 
±
0.05
±
100
±
1000
nACapacitance,Switch I/OC
I/O
Inhibit=V
DD
10 pFCapacitance,Common O/IC
O/I
Inhibit=V
DD
32 pFCapacitance,Feedthrough(Channel Off)C
I/O
Pins Not AdjacentPins Adjacent0.150.47pF*3. Data labeled “Typ” is not to be used for design purposes, but is intended as an indication of the IC’s potential*performance.*4. For voltage drops across the switch (
Vswitch) > 600 mV ( > 300 mV at high temperature), excessive V
DD*
current may be drawn, i.e. the current out of the switch may contain both V
DD
and switch input components. The*reliability of the device will be unaffected unless the Maximum Ratings are exceeded. (See first page of this data*sheet.)

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