Design & Build Circuits Using Combinational Logic

Combinational & Sequential Logic By Brendan Burr

Brendan Burr BTEC Higher National Certificate in Electronics

Design & Build Circuits Using Combinational Logic

Table of Contents
TABLE OF CONTENTS...........................................................2 TASK 1................................................................................4 1.1 Identify a suitable device part no. for each of the following types of functions by searching the Internet using Google:-..............................................................................4 1.2 Provide data sheets (limited to a maximum of 4 pages) of the information as indicated for the following digital devices:..........................................................................................4 Octal Transceiver................................................................4 General description, logic diagram/symbol, function table, and electrical characteristics...............................................4 Solution:-.........................................................................................4 3 to 8 Line Decoder.............................................................4 General description, logic symbol, pin descriptions, logic diagram, and function/truth table........................................4 Solution:-.........................................................................................4 16 Line to 1 Line Multiplexer................................................4 General description, logic symbol, pin descriptions, logic diagram, and function/truth table. ......................................4 Solution:-.........................................................................................4 Programmable Logic Array or Programmable Memory...........4 General description, logic diagram, pin configurations, functional/truth table, block diagrams..................................4 Solution:-.........................................................................................4 TASK 2................................................................................5 Choose one of the devices in Task 1 above and compare the characteristics of the same device manufactured in the following technology:-.........................................................5 a) TTL.................................................................................5 b) CMOS.............................................................................5 3.5 Function Table.............................................................13 3.6 Write a full test schedule and the results expected........14 2

Brendan Burr BTEC Higher National Certificate in Electronics

Design & Build Circuits Using Combinational Logic

EVALUATION.....................................................................15 CONCLUSION.....................................................................15 Books...............................................................................16 Catalogues........................................................................16 Websites...........................................................................16

Brendan Burr BTEC Higher National Certificate in Electronics

Design & Build Circuits Using Combinational Logic

Task 1
1.1 Identify a suitable device part no. for each of the following types of functions by searching the Internet using Google:1.2 Provide data sheets (limited to a maximum of 4 pages) of the information as indicated for the following digital devices:Octal Transceiver General description, logic diagram/symbol, function table, and electrical characteristics. Solution:74F245 Data Sheet Attached. 3 to 8 Line Decoder General description, logic symbol, pin descriptions, logic diagram, and function/truth table. Solution:74VHCT238A Data Sheet Attached. 16 Line to 1 Line Multiplexer General description, logic symbol, pin descriptions, logic diagram, and function/truth table. Solution:MM74C150 and MM82C19 Data Sheet Attached Programmable Logic Array or Programmable Memory General description, logic diagram, pin configurations, functional/truth table, block diagrams. Solution:NMC9307 Data Sheet Attached.

Brendan Burr BTEC Higher National Certificate in Electronics

Design & Build Circuits Using Combinational Logic

Task 2
Choose one of the devices in Task 1 above and compare the characteristics of the same device manufactured in the following technology:a) TTL b) CMOS TTL stands for Transistor-Transistor Logic, it is called this because it is made up of Bipolar Junction Transistors and Resistors, and the logic gating function and the amplifying function are performed by transistors. It was invented in 1961 and was largely beneficial to the developing IC Market, the last widely available family is called the 74AS/ALS Advanced Schottky, which was introduced in 1985 CMOS stands for Complementary Metal-Oxide-Semiconductor, it uses complementary symmetrical pairs of p-type and n-type MOSFET transistors for its logic functions. It was developed in the 1980s and was a firm competitor against the TTL technology. There are various differences between CMOS and TTL, which I will talk about in further detail after explaining a bit of back ground information on the two technologies. The two technologies have different benefits to each, as shown below. TTL: TTL Chips are less susceptible to static against CMOS chips which are easily damaged by it. TTL is more powerful and durable that CMOS. CMOS: CMOS Chips have a higher range of immunity against noise. They are smaller so take up less space than TTL. CMOS has a good packaging density. This chip can power a larger number of inputs and consume less power. They can run on a range of supply voltages, compared to TTL which require a 5V supply. This technology uses less power so is more suitable for battery applications, however it cannot run as fast as TTL. Having discussed this it is clear to see the benefits of using CMOS over TTL for some applications, however if it is likely that the circuit will be in contact with static energy then to prevent susceptibility it would be beneficial to use TTL. The 74VHCT238A 3 to 8 line decoder is a CMOS Technology, but has a TTL Threshold on its inputs. This allows the beneficial characteristics of both technologies to be used in the chip. This type of dual technology usage is being more greatly used to utilise these good characteristics and eliminate the bad characteristics such as excessive power consumption. The chip is also equipped with protections circuits at all of its inputs and outputs to protect against static discharge, giving them 2KV electrostatic discharge immunity and transient excess voltage. 5

Brendan Burr BTEC Higher National Certificate in Electronics

Design & Build Circuits Using Combinational Logic

Task 3

Brendan Burr BTEC Higher National Certificate in Electronics

Design & Build Circuits Using Combinational Logic

Brendan Burr BTEC Higher National Certificate in Electronics

Design & Build Circuits Using Combinational Logic

Brendan Burr BTEC Higher National Certificate in Electronics

Design & Build Circuits Using Combinational Logic

Brendan Burr BTEC Higher National Certificate in Electronics

Design & Build Circuits Using Combinational Logic

10

Brendan Burr BTEC Higher National Certificate in Electronics

Design & Build Circuits Using Combinational Logic

11

Brendan Burr BTEC Higher National Certificate in Electronics

Design & Build Circuits Using Combinational Logic

12

Brendan Burr BTEC Higher National Certificate in Electronics

Design & Build Circuits Using Combinational Logic

3.5 Function Table

13

Brendan Burr BTEC Higher National Certificate in Electronics

Design & Build Circuits Using Combinational Logic

3.6 Write a full test schedule and the results expected. The circuit has been designed to generate an arrangement of logic states to produce a number generated on a 7 Segment Display. It works on the principle that an operator will press the push to make latching switches to force the logic state to go low, or remain high at the various inputs on the 74LS147D Chip. The outputs of this chip are then inverted, by using a 74LS04D Chip, and become the inputs to the 74LS47D. The outputs of this chip are then fed into the 7 Segment Display and will light up a, b, c, d, e, f or g LEDs located in the display. To begin the testing the Integrated Chips need to be supplied with the appropriate voltage of 5 Volts. The 7 Segment Display also needs to be supplied with 5 Volts. The 9 push to make switches need to be connected to 0 volts to provide the 74LS147D Inputs the opportunity to receive a Logic Low State. When pressing push to make switch 1, the 7 segment display should display the number 1, illuminating LEDs b and c. When pressing push to make switch 2, the 7 segment display should display the number 2, illuminating LEDs a, b, d, e and g. When pressing push to make switch 3, the 7 segment display should display the number 3, illuminating LEDs a, b, c, d and g. When pressing push to make switch 4, the 7 segment display should display the number 4, illuminating LEDs b, c, f and g. When pressing push to make switch 5, the 7 segment display should display the number 5, illuminating LEDs a, c, d, f and g. When pressing push to make switch 6, the 7 segment display should display the number 6, illuminating LEDs c, d, e, f and g. When pressing push to make switch 7, the 7 segment display should display the number 7, illuminating LEDs a, b, and c. When pressing push to make switch 8, the 7 segment display should display the number 8, illuminating LEDs a, b, c, d, e, f and g. When pressing push to make switch 9, the 7 segment display should display the number 9, illuminating LEDs a, b, c, f and g. When none of the push to make switches are being pressed, the 7 segment display should display the number 0, illuminating LEDs a, b, c, d, e, f and g. If two push to make switches are pressed at the same time, then the higher valued number will be displayed. For example if 5 and 9 push to make switches are pressed then the 7 segment display will show the number 9.

This is the expected set of results and on pages 9-13 are the graphical results which clearly identify that the above expectant results are correct.

14

Brendan Burr BTEC Higher National Certificate in Electronics

Design & Build Circuits Using Combinational Logic

Evaluation
During this assignment I found that there is a large amount of information on Datasheets. The first task was to search for datasheets on the internet, I managed to easily find the first three (Octal Transceiver, 3 to 8 Line Decoder, and the 16 Line to 1 Line Multiplexer) however had difficulty finding all of the requirements for the Programmable Logic Array or the Programmable Memory. I settled for an Erasable Programmable Memory IC, having confirmed with Alan Dyson that it had enough of the required information. The second task I found slightly more difficult as I was unable to find a chip which was entirely CMOS or TTL, they were all dual technology types. To overcome this problem I decided to talk about the two technologies and then relate them to one of my chips, explaining that the usage of both technologies in the chip was because there a large benefits of both. Task three was interesting, we began work on this in the second week of the year and went through the design and board layout of the circuit on Multisim and Ultiboard. I hadnt used Ultiboard before this task so it was a good lesson in using the package. After a few routing problems with the software, I managed to completely finish the board, which can be seen in a screen shot on page 6. Writing the test schedule and expected results was also good, as it meant that I had to understand what was happening with the circuit, rather than just connecting some IC together.

Conclusion
I am pleased to have completed this assignment. It was challenging in places which tested my ability of researching and collaborating the data as well as making use of it. I have learnt a bit more on the technologies behind integrated chips and the benefits from combining these technologies to get the best from them. I also understand the production of truth/function tables as this allows you to see what should be expected and where the high and low points are.

15

Brendan Burr BTEC Higher National Certificate in Electronics

Design & Build Circuits Using Combinational Logic

Bibliography
Through guidance from my lecturer, the following text books, catalogues and websites I was able to complete this assignment: Books Higher Engineering Mathematics (John Bird) ISBN: 0-7506-8152-7 Catalogues N/A Websites http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic http://en.wikipedia.org/wiki/Cmos http://www.helpwithpcs.com/jargon/ttl.htm http://www.datasheetcatalog.com/datasheets_pdf/7/4/F/2/74F245.shtml http://www.alldatasheet.com/datasheetpdf/pdf/21872/STMICROELECTRONICS/74VHCT238A.html http://www.datasheetcatalog.com/datasheets_pdf/M/M/7/4/MM74C150.shtml http://www.alldatasheet.com/datasheet-pdf/pdf/89720/NSC/NMC9307.html

16