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IBM to Facebook Patents 2012

IBM to Facebook Patents 2012

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Published by Gina Smith
One set of patents IBM transferred to Facebook as part of April 2012 sale of 750 total. A lot of communications circuitry here.
One set of patents IBM transferred to Facebook as part of April 2012 sale of 750 total. A lot of communications circuitry here.

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Published by: Gina Smith on Apr 30, 2012
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United States Patent and Trademark Office
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NOTE:Results display only for issued patents and published applications.For pending or abandoned applications please consult USPTO staff.
Reel/Frame:
027991/0473
Pages:
19
Recorded:
04/04/2012
Attorney Dkt #:
079894.0557
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 51
1Patent #:
7346632
Issue Dt:
03/18/2008
Application #:
10055208
Filing Dt:
01/23/2002
Publication #:
US20020161815
Pub Dt:
10/31/2002
Title:
MECHANISM FOR EXECUTING NESTED TRANSACTIONS IN AN EXECUTION ENVIRONMENT SUPPORTING FLATTRANSACTIONS ONLY
2Patent #:
7353398
Issue Dt:
04/01/2008
Application #:
10156929
Filing Dt:
05/29/2002
Publication #:
US20030226028
Pub Dt:
12/04/2003
Title:
ARTICLE, METHOD, SYSTEM AND APPARATUS FOR DECENTRALIZED CREATION, DISTRIBUTION,VERIFICATION AND TRANSFER OF VALUABLE DOCUMENTS
3Patent #:
7398237
Issue Dt:
07/08/2008
Application #:
10178439
Filing Dt:
06/24/2002
Publication #:
US20030084428
Pub Dt:
05/01/2003
Title:
RULE BASED ENGINE FOR VALIDATING FINANCIAL TRANSACTIONS
4Patent #:
7340733
Issue Dt:
03/04/2008
Application #:
10314094
Filing Dt:
12/05/2002
Publication #:
US20030115579
Pub Dt:
06/19/2003
Title:
OPTIMIZING SOURCE CODE FOR ITERATIVE EXECUTION
5Patent #:
7337319
Issue Dt:
02/26/2008
Application #:
10621731
Filing Dt:
07/17/2003
Publication #:
US20040111617
Pub Dt:
06/10/2004
Title:
METHOD OF COMPARING DOCUMENTS POSSESSED BY TWO PARTIES
6Patent #:
7401055
Issue Dt:
07/15/2008
Application #:
10686750
Filing Dt:
10/16/2003
Publication #:
US20050086181
Pub Dt:
04/21/2005
Title:
SYSTEM AND METHOD FOR SETTING SPECIAL WHOLESALE PRICING FOR RESELLERS
7Patent #:
7401281
Issue Dt:
07/15/2008
Application #:
10707971
Filing Dt:
01/29/2004
Publication #:
US20050172194
Pub Dt:
08/04/2005
Title:
REMOTE BIST HIGH SPEED TEST AND REDUNDANCY CALCULATION
8Patent #:
7328396
Issue Dt:
02/05/2008
Application #:
10709794
Filing Dt:
05/28/2004
Publication #:
US20050268209
Pub Dt:
12/01/2005
Title:
CYCLIC REDUNDANCY CHECK GENERATION CIRCUIT
9Patent #:
7336102
Issue Dt:
02/26/2008
Application #:
10710641
Filing Dt:
07/27/2004
Publication #:
US20060026457
Pub Dt:
02/02/2006
Title:
ERROR CORRECTING LOGIC SYSTEM
10Patent #:
7376638
Issue Dt:
05/20/2008
Application #:
10746961
Filing Dt:
12/24/2003
Publication #:
US20050165741
Pub Dt:
07/28/2005
Title:
SYSTEM AND METHOD FOR ADDRESSING INEFFICIENT QUERY PROCESSING
11Patent #:
7355680
Issue Dt:
04/08/2008
Application #:
10905453
Filing Dt:
01/05/2005
Publication #:
US20060146313
Pub Dt:
07/06/2006
 
Page 1of 4USPTO Assignments on the Web4/30/2012http://assignments.uspto.gov/assignments/q?db=pat&reel=027991&frame=0473
 
Title:
METHOD FOR ADJUSTING LITHOGRAPHIC MASK FLATNESS USING THERMALLY INDUCED PELLICLE STRESS
12Patent #:
7348610
Issue Dt:
03/25/2008
Application #:
10906557
Filing Dt:
02/24/2005
Publication #:
US20060186416
Pub Dt:
08/24/2006
Title:
MULTIPLE LAYER AND CRYSTAL PLANE ORIENTATION SEMICONDUCTOR SUBSTRATE
13Patent #:
7392516
Issue Dt:
06/24/2008
Application #:
10912482
Filing Dt:
08/05/2004
Publication #:
US20060031823
Pub Dt:
02/09/2006
Title:
METHOD AND SYSTEM FOR CONFIGURING A DEPENDENCY GRAPH FOR DYNAMIC BY-PASS INSTRUCTIONSCHEDULING
14Patent #:
7353235
Issue Dt:
04/01/2008
Application #:
10921444
Filing Dt:
08/19/2004
Publication #:
US20050097121
Pub Dt:
05/05/2005
Title:
CONTENT FILTERING, ORDERING BY RELEVANCE, AND CACHING
15Patent #:
7359923
Issue Dt:
04/15/2008
Application #:
10923547
Filing Dt:
08/20/2004
Publication #:
US20060041569
Pub Dt:
02/23/2006
Title:
ONLINE INCREMENTAL DEFERRED INTEGRITY PROCESSING AND MAINTENANCE OF ROLLED IN AND ROLLEDOUT DATA
16Patent #:
7395530
Issue Dt:
07/01/2008
Application #:
10930032
Filing Dt:
08/30/2004
Publication #:
US20060048116
Pub Dt:
03/02/2006
Title:
METHOD FOR IMPLEMENTING SINGLE THREADED OPTIMIZATIONS IN A POTENTIALLY MULTI-THREADEDENVIRONMENT
17Patent #:
7389296
Issue Dt:
06/17/2008
Application #:
10932676
Filing Dt:
09/02/2004
Publication #:
US20060047688
Pub Dt:
03/02/2006
Title:
METHOD, SYSTEM AND PROGRAM PRODUCT FOR DISPLAYING A LOGICAL STRUCTURE
18Patent #:
7367019
Issue Dt:
04/29/2008
Application #:
10942428
Filing Dt:
09/16/2004
Publication #:
US20060059472
Pub Dt:
03/16/2006
Title:
PARAMETER MANAGEMENT USING COMPILER DIRECTIVES
19Patent #:
7331021
Issue Dt:
02/12/2008
Application #:
11163750
Filing Dt:
10/28/2005
Publication #:
US20070101304
Pub Dt:
05/03/2007
Title:
FAST/SLOW STATE MACHINE LATCH
20Patent #:
7329940
Issue Dt:
02/12/2008
Application #:
11163882
Filing Dt:
11/02/2005
Publication #:
US20070096257
Pub Dt:
05/03/2007
Title:
SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURE
21Patent #:
7353472
Issue Dt:
04/01/2008
Application #:
11202591
Filing Dt:
08/12/2005
Publication #:
US20070038970
Pub Dt:
02/15/2007
Title:
SYSTEM AND METHOD FOR TESTING PATTERN SENSITIVE ALGORITHMS FOR SEMICONDUCTOR DESIGN
22Patent #:
7333379
Issue Dt:
02/19/2008
Application #:
11275539
Filing Dt:
01/12/2006
Publication #:
US20070159899
Pub Dt:
07/12/2007
Title:
BALANCED SENSE AMPLIFIER CIRCUITS WITH ADJUSTABLE TRANSISTOR BODY BIAS
23Patent #:
7362184
Issue Dt:
04/22/2008
Application #:
11276410
Filing Dt:
02/28/2006
Publication #:
US20070200634
Pub Dt:
08/30/2007
Title:
FREQUENCY DIVIDER MONITOR OF PHASE LOCK LOOP
24Patent #:
7385781
Issue Dt:
06/10/2008
Application #:
11278283
Filing Dt:
03/31/2006
Publication #:
US20080123213
Pub Dt:
05/29/2008
Title:
MULTI-ARM DISK DRIVE SYSTEM HAVING INTERLEAVED READ/WRITE OPERATIONS AND METHOD OFCONTROLLING SAME
25Patent #:
7393703
Issue Dt:
07/01/2008
Application #:
11382489
Filing Dt:
05/10/2006
Publication #:
US20070264729
Pub Dt:
11/15/2007
Title:
METHOD FOR REDUCING WITHIN CHIP DEVICE PARAMETER VARIATIONS
26Patent #:
7339364
Issue Dt:
03/04/2008
Application #:
11424881
Filing Dt:
06/19/2006
Publication #:
US20080012549
Pub Dt:
01/17/2008
Title:
CIRCUIT AND METHOD FOR ON-CHIP JITTER MEASUREMENT
Page 2of 4USPTO Assignments on the Web4/30/2012http://assignments.uspto.gov/assignments/q?db=pat&reel=027991&frame=0473
 
27Patent #:
7345503
Issue Dt:
03/18/2008
Application #:
11427798
Filing Dt:
06/30/2006
Publication #:
US20080001620
Pub Dt:
01/03/2008
Title:
METHOD AND APPARATUS FOR IMPEDANCE MATCHING IN TRANSMISSION CIRCUITS USING TANTALUMNITRIDE RESISTOR DEVICES
28Patent #:
7348634
Issue Dt:
03/25/2008
Application #:
11445786
Filing Dt:
06/02/2006
Publication #:
US20060220148
Pub Dt:
10/05/2006
Title:
SHALLOW TRENCH ISOLATION FORMATION
29Patent #:
7352252
Issue Dt:
04/01/2008
Application #:
11456684
Filing Dt:
07/11/2006
Publication #:
US20080024232
Pub Dt:
01/31/2008
Title:
CIRCUIT AND METHOD TO MEASURE THRESHOLD VOLTAGE DISTRIBUTIONS IN SRAM DEVICES
30Patent #:
7627835
Issue Dt:
12/01/2009
Application #:
11765475
Filing Dt:
06/20/2007
Publication #:
US20070245271
Pub Dt:
10/18/2007
Title:
FREQUENCY DIVIDER MONITOR OF PHASE LOCK LOOP
31Patent #:
7642813
Issue Dt:
01/05/2010
Application #:
11850857
Filing Dt:
09/06/2007
Publication #:
US20090002015
Pub Dt:
01/01/2009
Title:
ERROR CORRECTING LOGIC SYSTEM
32Patent #:
7652334
Issue Dt:
01/26/2010
Application #:
11866471
Filing Dt:
10/03/2007
Publication #:
US20080017932
Pub Dt:
01/24/2008
Title:
SHALLOW TRENCH ISOLATION FORMATION
33Patent #:
7459936
Issue Dt:
12/02/2008
Application #:
11869988
Filing Dt:
10/10/2007
Publication #:
US20080024166
Pub Dt:
01/31/2008
Title:
FAST/SLOW STATE MACHINE LATCH
34Patent #:
7323913
Issue Dt:
01/29/2008
Application #:
11871578
Filing Dt:
10/12/2007
Title:
MULTIPHASE DIVIDER FOR P-PLL BASED SERIAL LINK RECEIVERS
35Patent #:
8022496
Issue Dt:
09/20/2011
Application #:
11873696
Filing Dt:
10/17/2007
Publication #:
US20080099787
Pub Dt:
05/01/2008
Title:
SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURE
36Patent #:
8126041
Issue Dt:
02/28/2012
Application #:
11874960
Filing Dt:
10/19/2007
Publication #:
US20090102452
Pub Dt:
04/23/2009
Title:
CIRCUIT AND METHOD FOR ON-CHIP JITTER MEASUREMENT
37Patent #:
8090697
Issue Dt:
01/03/2012
Application #:
11925951
Filing Dt:
10/27/2007
Publication #:
US20080059965
Pub Dt:
03/06/2008
Title:
MECHANISM FOR EXECUTING NESTED TRANSACTIONS IN AN EXECUTION ENVIRONMENT SUPPORTING FLATTRANSACTIONS ONLY
38Patent #:
7471115
Issue Dt:
12/30/2008
Application #:
11926386
Filing Dt:
10/29/2007
Publication #:
US20080048711
Pub Dt:
02/28/2008
Title:
ERROR CORRECTING LOGIC SYSTEM
39Patent #:
7378866
Issue Dt:
05/27/2008
Application #:
11942396
Filing Dt:
11/19/2007
Publication #:
US20080061902
Pub Dt:
03/13/2008
Title:
METHOD AND APPARATUS FOR IMPEDANCE MATCHING IN TRANSMISSION CIRCUITS USING TANTALUMNITRIDE RESISTOR DEVICES
40Patent #:
7685544
Issue Dt:
03/23/2010
Application #:
11947254
Filing Dt:
11/29/2007
Publication #:
US20080104555
Pub Dt:
05/01/2008
Title:
TESTING PATTERN SENSITIVE ALGORITHMS FOR SEMICONDUCTOR DESIGN
41Patent #:
7378885
Issue Dt:
05/27/2008
Application #:
11959069
Filing Dt:
12/18/2007
Title:
MULTIPHASE DIVIDER FOR P-PLL BASED SERIAL LINK RECEIVERS
42Patent #:
7521735
Issue Dt:
04/21/2009
Application #:
11969320
Filing Dt:
01/04/2008
Publication #:
US20080099844
Pub Dt:
05/01/2008
Title:
MULTIPLE LAYER AND CRYSTAL PLANE ORIENTATION SEMICONDUCTOR SUBSTRATE
43Patent #:
8032747
Issue Dt:
10/04/2011
Application #:
12015536
Filing Dt:
01/17/2008
Page 3of 4USPTO Assignments on the Web4/30/2012http://assignments.uspto.gov/assignments/q?db=pat&reel=027991&frame=0473

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