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Low-Power Embedded System Design and Microchip XLP Tech.

an introduction to Microchips Low-Power Devices

Agostino Polizzano agostino@polizzano.it

Overview
1. Understading Power Consumption 1.1 Dynamic Power 1.2 Static Power 2. Measuring Power Consumption 3. Performance vs Power 3.1 Wake-up Time 3.2 Clock Speeds and Power Efficiency 3.3 Instruction Set Architecture (ISA) 3.4 Properly Utilizing Peripherals 4. Low Power Software Design 5. Low Power Hardware Design 6. eXtreme Low Power PIC Microcontrollers with eXtreme Low Power Technology 7. Microchip Next Generation Peripherals

Agostino Polizzano agostino@polizzano.it

[1] Understading Power Consumption

When we consider power consumption in microcontrollers, we are actually considering two components:

Static Power Static power is the current consumed when the main clock is disabled. It is composed mainly of transistor leakage and the current used by voltage supervisors.

Dynamic Power Dynamic power is the current consumed by the switching of digital logic. It is mainly influenced by clock speed, although voltage and temperature also have an impact. For this reason, controlling dynamic power is largely a matter of controlling clock speed.

Agostino Polizzano agostino@polizzano.it

[1] Understading Power Consumption


[1.1] Dynamic Power Dynamic power consumption is the current which is consumed during the normal operation of an MCU. It includes the power lost in switching CMOS circuits and the bias currents for the active analog circuits of the device, such as A/Ds or oscillators.

To understand where switching losses originate from, consider a CMOS inverter:


when the signal switches from VDD to VSS, there is a transition period where the PMOS and NMOS will both be biased in the linear region, allowing current to flow from VDD to ground.

additional current consumption associated with the charging and discharging of the bus capacitance when the logic level changes.

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[1] Understading Power Consumption


[1.1] Dynamic Power

Switching frequency The first point to consider is that voltage is the most significant factor in dynamic power consumption because the voltage term is squared. Reducing the system operating voltage will have a s i g n i f i c a n t i m p a c t o n p ow e r consump- tion. Load capacitance. It influences the fan out.

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[1] Understading Power Consumption


[1.1] Dynamic Power

Control of C The embedded system designer has limited control over C, the internal load capacitance. The capacitance is a function of the internal MCU layout and design. It is up to the MCU manufacturer to limit the switching of load capacitance by utilizing proper low-power IC design techniques. Control of V Operating voltage is defined by the process technology used in the manufacture of the MCU. An embedded system designer can utilize his knowledge by selecting MCUs which are capable of operating at lower voltages. Control of f Frequency is typically the most variable of the factors contributing to dynamic power, and as such, is usually the component adjusted by embedded designers to actively control power consumption. The optimal operating frequency for a system is determined by a combination of factors: Communications or sampling speed requirements Processing performance Maximum peak current allowed
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[1] Understading Power Consumption


[1.2] Static Power Static power consumption encompasses all of the power required to maintain proper system operation while code is not actively running. This typically includes leakage current, bias currents for analog circuits, low-power timekeeping oscillators, timekeepers such as the Watchdog Timers
(WDT) and Real-Time Clock/Calendars (RTCC).

To understand leakage current consider a NMOS transistor:


Gate Leakage This current is called sub-threshold leakage. Sub-threshold leakage occurs because the drain and source are physically closer in a narrower transistor. The narrower a transistor is, the larger this leakage becomes.

A critical trade-off becomes apparent when trying to optimize both dynamic and static power. Smaller process technologies have considerably lower dynamic power, but at the cost of much higher leakage current.
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[2] Measuring Power Consumption

There are two values which are of primary concern: Average power consumption is the sum of the total energy consumed by the system in Dynamic and Static Power modes, divided by the average system loop time. Maximum power consumption is the worst-case power draw required by the system. It is important to determine maximum power consumption in order to properly design the system power supply.

Agostino Polizzano agostino@polizzano.it

[2] Measuring Power Consumption


Measuring Static Power
There are a few concerns to consider when measuring static power consumption: First, ensure that the ammeter used for testing has a high enough resolution to accurately measure the MCUs power consumption. For many nanoWatt XLP MCUs, the static power can be lower than 100 nA Another concern is the voltage drop out of the ammeter. When set to a low-current range for measuring static power, there will usually be a notable voltage drop across the meter. This can interfere with voltage-sensitive circuits.

In the event that there is no ammeter available that is capable of accurately measuring a very low-power application, an alternate method can be used, utilizing a capacitor. 1. Connect both switches to run the system and allow the capacitor to charge to VDD from the voltage source. 2. Disconnect the voltage source (and any voltage meters) and allow the application to run from the capacitor for a set amount of time. 3. Disconnect the capacitor from the application and connect a voltage meter to measure the remaining voltage on the capacitor. 4. Using Equation 2.

Agostino Polizzano agostino@polizzano.it

[2] Measuring Power Consumption


Measuring Dynamic Power

Using an ammeter to measure dynamic power under normal system operating conditions is usually not very useful. This is because the sampling speed of most ammeters is not fast enough to accurately measure the real-time power consumption of the system.

An effective way to measure dynamic power consumption is to use an oscilloscope to measure voltage across a shunt resistor. The oscilloscope will allow a designer to determine the changes in power consumption as the system steps through various states during operation, as well as measure the time spent in each state.

It is important to size the shunt resistor appropriately. It should be large enough to provide measurable resolution on the scope, but small enough not to cause a system brown-out in high-power states. Usually, a 10-100 ohm resistor is appropriate for dynamic power measurements.

Agostino Polizzano agostino@polizzano.it

[2] Measuring Power Consumption


example power profile calculation

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[3] Performance vs Power


Critical aspects
There are always trade-offs between performance and power consumption in an embedded system. The key to low-power design is creating a system which utilizes the strengths and features of the controller to get the most performance within the power budget. Some critical aspects to consider when designing for performance are: Wake-up Time Oscillator Speed Instruction Set Architecture (ISA) Peripheral Features

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[3] Performance vs Power


[3.1] Wake-up Time
Wake-up time is critical for systems with short active times, as the wake-up process often consumes a similar amount of current as normal operation. The primary component of wake-up time is the Oscillator Start-up Time (OST). Typical start-up times for various common clock sources on PIC MCUs are:

Note that most high-accuracy and high-speed sources, such as crystals and Phase-Locked Loop (PLL) oscillators, have long start-up times.

Agostino Polizzano agostino@polizzano.it

[3] Performance vs Power


[3.1] Wake-up Time

Goals:
use a slow start-up source for a reduced consumption a fast wake-up time

Microchip solution:
Two-Speed Start-up feature

2
initially wakes up from the internal RC o s c i l l a t o r. T h e system runs from this oscillator until the primary clock source stabilizes.

3
Switch. Primar y clock source stabilizes.

1
Wake-up event

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[3] Performance vs Power


[3.2] Clock Speeds and Power Efficiency
One of the most common questions about low-power design asks: What is the best frequency to run at in order to minimize power consumption?

Therefore, when running at high speed from a battery-powered application, it is necessary to monitor VDD to determine if the battery voltage is dropping close to the minimum level required for fullspeed operation. If VDD drops below this voltage, it can cause code misexecution. Most MCUs provide a LowVoltage Detect (LVD) feature, which will interrupt the device if VDD drops close to this range. This will allow the firmware to reduce the operating frequency at low voltage, allowing the system to extend its lifetime.

Agostino Polizzano agostino@polizzano.it

[3] Performance vs Power


[3.3] Instruction Set Architecture (ISA)
The primary dynamic power specification, advertised by MCU manufacturers, is uA/MHz or uA/MIPS. Unfortunately, as many designers have discovered, neither of these specifications are very accurate as they dont take into account the MCUs CPU architecture. Different architectures will perform varying amounts of work in a single clock cycle. This makes the Instruction Set Architecture of an MCU an important component of power consumption. The first major considerations are the MCU clock ratio and cycles per instruction: FOSC: the ratio of the input system clock frequency (MHz); FCY: the internal instruction clock frequency (MIPS).

To truly compare power consumption, it is necessary to consider how much actual work is performed per unit of energy consumed. Benchmarking is the only complete method to compare devices which take Instruction Set Architecture into account. It is also the most time-intensive method to compare devices. For a simple benchmark, there are some open source benchmark standards, which can be used to do get an initial comparison. By combining benchmark completion times with data sheet power consumption specifications, it is often possible to get a reasonable comparison of device power consumption.

Agostino Polizzano agostino@polizzano.it

[3] Performance vs Power


[3.4] Properly Utilizing Peripherals
Peripheral features on a microcontroller can help substantially reduce power consumption. However, often it can be deceiving which peripherals consume high power and which are low power. For example, when comparing a UART to an SPI, many designers would choose the UART as the lower power module. Because it requires fewer toggling I/Os and runs at a lower speed, this limited speed actually makes the UART worse for power consumption, as an SPI is usually able to complete a transaction much more quickly than a UART. While the SPI may consume more power during the transaction, afterward the device can go to Sleep and eliminate the highest source of power consumption, the CPU.

low power

high speed

low speed

high power

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[3] Performance vs Power


[3.4] Properly Utilizing Peripherals A/D CONVERTER
The Analog-to-Digital Converter (A/D) is primarily an analog module and many of the circuits used to perform conversions do not vary significantly with speed, such as reference voltage circuits, signal amplifiers, signal buffers, etc. The A/D should be set to use: the fastest conversion clock possible; sampling time to the minimum necessary to maintain measurement accuracy.

DMA
A Direct Memory Access (DMA) controller is a powerful tool to reduce power consumption. The DMA improves performance by off-loading data transfer tasks from the CPU. Any features which can reduce CPU run time can help to drastically reduce power consumption, as clocking the CPU is the most powerintensive task in an MCU.

FIFO BUFFER
Many peripherals, capable of operating in Sleep, have built-in FIFO buffers which reduce power by enabling longer Sleep times. The FIFOs will store received or sampled data and will interrupt once the buffer is full. This allows the device to only wake up once to process the data. This consumes much less power than fully waking up a device to allow the CPU to handle each individual transfer.
Agostino Polizzano agostino@polizzano.it

[3] Performance vs Power


[3.4] Properly Utilizing Peripherals

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[3] Performance vs Power


[3.4] Properly Utilizing Peripherals WAKE-UP SOURCES
The proper selection of wake-up sources is often an overlooked MCU feature, which can help reduce power consumption. Modern MCUs have a wide variety of wake-up sources and can wake up from almost any peripheral module on the device. While many applications will traditionally wake up, based on a timer to check for events, power can be reduced by enabling a peripheral, which is specifically capable of capturing a particular event. For example, I2CTM and SPI modules can receive data while asleep, then wake up the device afterward. This can save power over having to wake the device every few milliseconds to check for incoming transmissions.

Another example is the value of a RealTime Clock (RTC) versus using a timer module for wake-up. Keeping time with a timer module usually requires waking a device, once every second, to update the clock and check for an alarm condition. However, a Real-Time Clock and Calendar (RTCC) will allow the device to keep time and remain asleep until the alarm occurs, reducing power.

Agostino Polizzano agostino@polizzano.it

[4] Low Power Software Design


Software design has a critical impact on low-power system design. Selecting the best low-power devices, and optimizing hardware for low power, can easily be wasted if the proper techniques are not utilized when writing system software.

Idle and Doze mode


Idle Mode: the system clock is
removed from the CPU, but is still provided to the peripherals. Doze Mode: the system clock is split into separate CPU and peripheral clocks.

Interrupts vs Polling Power Optimization and C

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[4] Low Power Software Design


Idle and Doze Mode
Generally, it is easy to tell when Low-Power modes, such as Sleep, should be used in an application, as there is an obvious down time when the system can enter Sleep mode. Dynamic power-saving modes, Idle and Doze, tend to be less obvious. For example, some cases when a system should use Idle or Doze mode are:

Replacing wait loops

Running high-speed peripherals


Consider the scenario where a systems primary job is to maintain a highresolution PWM output. The highresolution requirement will force the system to maintain a high-speed clock. In this case, Sleep mode cannot be used to reduce power consumption due to the need to maintain the PWM. Similarly, Idle mode may not be feasible because the CPU will need to monitor the system state to update the PWM, as necessary. Even so, it is unlikely that the CPU will need to run at the same speed as the PWM in order to perform this job. In this case, Doze mode is an ideal option, allowing the CPU to perform the necessary tasks at low speed.

Agostino Polizzano agostino@polizzano.it

[4] Low Power Software Design


Interrupt vs Polling
In the effort to wipe out power draining wait loops from the system, a low-power system designer should consider switching from a polling-based system to an interrupt-based system. Utilizing interrupts allows the system to use power-saving modes, such as Sleep and Idle, much more frequently in place of waiting for an event with polling. If the system is simple and doesnt require much processing, or have background tasks which need to run frequently, polling can be the better option as it allows simpler, more compact code without any additional current consumption.

Power Optimization and C


C is a great tool for writing embedded programs, but compared to Assembly, C takes away much of the designers control over the code. As a result, some engineers are hesitant to use C in applications which require minimal power consumption, preferring to use Assembly to manually optimize the code.

Agostino Polizzano agostino@polizzano.it

[5] Low Power Hardware Design


Designing low-power hardware follows a few, very straightforward requirements: Maximize impedance in current paths; Minimize impedance in high-speed switching paths; Minimize leakage currents; Minimize operating duty cycles. The following recommendations utilize these rules, in various circuits of a system, to minimize the power impact of those components.

Push Buttons LEDs Connecting and Controlling I/O pins Unused Port Pins Analog Inputs

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[5] Low Power Hardware Design


Push Buttons
The primary problem with push button power consumption is that buttons typically interact in the very slow human time domain, rather than the high-speed embedded system domain. A better method is to use the MCUs internal pull-up resistors as the voltage source for a push button. Because the internal pull-up can be enabled and disabled, dynamically in code, as soon as the button press is detected, the MCU can disable the pull-up, removing the current path to ground.

Leds
LEDs are a power consumption problem for similar reasons as buttons. They consume high power to run (2 mA-50 mA) and must be run for long periods of time in order to be useful to a user. The following are two of the main techniques for reducing LED power consumption: drive the LED at a lower duty cycle using a PWM; drive the LED at lower current levels by increasing the size of the current-limiting resistor. This is an especially useful technique with newer, high brightness and highefficiency LEDs.

Agostino Polizzano agostino@polizzano.it

[5] Low Power Hardware Design


Connecting and Controlling I/O pins
In many applications, incorrect use of the I/O pins is a common source of unexpected, high-power consumption. There are a few rules for using a bidirectional I/O pin on a PIC microcontroller to minimize power consumption.

Unused Port Pins


An unused I/O pin should be left unconnected, but configured as an output pin, driving to either state (high or low), or configured as an input with an external resistor (about 10 KOhm) pulling it to VDD or VSS.

Analog Inputs

Analog inputs have a very high impedance so they consume very little current. They will consume less current than a digital input if the applied voltage would normally be centered between VDD and VSS. Sometimes, it is appropriate and possible to configure digital inputs as analog inputs when the digital input must go to a low-power state.

Agostino Polizzano agostino@polizzano.it

[6] eXtreme Low Power PIC Microcontrollers with eXtreme Low Power Technology

For PIC microcontrollers, the original low-power standard was referred to as nanoWatt Technology. Since its introduction in 2003, nanoWatt Technology has become the standard for all new PIC microcontrollers. The primary requirement to be considered a nanoWatt device was an overall power consumption in the nanoWatt range while in Sleep mode. Several new power-saving features were also introduced at the same time: Idle mode On-chip, high-speedoscillator (INTOSC) with PLL and programmable postscaler WDT with extended time-out interval Ultra Low-Power Wake-up (ULPWU) Low-power option for Timer1 and the secondary (32 kHz) oscillator Low-power, software-controllable BOR (Brown-out Reset) The most recent changes to nanoWatt Technology are collectively known as nanoWatt XLPTM Technology. To meet the nanoWatt XLP Technology specification, a PIC microcontroller is required to have typical current consumption of less than the following: 100 nA for Power-Down Current (IPD) 800 nA Watchdog Timer Current (IWDT) 800nA Real-Time Clock and Calendar (IRTCC)
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[6] eXtreme Low Power PIC Microcontrollers with eXtreme Low Power Technology
As more electronic applications require low power or battery power, energy conservation becomes paramount. Todays applications must consume little power, and in extreme cases, last for up to 15-20 years, while running from a single battery. Portable Medical Devices
The pace of innovation in the development of electronic medical devices is nothing short of revolutionary. Microchips products and experience have helped hundreds of the worlds top medical device companies take their ideas from future vision to market reality.

Thermostats
Demonstrate the flexibility of the PIC microcontroller platform for a range of thermostats from a low cost, segmented display to a fully featured graphical display with touch sensing.

Wireless
Microchip is enabling our PIC microcontroller customers with cost effective, easy to implement wireless solutions (transmitter, receiver, and transceiver solutions for IEEE 802.15.4/ZigBee, ISM Band Sub-GHz, and IEEE 802.11).

Smart Cards
VIEW Microchips smart card library supports PIC18 & PIC24 microcontrollers as well as providing the API necessary to communicate with the ISO7816-3/4 compliant smartcard.

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[6] eXtreme Low Power PIC Microcontrollers with eXtreme Low Power Technology

Agostino Polizzano agostino@polizzano.it

[6] eXtreme Low Power PIC Microcontrollers with eXtreme Low Power Technology

Agostino Polizzano agostino@polizzano.it

[6] eXtreme Low Power PIC Microcontrollers with eXtreme Low Power Technology
MSP430 16-bit Ultra-Low Power 16-Bit Microcontrollers by Texas Instruments vs eXtreme Low Power 16-bit Microcontrollers by Microchip Sleep Power Comparison

PIC MCUs with XLP has Lower Power than MSP430 MSP430 is 178% higher for Sleep with BOR(1) MSP430 is 33% higher for Sleep with RTC(2)

(1) (2)

Brown Out Reset (or BOR) is the ability for the microcontroller to reset itself if the supply voltage falls below a specified threshold. Real Time Clock (RTC)

Agostino Polizzano agostino@polizzano.it

[6] eXtreme Low Power PIC Microcontrollers with eXtreme Low Power Technology
MSP430 16-bit Ultra-Low Power 16-Bit Microcontrollers by Texas Instruments vs eXtreme Low Power 16-bit Microcontrollers by Microchip Sleep Power Comparison

Agostino Polizzano agostino@polizzano.it

[7] Microchip Next Generation Peripherals


Configurable Logic Cell (CLC)

Easily create custom combination and sequential logic.


Key Features
User configurable real time logic control CLC configuration GUI for quick turn development Combinational Logic Functions AND/OR/XOR/NOT/NAND/NOR/XNOR State Functions/Clock D Flip-Flop, JK Flip-Flop D Latch, SR Latch Input sources Pins Peripherals Output available to: External pins Other peripherals Operation while in Sleep

Benefits
Increases on chip interconnection of peripherals and I/O Integrates hardware functions and saves board space Software control of Combinational/Sequential Logic Saves program code space and frees up CPU cycles

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[7] Microchip Next Generation Peripherals


Complementary Waveform Generator (CWG)

Complementary waveforms with enhanced capabilities.


Key Features
Provides non-overlapping complementary waveform Various input sources inclusive of: Comparators, PWM, CLC, NCO Blanking control for transient filtering Phase control for output delay Independent rise and fall Dead band control Auto shutdown/restart Polarity control

Benefits
Works with multiple peripherals Fewer components and less space Lower power Improved switching efficiencies

Example Applications
Switch Mode Power Supplies LED/Fluorescent Lighting Battery Charger Motor Drive

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[7] Microchip Next Generation Peripherals


Programmable Switch Mode Controller (PSMC)

Advanced PWM capabilities for power supplies, motor and lighting control.
Key Features
Various clock sources: external, system clock, independent 64 MHz Various input sources: comparators, external pins Blanking control for transient filtering Single 16-bit PWM with up to 6 steerable outputs Complementary 16-bit PWM with up to 3 steerable output pairs Dead band with independent rise and fall control Polarity control/auto shutdown and restart Flexible PWM output modes: Push/pull, pulse skipping, 3-phase, fixed duty cycle, brushed DC with forward/reverse Output gating externally controlled activate/ deactivate

Example Applications
Power Supplies DC/DC Converters (Power Bricks) Power Factor Correction LCD Backlighting LED Lighting Automotive Head and Tail Lamps High Intensity Discharge (HID) Lighting Lamp Ballasts Signal Conditioning Motor Control Sensors Medical, Temperature, Pressure Battery Monitoring Advanced Battery Charging General Purpose Applications Requiring High Resolution PWM

Agostino Polizzano agostino@polizzano.it

Thanks for your attention

Agostino Polizzano agostino@polizzano.it

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