During the overlap time, fault currentexposure increases dramatically andmay exceed the interrupting capacityof the circuit breakers used. However,since the overlap period is short, manyusers feel that the likelihood of a faultduring the overlap period is notsufficient to warrant use of circuitbreakers with higher short-circuitinterrupting ratings.During the overlap period, if thenormal source should fail, the normalsource will become energized(backfed) from the reserve source,which may result in loss of bothsources. Simultaneous signals, or avariant, historically have beencommonly used for routine transfers.Users should carefully assess the risksassociated with overlap duringtransfers initiated with simultaneoussignals. Except for routine transfers,use of simultaneous close and tripsignals is not recommended.2. The transfer time should be shortenough to avoid significant slowing ofmotors in order to avoid excessivemotor inrush currents when thereserve source circuit breaker re-energizes the loads. This is importantfor a variety of reasons: When the normal source fails, thedriven (motor) loads slow down andact as generators due to their inertia.As the motor slows, the backelectromotive force (EMF) of themotor "slips" with respect to normalsystem voltage, producing a phaseangle between the back EMF and thereserve source.Automatic fast bus transfer has been thesubject of endless technical papers overseveral decades. The "ideal" fast bustransfer action would transfer the load tothe reserve source instantaneously onloss of normal supply, with no loss ofpower to the load. This is nearlyachievable with the new generation ofstatic transfer switches, but theseswitches are very costly, and there aresignificant limitations on short-circuitcapabilities with the present statictransfer switch systems. Thus, for theimmediate future, the vast majority ofbus transfer activity in large industrialfacilities and in power generation plantswill involve conventional circuit breakersin medium-voltage metal-cladswitchgear.Table 1 gives the dead bus times forGMSG circuit breakers, based on use ofthe optional "fast" trip coil used with therated interrupting time of three cycles(50 ms).Transfer time is an important systemdesign consideration, and several aspectsshould be evaluated when designing thetransfer scheme and in the selection ofdevices and settings:1. If the reserve-source circuit breaker isgiven a close signal simultaneouslywith the trip signal to the normal-source circuit breaker, overlap canresult if the reserve-source circuitbreaker closes before the normal-source circuit breaker completes theinterruption.
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Fast bus transfer times for GMSG circuit breakers
TechTopics No. 69