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Table Of Contents

Basics of SI
1.1 When Speed is important?
1.1.1 Acceptable Voltage and timing values
1.2 Signal Integrity
1.2.1 Waveform Voltage Accuracy
1.2.2 Timing
1.3 Speed of currently used logic families
1.3.1 Transition Electrical Length (TEL)
1.3.2 Critical length
1.3.3 What is Transmission Line?
1.3.4 What is moving in a Transmission line?
1.3.5 Power Plane Definition
1.3.6 The concept of Ground
1.4 STRIPLINE circuit with Electromagnetic field
1.5 RLC Transmission Line Model
1.5.1 What is Impedance?
1.5.2 A Practical impedance equation for microstrip
1.5.3 What is relative dielectric constant Er?
2 Interconnections for High Speed Digital Circuits
2.1.1 Summary
2.2 Examples of dynamic interfacing problems
2.3 IC Technology and Signal Integrity
2.4 Speed and distance
2.5 Digital signals: Static interfacing
2.6 Digital signals: Dynamic interfacing
2.7 Review questions
3 Interconnection Models
3.1 Summary
3.2 Reference model for interconnection analysis
3.3 Receiver model
3.4 RC interconnection model
3.5 Parameters of the interconnection
3.6 Refined models
3.7 Review question
4 Transmission Line Models
4.1 Summary
4.2 Transmission line models
4.3 Loss-less transmission lines
4.4 Critical Length
4.5 Reference transmission line model
4.6 Line driving
4.7 Propagation and reflected waves
4.8 A sample system
4.9 Review questions
5 Analysis techniques
5.1 Summary
5.2 Transmission time and skew
5.3 Effects of termination resistance
5.4 Lattice diagram
5.5 Examples of Real Lines
5.6 Simulation code
5.7 Examples of results
5.8 Review questions
6 Design guide for interconnection
6.1 Summary
6.2 Incident wave switching
6.3 Effects of capacitive loading
6.4 Termination circuits
6.4.1 Passive termination
6.4.2 Low power termination
6.4.3 Active low power termination circuit
6.5 Driving point-to-point lines
6.6 Driving bused lines
6.7 Design guidelines
6.8 Review questions
7 Signal Integrity in Digital Circuits
7.1 Crosstalk
7.1.1 Summary
7.2 Examples of signal integrity problems
7.3 Simplified Model for Crosstalk Analysis
7.4 Forward and backward crosstalk
7.5 Examples
7.6 Near-end and Far-end crosstalk
7.7 Review questions
8 Design Guide to Handle Crosstalk
8.1 Summary
8.2 Effects of Crosstalk
8.3 Passive countermeasures
8.4 Active Control of Crosstalk
8.5 Review questions
9 Ground Bounce and Switching Noise
9.1 Summary
9.2 The totem pole Current Spike
9.3 Current flow in the output capacitance
9.4 Total Ground Bounce
9.5 Review questions
10.2 Decoupling Capacitors
10.3 Placement of bypass Capacitors
10.4 Ground and power distribution
10.5 Clock distribution
10.6 Review Questions
11 Laboratory Experience
11.1 Summary
11.2 Aim of the experience
11.3 Generator Parameters
11.4 Cable Parameters
11.5 Mismatch at driver and at termination
11.6 Capacitive Load
11.8 Driving the line with logic devices
12 SI Analysis Strategy
12.2 POSSIBLE HIGH-SPEED DESIGN APPROACHES
12.3.4 STEP 4 — SET UP AND RUN A NUMBER OF SIMULATION CASES
12.3.10 STEP 10 — POST LAYOUT SI ANALYSIS
12.4 CONCLUSION
13 Glossary
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PCB Designer Guide

PCB Designer Guide

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Published by Saravanan
PCB Designer Guide
PCB Designer Guide

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Published by: Saravanan on Jan 06, 2009
Copyright:Attribution Non-commercial

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06/21/2013

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