Taub’s Principles of Communication n = Bee reese el nae Ber el eSTeln Uefa cele LuN eer Ure214 Principles of Cammunication Systems = Thus, smallest step-size is 10 % (x) =.) = L7S 10-3 In(1+255x5) ey w= aes) ‘The | t sey when x ig at its extreme largest step _ oe n ‘ Thus, largest step-size is 10 x (xp =x,) = 0.43 V ‘between y, = 1 — a7 andy, = 1 Note that, withow compander for uniform quantizarion the step size is 10/127 = 0.079 V. 126 lo) + 255%) 127 “in(1+ 255) ‘Again substituting, ‘or x, = 0.987 Self-test Questions 9. Is it true that reduction in step size reduces quantization error? 10. Can the reduction of repeater distance in digital communication keep error arbitrarily low? 11. Is it true that a reduction in amplitude of input signal by a factor of 2 reduces Signal to Quantization noise ratio by 6 dB in y-law companding? 12. The distortion caused by compressor is removed by expander in companding scheme. Ts that correct? CERTAIN ISSUES IN DIGITAL TRANSMISSION Having been able to code analog data into digital let us address some pertinent questions related to digital transmission, We'll return to discussion on other coding options in Sec. 5.6 which will use basic PCM coded data in a variety of ways with an aim to reduce bit rate and in tum bandwidth required, We start our discussion here with line coding and then address issues like scrambling to improve timing recovery, followed by discussion of a practical PCM system. 5.5.1 Line Coding We know how to represent an analog data in binary, ie. in terms of two symbols 0 and 1. But ho do we assign electrical voltages to them that suits communication over an electrical line? This issue is addressed in line coding which looks into factors like (i) power and bandwidth required for transmission, (ii) ability to extract timing information, (iii) presence of low frequency or de com- ponent which is unsuitable for ac coupled circuits, (iv) error monitoring ability ete. We discussed two different presentations of digital data, NRZ and biphase in See. 2.5.4 and 2.5.7 and showed how fo calculate power spectral density for them and effect of basic filters on them. Here, we make ‘a comparative assessment of different line codes typically used in digital system, You will find that improvement is sought by carefully controlling the transmitted power spectrum. Note that, the transmission mode considered here is known as baseband transmission. The passband transmission which uses modulation of high frequency carrier is discussed in Chap. 6. We first discuss impor- tant linear codes where input data stream is continuously processed to generate output code. Then we discuss one popular block cade where input data stream is divided into blocks, each of which is coded to a symbol or another block of data. Fig. $.30 gives a compact presentation of these codes, Unipolar NRZ: This code is unipolar as logic is represented by OV and logic 1 by a constant signal level, say +" during its entire bit interval (Ty where bit rate is 1/7) and hence called non return to zero (NRZ), This is simple in the sense that it mimics the binary representation but has certain serious problems. Fig. 5.30(a) describes its timing diagram, PSD and alse the 3dB bandwidth275, — Pulse Modulation and Digital Transmission of Analog Signal “uorsraaty 3:72" Papoy (8) ‘Burpos mmsaysueyy 10 oseyd yds (J) ‘Vorss9Auy spreW SELON (9) “ZA sejodig (P) ‘ZN FeTod:¢ (9) ‘zai zeIedran (q) ‘ZaN eredmun [e) Gsd 4y) pue sepa ouy eas, E'S “Bhd a2 4 a. 4 Tot? zu seIodig (p) an tw (6) AY * le a ao" ® La At 0 ZEN JerOdeg (9) “LA ° Lerseyouerw) eseud yids (i) py ° ae wy (@) 4 An E.276 Principles of Communication Systems — It can be seen that this code has high de as well as low frequency components. Network that limits low frequency passage makes this unusable when there is a long string of I's. This is explained later taking bipolar NRZ as an example case, Note that long string of 1’s and 0's also make clock recovery difficult and causes synchronization problem. Unipolar RZ: ‘This code is again unipolar as excursion is between OV and +, But logic 1 here is represented by a pulse which retums to zero (RZ) after a brief period (usually half bit period) within bit interval. Fig. $.30(6) describes its timing diagram and PSD. It can be seen that its dc component is lower compared to unipolar NRZ. Also.clock recovery can be better as it has significant energy at 1/Tp. Bipolar NRZ: This code is bipolar as excursion is between +V’ and ~V. But pulses don't return to zero and stays at that level for entire bit duration. Fig. 5.30(c) describes its timing diagram and PSD. The PSD is similar to unipolar NRZ but has higher power budget. In presence of noise this performs better than unipolar as voltage excursion is more. We qualitatively discuss the effect of Tow frequency limiting for such signals when there is a long string of I's present in the code (Fig. 3.314). The low frequency network can be approximated by an RC circuit as shown in Fig. 5.310 and its output is plotted in Fig. 5.31c. The validity of this result can be seen by keeping in mind the following two considerations: (a) when the input is constant the output decays expo- nentially (with time constant RC) to zero volts; (b) when the output changes abruptly by amount 2V the output changes by an equal amount since an instantaneous change in the capacitor voltage is not possible. ‘We shall find that the most effective way of distinguishing, at the receiver, a | from a 0 is to measure the area under the received waveform during the time of a bit. A positive area indicates a 1, a negative area a 0, In Fig. 5.31 we show a case it which there is a long uninterrupted sequence of I's. We observe that as the sequence persists and even for a time after the sequence ends, the 104 O47 OFF Ft OL ON Fig. 5.31 (a) An NRZ binary waveform. (b) A circuit whose transmission discrimi- nates against low frequency. (c) The output which results when the waveform in (a) is transmitted through the circuit in (b)jon of Analog Signal “277 — area available to assure that a 1 has been transmitted is severely depressed. Of course, a corre- sponding difficulty results from a long string of 0's. Bipolar RZ: This code is bipolar as excursion is berween +# and —V. Both logic 1 and 0 are repreiented by pulses that returns to zero within the bit interval. Fig. $.30(d) describes its timing diagram and PSD. The PSD is similar to unipolar RZ but has higher power budget though in presence of noise it performs better. Note that, in some literature instead of ‘bipolar’, the term ‘polar’ is used and AMI, discussed next, is referred as bipolar code, AMI: This is abbreviation of Alternate Mark Inversion, Fig.5.30e shows the abridged timing diagram and PSD. We explain it in more details now, In Fig. 5.32 we show again an NRZ waveform which we have just judged inadequate and in (b) we have shown an altemative more suitable waveform, A logic-0 is represented by zero volts over the whole bit interval. A logic-1 is tepresented by +¥ or -V which persists for a fraction of the bit interval, The fraction is referred to as the duty cycle and is often of the order of 50 percent. Most importantly, observe that these 50 pereent duty eyele pulses alrernaze, Two successive |’s whether they occur in neighboring bit intervals or are separated by O's are represented by pulses of opposite polarity. Such a waveform is called an alternate mark inversion (AMI) signal, the word “mark” being a telegrapher's term for a logic-1. It is apparent that neither a persistent sequence of 1's nor of 0's will generate the accumu- lation of a “de component”, Observe also that if the receiver should encounter two successive pulses of the same polarity it would be recognized as a violation of the waveform standards, Pulse Modulation and Digital Transmis Wig, 5.32 (a) An NRZ binary waveform, (b) An alternate Mark Inversion equivalent to the waveform in {a). HDB: A modified version of AM? is known as High Density Bipolar code which deliberately introduces 1's when a long string of zeros appear in AMI. The 1's are inserted in such a manner that they generate violations, i.e, they do not alternate (unlike original 1's). This additional 1s is helpful in clock synchronization. In HDB-3 code, if there are more than 3 zeros in a string the 4™ one is replaced by a violation pulse. Split-Phase (Manchester): Here, for logic 1, @ positive pulse is followed by a negative pulac, each of half-bit duration and for logic-0, a negative pulse is followed by a positive.pulse (Fig. 5.30/). Average voltage here is exactly zero and recovery of clock is easier. But note that bandwidth is roughly double of NRZ scheme due to half-bit transitions. CMI: Abbreviation Coded Mark Inversion code, this is a two level NRZ code where logic 0 is represented by a negative pulse followed by a positive pulse, each half bit duration and logic 1 is represented alternatively by +F* and —V for full bit interval (Fig. 5.30g). This code is compared with AMI and has higher clock content.Pulse Modulation aad Digitol Transmission of Analog Signat 279 — k 102 3 4 5 6 7 & 8 © MN 2 DB ah) 1 1 6 @ 0 0 4 £ © 9 O09 0 4 1 be-) 8 ET be-2) 0 9 FT 1 0 0 9 © F 4 89 09 B Oo be-3) 0 060 06H UE b(k— 4) o 0 o 0 1 1 o 8 o a 1 1 o 0 ath) Ce And we sec (A) is same as transmitted message d(h). 5.5.3 The Tl Digital System Figure 5.33 shows the basic time division multiplexing scheme, called the 71 digital system, which is used to convey multiple signals over telephone lines using wideband coaxial eable. It eccommo- dates 24 analog signals which we shall refer to as s, through 4. Each signal is bandlimited to Segnais: Samples 18000 frames/s » +}, »—. : “KJ compares ecu : 5 Pom | cornertr San t Low pass _" yo Lom Corsandor & “ — FCM decoder Ss \ Low pass fiers Fig. 5.33 A TI digital system.= Principles af Communication Systems approximately 3,3 kHz and is sampled at the rate § kHz which exceeds, by a comfortable margin, the Nyquist rate of 2 x 3.3 = 6.6 kHz. Each of the time division multiplexed signals (still analog) is next.A/D converted and companded as described in Sec. $,4.6. The resulting digital waveform is transmitted over a coaxial cable, the cable serving to minimize signal distortion and serving to Suppress signal corruption due to noises from external sources, Periodically, at approximately 6000 ft intervals, the signal is regenerated by amplifiers called repeaters and then sent on towards its eventual destination, The repeater eliminates from each bit the effect of the distortion introduced ~ by the channel. Also, the repeater removes from cach bit any superimposed noise and thus, even having received a distorted and noisy signal, it retransmits a distortionless and noise-free duplicate of the signal originally sent, Such is, of course, the case for all bits except those infrequent bits which arrive so corrupted by noise that the bit is misread. At the destination the signal is eompanded, decoded and demultiplexed, making available, individually, the 24 original signals. Bits/Frame The commutators sweep continuously from.s, to s 4 and back to s,, ¢te., at the rate of 8000 revolutions per second thereby providing 8000 samples per second of each signal. Each sample is encoded into eight bits (corresponding to 2* = 256 quantization levels). The digital signal generated during the course of one complete sweep of the commutator is therefore 24 x & = 192 bits. Frame Synchronization Ii is necessary to make available at the receiver not only the bits into which the signals have been encoded but also some synchronizing information. Without such synchronization (i.e. timing) information, the receiver cannot know which bits correspond to which of the original signals. To provide such synchronization an extra single bit is made available immediately preceding the 192 bits that carry the encoded signals, The 192 bit slots assigned to the encoded signal together with the one extra timing bit, for a total of 193 bits, is called a frame. The time sléts for the 24 signals together with the extra frame-synchronizing bit F is shown in Fig. 5.34, [= Chane! 1—+}+— Channel 2—e} [Channel 24 | ‘8th bit used for signalling once every & frames: Frames synchronizing bit Fig. 5.34 The PCM Tl frame using channel associated signalling. Twelve successive F slots are used to transmit a 12-bit code. The code happens to be 110111001000. This code is transmitted repetitively once every 12 frames and is used at the receiver to establish synchronization. Bit Rate Each signal is sampled 8000 times per second so that a complete frame occupies a time T, = V/8000 = 125 ysPulse Modulation and Digital Transmission of Analog Signal 281 — This time 7;, accommodates 193 bits so that the bit rate on a Tl channel is 193 ATV) = 135 Mb’s = 1.544 Ms Bits in the frame synchronizing code occur once per frame, or every 125 ys. Hence the frame synchronization code repeats every 1.5 ms and the frame rate is 667 frames’s. Signaling A telephone system must be able to transmit not only the speech communication but also certain other signaling and supervisory information, Thus information needs to be conveyed that a call is being initiated or terminated, specifying the address of the called party, etc. When analog transmission is employed, the signaling information is often conveyed over a channel separate from that which carries the voice. In the Ti digital system, a process of bit-slot sharing is used to allow the single channel to transmit both voice and signaling. In this sharing scheme, the cighth (least-significant) bit of cach encoded sample is used for both voice transmission and also for signaling. During five successive samplings (and hence during five successive frames) each sample is encoded into eight bits. But during the sixth frame the samples are encoded into only seven bits, the eighth bit being used for signaling. This pattern is repeated every six frames. Thus in six frames the number of bits used for quantization encoding is 5 x 8 + I x 7 = 47 so that samples are encoded on the average into 47/6 = 7 bits. The frequency of the bits used for signaling is | th of the frame bit rate, or 1 FAT sgratings ~ (8000) = 1,333 Hz This type of signaling is called channel-assaciated signaling. Line Coding for T1 System The line code used for 1 system uses AMI waveform dis- eussed in Sec. 5.5.1 but with a difference. We have noted that PCM receiver requires a bit synchronizer. That is, at receiver end we must reestablish the clock waveform which provides the timing for the transmitter, This can be generated from AMI waveform (The clock recovery is discussed in Chapter 10) itself but we need to prevent dropping out of synchronization for ex- tended period of zeros. Here, if eight or more consecutive zeros occur, the least significant bit of a ‘word in the string is changed to 1 to break the pattern, 5.5.4 Multiplexing Tl Lines-The T2, T3 and T4 Lines To take further advantage of the merits of TDM and digital transmission, the common carriers employ a hierarchy of further multiplexing as shown in Fig, 3.35, Four 71 lines are multiplexed in an M12 multiplexer to generate a 72 transmission system, seven T? lines convert to a T3 line in an Mf23 multiplexer and six 73 lines convert to a T4 line in an M34 multiplexer. At each stage additional frame synchronizing bits must be added as with the first order multiplexing so that at each multiplexer output it would be possible to. distinguish which bits belong to which input. ‘There is a problem that arises in connection with the higher orders of multiplexing that does not occur at the first order. In the first order multiplexing there is just a single clock to contend with, that is the clock that drives the commutator. However, the four input lines in the M12 multiplexer come from physically widely scparated locations and employ four separate unsynchronized clocks, These clocks are very stable crystal camtrolled oscillators which are, of course, set to operate at thePrinciples of Communication Systems 1.844 Mis 278.178 Mois Fig. 5.35 TDM hierarchy. same nominal frequency as nearly as possible. Since, however, they do not have a means of communicating with one another, they are not synchronized and will hence experience a relative frequency drift, Design specifications allow a drift from the nominal set frequency of +130 parts/ million. As may be verified, if then two clocks have frequencies which differ by 2 x 130 = 260 parts/million, the faster clack will have generated one more time slot than the slower clock in the course of just 20 frames. For proper interleaving of bits at the M2 level it is necessary that all input bit streams have or be made to appear to have the same rate. To put the matter most simplistically, the process of adjusting bit rates to make them equal involves adding bits to the slower bit stream in an operation referred to as “pulse stuffing,” Further bits must then be added to all bit streams to allow the receiver of the composite signal to distinguish time slots which carry information from stots which carry the “stuffed” bits. Bit Rate The Af12 multiplexer adds nominally 17 bits for frame synchronization and pulse stuffing, Hence the number of bits per frame 193 K441 The T2 line bit rate is therefore FAT2) = 789 bits/frame x 8000 frames/s = 6.312 Mb/s = 789 bits/frame