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AT89C51-16AI_1191543

AT89C51-16AI_1191543

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Published by Aayush Sharma

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Published by: Aayush Sharma on Jun 28, 2012
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04/21/2014

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4-29
PQFP/TQFP
23
1INDEXCORNER
34
     P    1 .    0 
     V     C      C 
     P    1 .    1     P    1 .    2     P    1 .    4     P    1 .    3      N     C 
42434041
654
44
32
26252827241819202122P1.7P1.6P1.5NC
7891011
121314151617293039
3837
3635333231NC
PSEN
     X     T     A     L    1     G      N     D     X     T     A     L    2     G      N     D     P    0  .    0      (       A     D    0      )  
ALE/PROG
     (       )       P    3  .    7     R     D
EA/VPP
     (       )       P    3  .    6      W     R
(RXD)P3.0P0.7(AD7)P2.6(A14)P0.6(AD6)P0.5(AD5)P0.4(AD4)
     P    0  .    3      (       A     D    3      )       P    0  .    2     (       A     D    2     )       P    0  .    1     (       A     D    1     )  
()P3.2INT0(TXD)P3.1(T1)P3.5()P3.3INT1(T0)P3.4P2.7(A15)
     (       A    1    1     )       P    2 .    3      (       A    1    2     )       P    2 .    4     (       A    1    0      )       P    2 .    2     (       A    9      )       P    2 .    1     (       A    8      )       P    2 .    0 
RSTP2.5(A13)
Features
Compatible with MCS-51™ Products
4K Bytes of In-System Reprogrammable Flash Memory –Endurance: 1,000 Write/Erase Cycles
Fully Static Operation: 0 Hz to 24 MHz
Three-Level Program Memory Lock
128 x 8-Bit Internal RAM
32 Programmable I/O Lines
Two 16-Bit Timer/Counters
Six Interrupt Sources
Programmable Serial Channel
Low Power Idle and Power Down Modes
Description
The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4Kbytes of Flash Programmable and Erasable Read Only Memory (PEROM). Thedevice is manufactured using Atmel’s high density nonvolatile memory technologyand is compatible with the industry standard MCS-51™ instruction set and pinout. Theon-chip Flash allows the program memory to be reprogrammed in-system or by a con-ventional nonvolatile memory programmer. By combining a versatile 8-bit CPU withFlash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer whichprovides a highly flexible and cost effective solution to many embedded control appli-cations.
PDIP
P1.0V
CC
P1.1P0.0(AD0)P1.2()P3.2INT0ALE/PROG()P3.7RDP2.3(A11)(TXD)P3.1EA/VPP()P3.6WRP2.4(A12)(RXD)P3.0P0.7(AD7)(T1)P3.5P2.6(A14)RSTP0.6(AD6)P1.7P0.5(AD5)P1.6P0.4(AD4)P1.5P0.3(AD3)P1.4P0.2(AD2)P1.3P0.1(AD1)()P3.3INT1PSENXTAL2P2.2(A10)(T0)P3.4P2.7(A15)XTAL1P2.1(A9)GNDP2.0(A8)P2.5(A13)
 
20191817161512345678910111213142122232425264039383736353433323130292827
0265F-A–12/97
(continued)
8-BitMicrocontrollerwith 4K BytesFlashAT89C51
Pin Configurations
PLCC
    P    1 .    0 
    V    C     C 
    P    1 .    1    P    0  .    0     (      A    D    0     )      P    1 .    2
ALE/PROG
    (      )      P    3  .    7    R    D    X    T    A    L    1
EA/VPP
    (      )      P    3  .    6     W    R    G     N    D
(RXD) P3.0
P0.7 (AD7)
P2.6 (A14)
P0.6 (AD6)P0.5 (AD5)P0.4 (AD4)
    P    0  .    3     (      A    D    3     )      P    1 .    4    P    0  .    2    (      A    D    2    )      P    1 .    3     P    0  .    1    (      A    D    1    )  
PSEN
    X    T    A    L    2
( ) P3.2INT0(TXD) P3.1(T1) P3.5( ) P3.3INT1(T0) P3.4P2.7 (A15)
    (      A    1    1    )      P    2 .    3     (      A    1    2    )      P    2 .    4    (      A    1    0     )      P    2 .    2    (      A    9     )      P    2 .    1    (      A    8     )      P    2 .    0     N    C 
231
RSTP1.7P1.6P1.5
INDEXCORNER
NC
    N    C 
P2.5 (A13)
34
NC
42434041654 443226252827181920 2421227891011121314151617 293039
3837
3635333231
 
AT89C51
4-30
Block Diagram
PORT 2 DRIVERSPORT 2LATCHP2.0 - P2.7FLASHPORT 0LATCHRAMPROGRAMADDRESSREGISTERBUFFERPCINCREMENTERPROGRAMCOUNTERDPTRRAM ADDR.REGISTERINSTRUCTIONREGISTERBREGISTERINTERRUPT, SERIAL PORT,AND TIMER BLOCKSSTACKPOINTERACCTMP2TMP1ALUPSWTIMINGANDCONTROLPORT 3LATCHPORT 3 DRIVERSP3.0 - P3.7PORT 1LATCHPORT 1 DRIVERSP1.0 - P1.7OSCGNDV
CC
PSENALE/PROGEA / V
PP
RSTPORT 0 DRIVERSP0.0 - P0.7
 
AT89C51
4-31
The AT89C51 provides the following standard features: 4Kbytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bittimer/counters, a five vector two-level interrupt architecture,a full duplex serial port, on-chip oscillator and clock cir-cuitry. In addition, the AT89C51 is designed with static logicfor operation down to zero frequency and supports twosoftware selectable power saving modes. The Idle Modestops the CPU while allowing the RAM, timer/counters,serial port and interrupt system to continue functioning. ThePower Down Mode saves the RAM contents but freezesthe oscillator disabling all other chip functions until the nexthardware reset.
Pin Description
V
CC
Supply voltage.
GND
Ground.
Port 0
Port 0 is an 8-bit open drain bidirectional I/O port. As anoutput port each pin can sink eight TTL inputs. When 1sare written to port 0 pins, the pins can be used as high-impedance inputs.Port 0 may also be configured to be the multiplexed low-order address/data bus during accesses to external pro-gram and data memory. In this mode P0 has internal pul-lups.Port 0 also receives the code bytes during Flash program-ming, and outputs the code bytes during program verifica-tion. External pullups are required during program verifica-tion.
Port 1
Port 1 is an 8-bit bidirectional I/O port with internal pullups.The Port 1 output buffers can sink/source four TTL inputs.When 1s are written to Port 1 pins they are pulled high bythe internal pullups and can be used as inputs. As inputs,Port 1 pins that are externally being pulled low will sourcecurrent (I
IL
) because of the internal pullups.Port 1 also receives the low-order address bytes duringFlash programming and verification.
Port 2
Port 2 is an 8-bit bidirectional I/O port with internal pullups.The Port 2 output buffers can sink/source four TTL inputs.When 1s are written to Port 2 pins they are pulled high bythe internal pullups and can be used as inputs. As inputs,Port 2 pins that are externally being pulled low will sourcecurrent (I
IL
) because of the internal pullups.Port 2 emits the high-order address byte during fetchesfrom external program memory and during accesses toexternal data memory that use 16-bit addresses (MOVX @DPTR). In this application it uses strong internal pullupswhen emitting 1s. During accesses to external data mem-ory that use 8-bit addresses (MOVX @ RI), Port 2 emits thecontents of the P2 Special Function Register.Port 2 also receives the high-order address bits and somecontrol signals during Flash programming and verification.
Port 3
Port 3 is an 8-bit bidirectional I/O port with internal pullups.The Port 3 output buffers can sink/source four TTL inputs.When 1s are written to Port 3 pins they are pulled high bythe internal pullups and can be used as inputs. As inputs,Port 3 pins that are externally being pulled low will sourcecurrent (I
IL
) because of the pullups.Port 3 also serves the functions of various special featuresof the AT89C51 as listed below:Port 3 also receives some control signals for Flash pro-gramming and verification.
RST
Reset input. A high on this pin for two machine cycles whilethe oscillator is running resets the device.
ALE/PROG
Address Latch Enable output pulse for latching the low byteof the address during accesses to external memory. Thispin is also the program pulse input (PROG) during Flashprogramming.In normal operation ALE is emitted at a constant rate of 1/6the oscillator frequency, and may be used for external tim-ing or clocking purposes. Note, however, that one ALEpulse is skipped during each access to external Data Mem-ory.If desired, ALE operation can be disabled by setting bit 0 ofSFR location 8EH. With the bit set, ALE is active only dur-ing a MOVX or MOVC instruction. Otherwise, the pin isweakly pulled high. Setting the ALE-disable bit has noeffect if the microcontroller is in external execution mode.
PSEN
Program Store Enable is the read strobe to external pro-gram memory.
Port PinAlternate Functions
P3.0RXD (serial input port)P3.1TXD (serial output port)P3.2INT0 (external interrupt 0)P3.3INT1 (external interrupt 1)P3.4T0 (timer 0 external input)P3.5T1 (timer 1 external input)P3.6WR (external data memory write strobe)P3.7RD (external data memory read strobe)

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