Code No: RR410505
Set No. 1
IV B.Tech I Semester Regular Examinations, November 2005 VLSI SYSTEMS DESIGN ( Common to Computer Science & Engineering, Computer Science & Systems Engineering and Ele...
1. Define Threshold voltage The threshold voltage Vt for a MOS transistor can be defined as the voltage between the gate and the source terminals below which the drain to source current effectively...
101+ Commonly Asked Interview Questions
These interview questions are taken from sheets I picked up at an Illinois Library Association conference session. And a few others which I've heard about. T...
VLSI JAGRITI is a Monthly Newsletter From JBTech INDIA (www.jbtechindia.com) we Deal in VLSI Training and Solutions , Embedded Training and Solutions... Modules are Verilog , VHDL , FPGA , Analog ,...
VLSI Interview questions CISCO: 1)
Find V1? V1 1ohm
1ohm 1ohm
1ohm 3V
1ohm
6V 1ohm
1ohm
2) Some star to delta conversion networks for finding the R 3) What shud we do to reduce latch up ----...
VLSI
Very Large Scale Integration
•ƒ Integration of (mathematical expression) dx •ƒ Integration of (Transistors and complex logic
gates)
1940
Transistors invented in Bell Laboratory
1950 1960...
VLSI 100 Questions
1. 2. 3. 4.
State Moore’s law. Design the 4:1 multiplexer circuit using TG switches. Design a 4:1 mux using three 2:1 TG multiplexers. Consider the 2-input XOR function. ρ a) D...
Code No: 54117/MT M.Tech. – I Semester Supplementary Examinations, September, 2008 LOW POWER VLSI DESIGN (Common to Digital Systems & Computer Electronics/ Wireless & Mobile Communication) Time: 3h...
VLSI 100 Questions
1. 2. 3. 4.
State Moore’s law. Design the 4:1 multiplexer circuit using TG switches. Design a 4:1 mux using three 2:1 TG multiplexers. Consider the 2-input XOR function. ρ a) D...
Code No: RR410505
Set No. 1
IV B.Tech I Semester Regular Examinations, November 2007 VLSI SYSTEMS DESIGN ( Common to Computer Science & Engineering, Computer Science & Systems Engineering and Ele...
1. what is the difference between mealy and moore state-machines 2. How to solve setup & Hold violations in the design To solve setup violation 1. optimizing/restructuring combination logic between...
Electronics hardware interview questions
=Electronics Hardware Questions=
HITEQUEST
technical questions for engineers
q
Two capacitors are connected in parallel through a switch. C1= 1uF, C2= 0.2...
VLSI FAQs 1. What is metastability? When setup or hold window is violated in an flip flop then signal attains a unpredictable value or state known as metastability. 2. What is MTBF? What it signifi...