# Experiment No. 5 Half Subtractor and Full Subtractor I. Introduction and Objectives.

A half-subtractor is a combinational circuit which is used to perform subtraction of two bits. It has two inputs, X (minuend) and Y (subtrahend) and two outputs D (difference) and B (borrow). A full subtractor is made by combining two halfsubtractors and an additional OR-gate. A full subtractor has the borrow in capability (denoted as BORIN in the diagram below) and so allows cascading which results in the possibility of multi-bit subtraction. With this introduction, we give you our objectives with this experiment as follows: • To verify the theoretical concept from the actual concept in order to prove the half subtractor and full subtractor circuit. • To cascade half adder/full adder logic circuits for the purpose of making a subtractor register/circuit web.

II. Half subtractor

A. HS Block Diagram
A B HS Bu D

Truth Table Input A 0 0 1 1 C. Truth Table Verification Input A 0 0 1 1 B 0 1 0 1 Output (LED) D (ON/ OFF) 0 1 1 0 Output (Bu) Bu (ON/ OFF) 0 1 0 0 .B. Circuit Diagram E. Boolean Equation B 0 1 0 1 D 0 1 1 0 Output Bu 0 1 0 0 D=A + B Bu = A B D.

FS Block Diagram 2. Proof III. Full Subtracter 1. K-Map B 0 0 1 1 0 1 1 C 0 1 0 1 0 0 1 Output D 0 1 1 0 1 0 1 Bu 0 1 1 1 0 0 1 .F. Truth Table Input A 0 0 0 0 1 1 1 3.

C AB C C 1 1 1 1 AB 00 AB AB AB 01 11 10 D= A’ B’ C + A’ B C’ =A’(B’C+BC’) + A (B’C’+BC) = A’ (B + C) + A ( B + C) =x+ y D= A + B + C C 1 1 1 1 C A B 00 A B 01 A B 11 A B 10 Bu = A B + A C + B C .

Circuit Diagram .4.

Proof .5.Truth Table Verification A Inputs B C D (LED) Outputs D Bu (DMM) (LED) Bu (DMM) 6.