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RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B.Tech. (Comp. Engg.) V-VI Sem. 2010-11
5CS1 COMPUTER ARCHITECTURE (Common to Comp. Engg. & Info. Tech) Class: V Sem. B.Tech. Branch: Computer Engg. Schedule per Week Lectures: 3, Tutorial: 1 Units Contents of the subject Introduction to Computer Architecture and Organization. Von Neuman Architecture, Flynn Classification. Register Transfer and Micro operations: Register transfer language, Arithmetic Micro-operations, Logic Micro-operations, Shift Micro-operations, Bus and memory transfers. Computer Organization and Design: Instruction cycle, computer registers, common bus system, computer instructions, addressing modes, design of a basic computer Central Processing Unit: General register organization, stack organization, Instruction formats, Data transfer and manipulation, program control. RISC, CISC characteristics. Pipeline and Vector processing: Pipeline structure, speedup, efficiency, throughput and bottlenecks. Arithmetic pipeline and Instruction pipeline. Computer Arithmetic: Adder, Ripple carry Adder, carry look Ahead Adder, Multiplication: Add and Shift, Array multiplier and Booth Multiplier, Division: restoring and Non-restoring Techniques. Floating Point Arithmetic: Floating point representation, Add, Subtract, Multiplication, Division. Memory Organization: RAM, ROM, Memory Hierarchy, Organization, Associative memory, Cache memory, and Virtual memory: Paging and Segmentation. Input-Output Organization: Input-Output Interface, Modes of Transfer, Priority Interrupt, DMA, IOP processor. Evaluation Examination Time = Three (3) Hours Maximum Marks = 100 [Mid-term (20) & End-term (80)]
Text/References: 1. Computer Organization and Architecture - William Stallings (Pearson Education Asia) 2. Computer Organization and Architecture -John P. Hayes (McGraw -Hill) 3. Computer Organization -V. Carl. Hamacher (McGraw-Hill)
RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B.Tech. (Comp. Engg.) V-VI Sem. 2010-11
5CS2 Digital Logic Design (Comp. Engg.) Class: V Sem. B.Tech. Branch: Computer Engg. Schedule per Week Lectures: 3 Evaluation Examination Time = Three (3) Hours Maximum Marks = 100 [Mid-term (20) & End-term (80)]
Contents of the subject
Hardware Description Languages and their use in digital logic design. VHDL: Modelling Concepts, Lexical Elements & Syntax Descriptions, Scalar Data types & Operations, Sequential Statements, Composite Data Types & Operations, Basic Modelling Constructs. Case Study: VHDL Simulation of Ripple Carry, & Look Ahead carry Adders. VHDL: Subprograms, Packages & Use Clauses, Aliases, Resolved Signals, Components & Configurations, Generate Statements, Concurrent Statements. Use of VHDL in simulation and synthesis. Clocked Sequential circuits. Design steps for synchronous sequential circuits. Design of a sequence detector. Moore and Mealy Machines. Design using JK flip-flops and D flip-flops. State reduction, State assignment, Algorithmic State Charts, converting ASM charts to hardware, one-hot state assignment. Considerations of clock skew, set-up time, hold-time and other flip-flop parameters, timing constraints. Programmable Logic Devices. Read-only memory. Boolean function implementation through ROM. PLD, PGA, PLA, PAL, FPGA. Event-driven Circuits. Design procedure for asynchronous circuits, stable and unstable states, races, race-free assignments. State reduction of incompletely specified machines. Compatibility and state reduction procedure. Hazards in combinational networks. Dynamic hazards, Function Hazards, and Essential Hazards. Eliminating hazards. Field Programmable Gate Arrays: Introduction, Logic Elements & programmability, Interconnect structures & programmability, Extended Logic Elements, SRAM, Flash Memory & Antifuse Configuration, Case Studies of Altera Stratix & Xilinx Virtex-II pro. Technology Mapping for FPGAs: Logic Synthesis, Lookup Table Technology Mapping.
Brian Holdsworth and Clive Woods. Digital Logic Design. Newnes (Elsevier). [Available in Indian Edition]. Ashenden, The Designer’s Guide to VHDL, Elsevier.
Stephen D. Brown, et.al., Field Programmable Gate Arrays, Kluwer Academic Publishers. Scott Hauck, André DeHon , Reconfigurable computing: the theory and practice of FPGA-based computation, Morgan Kauffman
Text Book: 1. 2.
5. 6. 7.
Zvi Kohavi: Switching and Finite Automata Theory. TMH. Parag K. Lala, Practical Digital Logic Design and Testing. PHI Stephen H. Unger, The essence of logic circuits. Wiatrowski & House.
RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B.Tech. (Comp. Engg.) V-VI Sem. 2010-11
5CS3 TELECOMMUNICATION FUNDAMENTALS (Common to Comp. Engg. & Info. Tech) Class: V Sem. B.Tech. Branch: Computer Engg. Schedule per Week Lectures: 3 I Evaluation Examination Time = Three (3) Hours Maximum Marks = 100 [Mid-term (20) & End-term (80)]
Data Transmission: Terminology, Frequency, spectrum, bandwidth, analog and digital transmission, Transmission impairments, channel capacity including sampling theorem and Fourier series. Transmission Media: Transmission of signals through Twisted pair, Coaxial cable, optical fibre (SM, MM, Graded Index). Wireless Transmission: Antenna and antenna gain, introduction to terrestrial and satellite microwave, Propagation of wireless signals, free space loss for LOS communication. Review of Line Encoding Schemes. Concept of bit period, effect of clock skew, Synchronous and Asynchronous communication Network Reference Models (OSI/ISO and TCP/IP) II Data Link Layer: Functions performed by data link layer, Data link Layer design issues Error Control Coding: Error Detection, Two Dimensional Parity Checks, Internet Checksum. Polynomial Codes, Standardized polynomial codes, error detecting capability of a polynomial codes. Linear codes, performance of linear codes, error detection & correction using linear codes. Flow Control: Flow control in loss less and lossy channels using stop-and-wait, sliding window protocols. Performance of protocols used for flow control. III Data Link Control: HDLC & PPP including frame structures, MAC sublayer: Pure and slotted Aloha, CSMA, CSMA/CD, collision free multiple access. Throughput analysis of pure and slotted Aloha, delay & throughput analysis of CSMA and CSMA/CD IV Multiplexing: Frequency division, time division (Synchronous and statistical) multiplexing. ADSL, DS1 and DS3 carriers. Multiple Accesses: Performance of FDMA-FM-FDMA, Single channel per carrier. TDMA frame structure, TDMA Burst Structure, TDMA Frame efficiency, TDMA Superframe structure, Frame acquisition and synchronization, Slip rate and in digital terrestrial networks. Switching: Qualitative description of Space division, time division and space-time-space division switching. V Spread Spectrum Techniques: Direct sequence(DSSS) & frequency hopping(FHSS); Performance consideration in DSSS & FHSS; Code division Multiple access (CDMA): frequency & channel specifications, forward & reverse CDMA channel, pseudo noise(PN) sequences, m-sequence, gold sequence, orthogonal code, gold sequences, Walsh codes synchronization, power control, handoff, capacity of CDMA system, IMT-2000, WCDM Text/References: 1. Stallings, Data and computer communication, 8th ed. Pearson 2. Tri.T.Ha, Digital Satellite Communications, 2/e, Tata McGraw Hill 3. Alberto Leon-Garcia, Indra Widjaja, COMMUNICATION NETWORKS, 2nd ed., TMH 4. Wireless Communications, 2/e, Rappaport, PHI 5. Analysis of Computer and Communication Networks, ISBN: 0387744363, Fayez Gebali, 2008, Springer-verlag, 1st Ed.
Purpose. Data Dictionary. Tech) Class: V Sem. Normalization-Decomposition into BCNF Decomposition into 3-NF. Nested Queries. Domain Relational Calculus. Bitmap Indices. Almasri and S. Deadlock handling. Validation-based protocols. Recovery with Concurrent transactions. Third Normal Form.  Schema Refinement And Normal Forms: Introductions to Schema Refinement. Index Definition in SQL. Conflict vs. Dynamic SQL. SQL Functions. Dynamic Hashing. Testing for Serializability. 2010-11 5CS4 DATABASE MANAGEMENT SYSTEMS (Common to Comp. Relational Model.Aggregation. View Serializability. Attributes and Entity Sets. Structure of a DBMS-Query Processor. File System v/s DBMS.Tuple Relational Calculus. Navathe: Fundamentals of Database Systems. Design issues.  Transaction Processing: Introduction-Transaction State. Relational calculus. Multigroup Functions. (Comp. SQL-Clauses. Renaming. Ordered Indices. Concurrent Executions. case study of an Enterprise. Static Hashing. Data Models Introduction-Network Model. Need of Serializability. B. Embedded SQL. Entities.Tech. Entity Relationship Model and Object Oriented Model. Functional Dependencies. Set Operations. & Info. Boyce-Codd Normal Forms. Generalization and Specialization.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B.  Database Failure and Recovery: Database Failures. Recovery Schemes: Shadow Paging and Log-based Recovery. Branch: Computer Engg.  Concurrency Control: Implementation of Concurrency: Lock-based protocols.  Algebra: Relational Algebra: Operations: Selection. DCL and DML. Set. Transaction properties. McGraw Hill 2.  Hashing: Indexing and Hashing Basic Concepts. Multiple Key Access.  Query Languages: Procedural and Non Procedural. Aggregate Operators.B. Denormalization.) V-VI Sem. Division. Triggers. Storage Manager. Key Constraints. Null Values. Engg.12.  Model: Entity Relationship Model Structure of RDMS and Database Schema. DDL. Schedule per Week Lectures: 3 Units Contents of the subject Evaluation Examination Time = Three (3) Hours Maximum Marks = 100 [Mid-term (20) & End-term (80)] I II III IV V Introduction: Introduction Applications. Joints. Relationship and Relationship Sets. Comparison of Ordered Indexing and Hashing. Transaction Manager.Tech. Weak Entity Set. Cascadeless Schedules. .07. Timestamp-based protocols. Integrity Constraints. Recoverable Schedules. Participation Constraints (Mapping Cardinalities). B-Tree Index Files. Extended Features. Projection. Engg. H. Hierarchical Model.Single Row Function.f. Database Users and Administrator.  Text/References: 1. B+ -Tree Index Files. Data Abstraction (views). Korth and Silberschatz: Database Systems Concepts.
Addison Wesley 5. Hansen and Hansen : DBM and Design.07. (Comp.) V-VI Sem. C. 2010-11 3. PHI .Tech.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B.J. Engg. Date: Data Base Design. McGraw Hill 4.12. Ramakrishnan and Gehrke: Database Management System.
Basic idea of MM in Linux & windows.preemptive and non-preemptive. concepts. monitors. paging scheme.disabling interrupts. layered architecture/logical structure of operating system.processes versus threads.approximation clock. A. context switching. Race condition.block and character.first fit. deadlock problem. (Comp. operating system as resource manager and virtual machine. worst fit. overview of file system in Linux & windows. process control block. sleep and wakeup calls. process implementation. TSL instructions. Ltd. Threads. SystemFile System concepts. deadlock avoidance. quick fit. functions/goals. multilevel feedback queue scheduling. medium. next fit. NRU. classification. disk storage capacity. dispatcher. logical and physical address space. shortest remaining time. Criteria/Goals/Performance Metrics. B. Schedule per Week Lectures: 3 Units I Contents of the subject Introduction and need of operating system. shared pages. design issues for paging system. models. buddy’s system. load control.) V-VI Sem. memory mapped files. functions. multithreading models. LRU. pure segmentation and segmentation with paging scheme hardware support and implementation details. Basic System calls. static & dynamic loading. virtual address space. Input/Output subsystems. semaphore. communicationInterprocess communication Introduction to message passing. scan scheduling.Tech. Firmware. separate instruction and data spaces. termination. SJFS. working set model.FCFS. relocation and address translation. multilevel queue scheduling. Silberschatz and Peter B Galvin: Operating System Principals. second chance. classical IPC problems. shared libraries. demand paging. path name. OS services. Direct . CPU and I/O bound. Co-operative & Non-cooperative. methods for deadlock handling. deadlock characterization. mutual exclusion with busy waiting.short. file sharing. Branch: Computer Engg. Engg. disk attachment. memory fragmentation. deadlock prevention.12. page fault frequency. hierarchy. page fault handling. memory protection and sharing.FCFS. directory operations. Peterson’s solution. I/O interlock. thread usage. DeadlockDeadlock System model. swapping.Index Sequential) methods. benefits. Belady’s anomaly. Wiley India Pvt. FIFO.bitmap. creation. types. file organization & access(Sequential. threading. CPU scheduler.creating a load module. pre-paging. loading. schedulingProcess scheduling Basic concepts. managementProcess management Process model. Fair share scheduling. C-scan schedule. WS clock. long-term. structure. two level. address binding. Free space management. kernel & user level threads. disk structure & operation. states & transitions. Round robin.Tech. System Calls/Monitor Calls. file system mounting. resource types. managementMemory management concepts. 2010-11 5CS5 OPERATING SYSTEMS (Common to Comp. cleaning policy. Type of OS. LRU. TLB ( translation look aside buffer) reach. strict alteration. Boot Strap Loader. busy waiting. SSTF. distance string. best fit. hierarchical/tree. degree of multiprogramming. Priority scheduling. naming.local versus global allocation policies. lock variables. BIOS.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B.BIOS. Static and Dynamic Priority. static & dynamic linking. general graph.Linux & Windows. MemoryVirtual Memory concept. scheduling algorithms. & Info. disk scheduling algorithm. input/output devices.optimal. page size. recovery from deadlock.concepts. critical section problem. directory structuresone level. inverted page table.07. Tech) Class: V Sem. program structure. operations. Evaluation Examination Time = Three (3) Hours Maximum Marks = 100 [Mid-term (20) & End-term (80)] II III IV V Text/Reference Books: 1. thrashing. scheduling:. Engg. link list/free list. attributes. deadlock detection. . acyclic graph. memory allocation schemes. page replacement algorithms. spooling.
Tata McGraw Hill.12. . Tata McGraw Hill 3. Engg.) V-VI Sem. (Comp. 4.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B. DM Dhamdhere: Operating Systems – A Concepts Based Approach. Achyut S Godbole: Operating Systems. Prentice Hall. 2010-11 2. Tanenbaum: Modern Operating System.Tech. Tata McGraw Hill 5. Charles Crowly: Operating System A Design – Oriented Approach.07.
Tech. 3. Solving Modular Linear equation.07. 2-3 Trees and Red. Cut-sets. Modular arithmetic. Finding all Spanning Trees in a Weighted Graph. Breadth First and Depth First Search. Computation of Discrete Logarithms. Addison Wesley 4. PHI. Kuratovski's two Graphs. Schedule per Week Lectures: 3 Units I Contents of the subject ADVANCED TREES: Definitions. Rivest: Introduction to Algorithms.Tech. Brassard : Fundamental of Algorithmics. Horowitz and Sahani: Fundamental of Computer algorithms. Operations on Disjoint sets and its union-find problem.Vertices Planer and Dual graphs. Prentice Hall of India. GCD. 2-3-4. 2. Single Min-Cut Max-Flow theorem of Network Flows. (Comp. primality Testing and Integer Factorization. Tech) Class: V Sem.) V-VI Sem. Amortization analysis and Potential Function of Fibonacci Heap. Cut. Circuits. Leiserson. power of an element. Strongly Connected Components and Articulation Point. Binomial Trees. Dynamic Order Statistics. Engg.V . Evaluation Examination Time = Three (3) Hours Maximum Marks = 100 [Mid-term (20) & End-term (80)] II V Text/References: 1.12. Topological Sort. bitonic sorting and merging network sorter. J. Ford-Fulkerson Max Flow Algorithms. MERGEABLE HEAPS: Mergeable Heap Operations. B. Spanning Trees. Implementing Fibonacci Heap.1 ADVANCED DATA STRUCTURE (Common to Comp. & Info. recursion. Aho A.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B. Branch: Computer Engg. GRAPH THEORY DEFINITIONS: Definitions of Isomorphic Components. Implementing Binomial Heaps and its Operations. NUMBER THEORITIC ALGORITHM: Number theoretic notions. SORTING NETWORK: Comparison network. Engg. . Operations on Weight Balanced Trees (Huffman Trees). Interval Tree. 2010-11 5CS6. Trees and 2-3-4 Heaps. Dictionaries. zero-one principle. Fundamental Circuits. Implementing Sets. Chinese Remainder Theorem. IV Priority Queues and Concatenable Queues using 2-3 Trees. Division theorem.D Ulman: Design and analysis of Algorithms.Black Trees. Cormen. III GRAPH THEORY ALGORITHMS: Algorithms for Connectedness.
K. 2/e.) Class: V Sem. Z-transform: The region of convergence for the Ztransform. IV Linear Convolution using DFT.IIR filter design by impulse invariance & Bilinear transformation. Text/References: 1. Fourier Transform: Discrete time Fourier transform for periodic and aperiodic II signals. Design of FIR filters by Windowing: Rectangular. Properties of Z transform. Linear time invariant systems . Pearson Education 2.12. S. Tata McGraw Hill . Sampling theorem.) V-VI Sem. Efficient computation of the DFT: Decimation– in-Time and Decimation-in frequency FFT Algorithms. 2010-11 5CS6. Interpolation technique for the reconstruction of a signal from III its samples. FILTER DESIGN TECHNIQUES: Structures for discrete-time systems. Properties of DTFT.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B. 4/e. Properties of LTI I systems and their block diagrams. Basic structures for IIR and FIR V systems. Sampling of discrete time signals.discrete time. SAMPLING: Mathematical theory of sampling.07. Hamming & Kaiser. Digital Signal Processing. Oppenheim. Engg. Engg. Sampling in freq. (Comp. 2/e. Transposed forms.Block diagram and signal flow graph representation of LCCD (LCCD – Linear Constant Coefficient Difference) equations. domain. THE DISCRETE FOURIER TRANSFORMS (DFT): Properties of the DFT. B. Branch: Computer Engg.2 DIGITAL SIGNAL PROCESSING (Comp. Proakis.Tech. Ideal & Practical sampling. The Inverse Z-transform. properties of discrete time systems. Discrete time systems described by difference equations. Aliasing. Discrete-Time Signal Processing. Introduction to filter Design: Butterworth & Chebyshev.Tech. Pearson Education 3. Convolution.Mitra. Schedule per Week Lectures: 3 Units Contents of the subject Evaluation Examination Time = Three (3) Hours Maximum Marks = 100 [Mid-term (20) & End-term (80)] INTRODUCTION : Discrete time signals and systems. Digital Signal Processing.
. B. Evaluation Examination Time = Three (3) Hours Maximum Marks = 100 [Mid-term (20) & End-term (80)] II III IV V Text/References 1.Tech.Tech. conversion of non systematic form of matrices into systematic form.) V-VI Sem. Mutual information. Wiley. Engg.3 INFORMATION THEORY & CODING (Comp.12. Digital Communication. Cyclic Code: Code Algebra. Shannon limit. Information and Entropy. Engg. parity check polynomial. Uncertainty.) Class: V Sem. 2010-11 5CS6. Source coding schemes for data compaction: Prefix code. coding & decoding of linear block code. Schedule per Week Lectures: 3 Units I Contents of the subject Introduction to information theory. Information measures for continuous random variables. Huffman code. Basic properties of Galois fields (GF) polynomial operations over Galois fields. Trllis and state diagram. Discrete Memory less channels. Branch: Computer Engg. (Comp. Convolutional Code: Convolutional encoders of different rates. Channel coding theorem. Maximum likelihood decoding of convolutional code: The viterbi Algorithm fee distance of a convolutional code. Simon Haykin. minimum distance consideration. Code Tree.07. source coding theorem. Conditional entropy. Shanon-Fane code & Hempel-Ziv coding channel capacity. Linear Block Code: Introduction to error connecting codes. Encoder & decoder for cyclic codes.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B. generating cyclic code by generating polynomial.
2. For multi-user application. Designing database and writing applications for manipulation of data for a stand alone and shared data base including concepts like concurrency control. 2. Visual FoxPro or any similar database having both the database and manipulation language may be used.07. Engg. Finding the data fields to be used in the database. Suggested Tools: For standalone environment.Tech. All the above steps may then be followed for development of a database application to be used by multiple users in a client server environment with access control. 4.: 3 Evaluation Examination Time = Four (4) Hours Maximum Marks = 100 [Sessional/Mid-term (60) & End-term (40)] Objectives: At the end of the semester. One exercise may be assigned on creation of table. Indicative List of exercises: 1. views etc. . it is expected that each students will chose one problem. The application shall NOT use web techniques.12. Student grievance registration and redressal system. any other database may also be used. logging. B. Schedule per Week Practical Hrs. MYSql is suggested.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B. 2010-11 5CS7 DATABASE LAB (Common to Comp. VB. preparing ER diagram. the students should have clearly understood and implemented the following: 1. database including analysis of functional 6. & Info. Student information system for your college. 8. Preparing ER diagram 3. manipulation of data and report generation using SQL. 7. Selecting fields for keys. Get acquainted with SQL. transaction roll back. In order to achieve the above objectives. Stating a database design & application problem. VB Script or any other convenient but currently used by industry may be chosen. However. The problem may first be implemented for a standalone system to be used by a single user. Normalizing the dependencies.Tech. Installing and configuring the database server and the front end tools. Engg. Java. (Comp. Tech) Class: V Sem. 5. Branch: Computer Engg. designing of database. report generation etc. For front end. normalization and finally manipulation of the database including generation of reports. The implementation shall being with the statement of the objectives to be achieved.) V-VI Sem.Net.
4. Engg. Guarantee management system for the equipments in your college. A video library management system for a shop. . (Comp.12.Tech.) V-VI Sem. Inventory management system for a hardware/ sanitary item shop. 5. 2010-11 3.07.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B. 6. Inventory management system for your college.
The Interaction or Communication Model . digital camera. Activity graphs describe the workflows the system will implement. Branch: Computer Engg. may also be chosen. Capture a business process model. implementation and finally for product development. The students shall be able to use following modules of UML for system description.Tech. Schedule per Week Practical Hrs : 3 Objectives: Evaluation Examination Time = Four (4) Hours Maximum Marks = 75 [Sessional/Mid-term (45) & End-term (30)] 1. Engg. The Physical Component Model . Engg.12. The students shall be assigned one problem on software based systems and another involving software as well as hardware.describes the software (and sometimes hardware components) that make up the system.) V-VI Sem. B. - - The students are expected to use the UML models. air conditioner controller.describes the boundary and interaction between the system and users.) Class: V Sem. Corresponds in some respects to a requirements model.describes the physical architecture and the deployment of components on that hardware architecture. washing machine controller.State charts describe the states or conditions that classes assume over time. an elctronic fan regulator. (Comp. 2010-11 5CS8 SYSTEM DESIGNS in UML LAB (Comp. The State or Dynamic Model . Some hardware products like digital clock.07.describes how objects in the system will interact with each other to get work done.Tech. an elementary mobile phone etc. The Logical or Class Model . .describes the classes and objects that will make up the system. The Physical Deployment Model . prepare necessary documents using UML and implement a system.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B. The User Interaction or Use Case Model .
2010-11 5CS9 OPERATING SYSTEMS SIMULATION LAB (Common to Comp. Tech) Class: V Sem. Following modules of the simulator may be used: Scheduling Deadlock Memory Management Systems File system simulator Algorithms described in the text may be assigned.Tech. The simulation results such as average latency. B. . Exercises shall be given on simulation of algorithms used for the tasks performed by the operating systems.07. Schedule per Week Practical Hrs : 3 Objectives: Evaluation Examination Time = Four (4) Hours Maximum Marks = 100 [Sessional/Mid-term (60) & End-term (40)] Understand the basic functions of operating systems. (Comp. Recommended Excercises: A. B.ontko. One exercise shall be on simulation of algorithms reported in the recent conferences/ journals and reproducing the results reported therein. Engg. Engg. Understand & simulate strategies used in Linux & Windows operating systems.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B. hit & Miss Ratios or other performance parameters may be computed.com/moss/).MOSS preferably on Linux platform (Available for free download from http://www. & Info. In depth knowledge of the algorithms used for implementing the tasks performed by the operating systems.Tech. Develop aptitude for carrying out research in the area of operating system. Suggested Tools: Operating system simulator.12. Branch: Computer Engg.) V-VI Sem.
Library of digital ICs have to be built. Simulate & realize a Four bit Adder o Design and simulation of a 4-bit Adder o VHDL/Verilog HDL (Hardware description language) o Interfacing 7-segment decoder • Combinational Multiplier o 4x4-bit multiplier o Binary-to-BCD conversion o Timing Constraints CRC checksum generator & verifier Realizing a carry look ahead adder • • • • . Engg.Tech. its simulation and finally realization on breadboard. Branch: Computer Engg. For this. (Comp. the students shall be able to • • • • • Should be able to design datapath for digital systems Create a digital system using discrete digital ICs Design a hard wired / micro-programmed control circuit Simulate a digital datapath in Hardware Description Language Understand IC descriptions and select proper IC in a given circuit based on its timing characteristics Suggested Methodology and tools: Hardware description language like Verilog /VHDL can be used for simulation. 2010-11 5CS10 DIGITAL HARDWARE DESIGN LAB (Common to Comp.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B. Suggested Execises • Create a microprocessor from ALU 74181. the students may design a small instruction set and attach necessary registers and suitable control unit to realize a microprocessor. Similarly. Tech) Class: V Sem. The exercise shall involve design of datapath. Engg.12. Simulate and realize a Cordic calculator.07. B. & Info. manuals of Digital IC families have to be placed in the laboratories for reference by students.Tech. Schedule per Week Practical Hrs : 3 Evaluation Examination Time = Four (4) Hours Maximum Marks = 75 [Sessional/Mid-term (45) & End-term (30)] Objectives: At the end of course.) V-VI Sem.
connection Establishment. I Congestion control: General principle of congestion control. exploiting heterogeneity. IP addressing including Subnet addressing.) V-VI Sem. 4rd Ed. 3. Kurose. Branch: Computer Engg. Domain Name System: Name Space. Application Layer: Service needs. TCP service Model. Internetworking: Differences in networks. introduction to DNS poisoning. Channel with bit errors and Lossy Channel with bit errors. jitter control Quality of service: requirements and techniques. packet headers etc. ICMP. TCP Congestion Control: Fairness. BOOTP. name servers. Crash Recovery. IMAP. & Info. Schedule per Week Lectures: 3 Evaluation Examination Time = Three (3) Hours Maximum Marks = 100 [Mid-term (20) & End-term (80)] NOTE: The first 2 lectures shall be devoted to review of the basis architectures and responsibilities of different layers. DHCP(only working and purpose.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B. 2010-11 6CS1 COMPUTER NETWORKS (Common to Comp. load shedding. performance enhancement. Computer Network. Units Contents of the subject Network layer. 2. concatenated virtual circuit. Electronic Mail: Architecture and services. HTTP. responsibilities of client and server sides. OSPF. Internetwork routing. ELSEVIER . Computer Networks.07. Pearson. B. Peterson. Engg. Differences in IPV6 over IPV4 Transport layer: Services provided. World Wide Web: Architecture. BGP. Tanenbaum. RTP. Computer Networking. resource record. MIME message formats.Tech. link state. connecting networks. IV transmission policy. Pearson..12. flooding. SMTP. TCP Header and segment structure. III UDP. NAT. Transport Layer in the Internet: Introduction to TCP. connection release. routing algorithms: Optimally principle short path. not included).. connectionless internetworking. congestion control in Datagram subnets. Text/References: 1.Network layer design issue. timer management. Distance vector. Transport service primitives. Multiplexing. 4th Ed.Tech. Elements of Transport protocols: addressing. Fragmentation II Network layer in the Internet: IPV4. RPC.. Flow control & Buffering. P2P File Sharing: Centralized Directory. Engg. TCP delay modeling. V POP3. Query flooding. Tunneling. Tech) Class: VI Sem. resolution process. Davie. ARP. RARP. Transactional TCP. TCP connection establishment and release. CIDR. 3rd Ed. congestion prevention policies. (Comp. hierarchical. Principles of Reliable Data Transfer: Reliable data transfer over a perfectly reliable channel. Broadcast routing. IGMP.
Schedule per Week Lectures: 3 Units Contents of the subject Evaluation Examination Time = Three (3) Hours Maximum Marks = 100 [Mid-term (20) & End-term (80)] BACKGROUND: Review of Algorithm Complexity. randomized algorithm for 2SAT. GREEDY METHOD: Knapsack Problem. Order Notations: definitions and calculating complexity. Decision Problems. 3.Satisfiability problem and Vertex Cover Problem. (Comp. randomized algorithm for Min-Cut.) V-VI Sem. II III IV V Text/References: 1. Rivest: Introduction to Algorithms. Branch: Computer Engg. Aho A. NP-Hard and NP-Complete Problems. Tech. Las Vegas algorithms. Horowitz and Sahani: Fundamental of Computer algorithms. Approximation Algorithms for Vertex Cover and Set Cover Problem. Flow shop scheduling and Network capacity assignment problems. Backtracking Algorithms and queens problem. NP-HARD AND NP-COMPLETE: Definitions of P. B. NP-Hard and NP-Complete Problems. ASSIGNMENT PROBLEMS: Formulation of Assignment and Quadratic Assignment Problem. BRANCH AND BOUND: Traveling Salesman Problem and Lower Bound Theory. Cook's Theorem. PATTERN MATCHING ALGORITHMS: Naïve and Rabin Karp string matching algorithms. Longest Common Subsequence and 0/1 Knapsack Problem.) Class: VI Sem.12.07. Quick sort and Strassen's matrix multiplication algorithms. Proving NP-Complete Problems . Monte Carlo algorithms.Tech.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B.Tech. Decision Problems.V . Cormen. RANDOMIZED ALGORITHMS. KMP Matcher and Boyer Moore Algorithms. 2. Proving NP-Complete Problems . Optimal Merge Patterns and Minimal Spanning Trees. PROBLEM CLASSES NP. NP-HARD AND NP-COMPLETE: Definitions of P. 2010-11 6CS2 DESIGN AND ANALYSIS OF ALGORITHMS (Common to Comp. J. Merge Sort. Approximation Algorithms for Vertex Cover and Set Cover Problem. PROBLEM CLASSES NP. Leiserson. DYNAMIC PROGRAMMING: Matrix Chain Multiplication. Prentice Hall of India. Addison Wesley . I DIVIDE AND CONQUER METHOD: Binary Search. Engg.D Ulman: Design and analysis of Algorithms. Engg. & Info. Problem definition of Multicommodity flow.Satisfiability problem and Vertex Cover Problem. Cook's Theorem. Job Sequencing.
Basic Definition & descriptions of Theory & Organization of Linear bounded Automata Properties of context-sensitive languages II III IV V Text/References 1. Engg. Schedule per Week Lectures: 3.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B. Formal Languages and Computation. Introduction to Theory of Computing. Addison Wesley. Regular Sets and Regular Grammars. Hopcroft and Ullman. Undecidability: Properties of recursive and Recursively enumerable languages – Universal Turing Machines as an undecidable problem – Universal Languages – Rice’s Theorems. Pumping lemma for regular sets. Aho. Tutorial:1 Units Contents of the subject Evaluation Examination Time = Three (3) Hours Maximum Marks = 100 [Mid-term (20) & End-term (80)] I Finite Automata & Regular Expression: Basic Concepts of finite state system.pumping lemma for CFL Applications of pumping Lemma. Regular Sets of Regular Grammars: Basic Definition of Formal Language and Grammars. Myhell_Nerod Theory & Organization of Finite Automata. Introduction to Computer Theory. closure proportion of regular sets.Tech. Tech) Class: VI Sem.12. Branch: Computer Engg. 2010-11 6CS3 THEORY OF COMPUTATION (Common to Comp. . relationship between regular expression & Finite automata minimization of finite automation mealy & Moore Machines. B. Deterministic and non-deterministic finite automation and designing regular expressions. Narosa 2. & Info. Linear bounded Automata Context Sensitive Language: Chomsky Hierarchy of Languages and automata. (Comp. Introduction to Automata Theory. Prentice Hall. decision Algorithms for regular sets. Context Free Languages& Pushdown Automata: Context Free Grammars – Derivations and Languages – Relationship between derivation and derivation trees – ambiguity – simplification of CEG – Greiback Normal form – Chomsky normal forms – Problems related to CNF and GNF Pushdown Automata: Definitions – Moves – Instantaneous descriptions – Deterministic pushdown automata – Pushdown automata and CFL .07.Tech. Cohen.) V-VI Sem. Turing Machines: Turing machines – Computable Languages and functions – Turing Machine constructions – Storage in finite control – multiple tracks – checking of symbols – subroutines – two way infinite tape. 3. Engg. Papadimitriou.
assignment.The Complete Reference. Pausing Execution with Sleep. B. operator precedence. Access Control. return. Using continue. short circuit logical operators. catch and multiple catch statements. arrays. Extended classes. Nested Loops. File I/O. uncaught exceptions. throws and finally . do-while. using paint method and drawing polygons. PHI 3.FILE HANDLING: I/O streams. Delhi. for-each. Using break. the assignment operators.) V-VI Sem. (Comp. if statement. Thread Objects.07. Overloading and overriding methods. Defining and implementing interfaces. Herbert Schildt: JAVA 2 . EXCEPTION HANDLING: Exception handling fundamentals. Synchronization. Iteration Statements. 2010-11 6CS4 PROGRAMMING IN JAVA (Common to Comp.Tech. U. Arithmetic operators. TMH.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B. Dastidar: Software and Systems – An Introduction. importing package. concept of CLASSPATH. Branch: Computer Engg.G. & Info.Tech. arithmetic. 4.12. searching and comparing strings. character extraction. Jump Statements. try. for. Abstraction. relational operators. Single and Multilevel Inheritance.K. Delhi. usage of super. Tech) Class: VI Sem. Exception types. Features of JAVA. Boolean logic operators. Joins. TMH. special string operations. Deitel: How to Program JAVA. Decision and control statements. while. CONCURRENCY: Processes and Threads. Introduction to Java byte code. access modifiers. Engg. II OBJECTS AND CLASSES: Objects. variables. . Delhi 2. Interrupts. STRING HANDLING: String constructors. string Buffer class. Abstract classes. switch statement. Usage of throw. Java Virtual machine. Schedule per Week Lectures: 3 Units Contents of the subject Evaluation Examination Time = Three (3) Hours Maximum Marks = 100 [Mid-term (20) & End-term (80)] JAVA: Introduction to Object Orientated Programming. Joseph O’Neil and Herb Schildt: Teach Yourself JAVA. returning and passing objects as parameter. Nested and inner classes. Engg. Defining and Starting a Thread. I PROGRAM ELEMENTS: Primitive data types. APPLET: Applet Fundamentals. Object Oriented Programming Principles. III IV V Text/References 1. PACKAGE AND INTERFACES: Defining package. Chakraborty and D. Wheeler Publishing. constructors. bit wise operators. Using final with inheritance. CONTROL STATEMENTS: Java’s Selection Statements.
al. ELSEVIER 3. How modern-day system-on-chip (SoC) microcontrollers can implement a whole signal chain. 2. Core Extensions. Clock system.al.12. Single bit instructions and Programming. Exceptions. MSP430 Microcontroller Basics. Instruction Sets and Addressing modes.Tech. interrupts and interrupt structure. II III ARM Fundamentals: Registers. Addressing modes. Key differentiating factors between different MSP 430 families. LCD. A Unified Hardware/Software Introduction. Branch: Computer Engg. low power programming and interrupts. B. low-power modes (sleep modes). real time clock and Keyboard Interfacing. Interfacing to External Memory. seven segment display. ARM System Developers Guide. Schedule per Week Lectures: 3 Evaluation Examination Time = Three (3) Hours Maximum Marks = 100 [Mid-term (20) & End-term (80)] Units Contents of the subject Overview of Embedded System: Definition. General capability of microcontroller. Embedded Hardware and Software Development environment. understanding the multiplexing scheme of MSP 430 pins. Categories and Requirements of Embedded Systems. Frank Vahid / Tony Givargis.07. Sloss et. I Difference between microprocessor. The 8051 Microcontroller & Embedded Systems. DAC. program execution time– Analysis.) V-VI Sem. Elsevier. Interfacing to Stepper Motor. Current Program Status Register. microcontrollers in embedded systems. and wireless sensor networks with Chipcon RF interface. Pipeline. clock request feature. and Sensor Interfacing. Interrupt Programming Performance Issues of an Embedded System: CPU performance–CPU Power Consumption. Applications of Embedded systems: Energy meters. Design Challenges and Characteristics. 2006 reprint. Memory subsystem. LED. IV V Books: Text Books 1. Analysis and Optimization of CPU Power Consumption.Tech.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B. Instruction Set. Performance. 32-bit. I/O ports. 16-bit. wired sensor network. Engg. and the Vector table.8-bit. (Comp. Assembly Language Programming and Compiler-friendly features. Muhammad Ali Mazidi et. Interfacing: I/O Interfacing. Engg. Introduction to Thumb Instruction Set (Writing Programs not included in the theory Course) 8051 Microcontroller: Architecture. Andrew N. Smoke detectors. ADC. microcontroller and DSP.) Class: VI Sem. Suitability/selection of a microcontroller based on . 2008. Pearson 4..Cost. I/O Port Programming. . John Davies. Embedded System Design. John Wiley Student Edition. Concepts of system-on-chip. Data acquisition system. Power dissipation and architecture. Microcontroller MSP 430: RISC architecture. counter and timers. Interrupts. 2010-11 6CS5 Embedded System Design (Comp.
Documentation from www.) V-VI Sem. 6.com 8. 2008 (Includes Power Point foils for Instructors. Course materials on MSP 430 available from Rice University's "Connexions" system (http://cnx. Georgios Kornaros . Morgan Kauffman. Performance Issues of an Embedded System http://embedded.msp430. Fourth Impression 2007. An Embedded Software Primer. Text/References: Text/References: 1.in ) 7.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B.07. Thomson. Computers As Components: Principles of Embedded Computing System Design. Multi-core Embedded Systems. David .uniti. Simon. (Comp. 4. 2nd Edition. CRC Press 5.org) .” edited by Prof. Texas Instruments. 2. can be requested from http://www. Valvano. Engg. MSP430 Teaching CD-ROM.com.12. Embedded Microcomputer Systems.Tech. Pearson Education. 3. 2010-11 5.E.
File System reliability and integrity.monolithic. window registry. Kernel Structure. file allocation table. Firewalling to Protect Systems and Network. I III IV . Environmental Subsystems. File System structure & implementation. The Window OS: Design Principles. Introduction to threading issues. An overview of-memory management. process management and thread. Tech) Class: VI Sem. An overview of. File Systems: Internal Layout. Windows.Pthreads. design issues.Process Management. Engg. B. System Components.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B. Executives. directory implementation. II system: I/O system device drivers/ controllers. Java threads. Process Scheduling in Windows. Solaris Threads. mailboxes. RAID system. disk management-disk formatting. micro kernel. Booting and login process.Hardware Abstraction layer. window threads.linear list and hash table.file system layouts. Massage Passing System – Need of Message Passing Systems. boot block. naming. types. Program Threats. contagious allocation. Cryptography as a Security Tool. client. security.1 ADVANCE TOPICS IN OPERATING SYSTEMS (Common to Comp. virtual file system. thread specific data. Examples from Linux & Windows. 16-bit Windows Environment. Branch: Computer Engg. IEEE1394. Kernel. bad block. link list allocation. busses and interfaces. I/O Management.07. Structures. Concepts– Threads Advance Concepts Libraries. system calls. cancellation. Win32 API. IDE. thread pool. Volume Management and Fault Tolerance. RAID Structure. Implementation–buffering and delivery. layered.) V-VI Sem. recovery. Exception and Interrupts. System Security: Security Problems. Overview of security in Windows. & Info.usage. User Authentication.USB. Shell. Inter-process Communications. OS organizations. win32 threads. FAT and NTFS.Tech. components Kernel Modules. SCSI. exokernels.12. synchronization. Security features. swap-space management. disk caching and buffering. Computer Security Classifications.MS-DOS Environment. Engg. file system implementation. System Network Threats. POSIX subsystem. Linux threads. RPC & RMI. SystemFile System. Process Scheduling in Linux. Memory Management.server model. virtual machines. signal handling. Design Principles. 2010-11 6CS6.Tech. indexed allocation.  The Linux OS: Unix Vs Linux. (Comp. Schedule per Week Lectures: 3 Units Contents of the subject Evaluation Examination Time = Three (3) Hours Maximum Marks = 100 [Mid-term (20) & End-term (80)] Operating system structures – policies & mechanism. Implementing Security Defenses. Thread Management and Scheduling. Network File System. Examples Systems – Linux.
10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B. Engg.Introduction to Multimedia & Data Compression. Symbian OS. common graphics file formats. Process Scheduling. Prentice Hall 4. Video sever organization.Queued Lock. JAVA card. Overview of Multiprocessor OS. Bach.12. Tata McGraw Hill 3. Kernal Structure and Multiprocessing support in Linux & Windows. Wiley India Pvt. Design of Unix Operating Systems. Text/Reference Books: Text/Reference Books: 1. A. Ltd. Multimedia file systems. Charles Crowly: Operating System A Design – Oriented Approach. Spin Lock. 2010-11 Multiprocessor Operating Systems: Architecture of Multiprocessor Systems. Process management. V SystemMultimedia Operating System. 5. Tanenbaum: Modern Operating System. Process Synchronization. Tata McGraw Hill. 6.real time scheduling.concepts. Palm OS.) V-VI Sem. Sleep Lock. Silberschatz and Peter B Galvin: Operating System Principals.07. (Comp. Achyut S Godbole: Operating Systems.Tech. Multos. . SystemMobile Operating System Windows CE. Tata McGraw Hill 2. Video server. common audio file formats. DM Dhamdhere: Operating Systems – A Concepts Based Approach. Multimedia file storage mechanisms.
alpha-beta cut-offs etc. Resolution. theorem proving. 3. Study and comparison of breadth first search and depth first search. reasoning. Study of the block world problem in robotics. Engg. introduction to neural networks.07. Artificial Intelligence: A Modern Approach. Introduction to learning. planning. PHI. Branch: Computer Engg. some example of expert systems. Mc-Graw Hill. Engg.) V-VI Sem. Best first Search. forward and backward reasoning. monotonic and nonmonotonic reasoning.2 ARTIFICIAL INTELLIGENCE (Comp. Various types of production systems. B. Probabilistic reasoning.12. Techniques. Schedule per Week Lectures: 3 Units Contents of the subject Meaning and definition of artificial intelligence. Problems in representing knowledge. Artificial Intelligence: Elaine Rich. Game playing techniques like minimax procedure. Russel & Norvig. common sense. (Comp. other Search Techniques like hill Climbing. Introduction to AI & Expert System: Dan W. conceptual dependency and fuzzy logic. comparison of propositional and predicate logic. Introduction to understanding and natural languages processing.Tech.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B. Characteristics of production systems. Patterson. frames. and various types of control strategies. deduction. applications of neural networks. Evaluation Examination Time = Three (3) Hours Maximum Marks = 100 [Mid-term (20) & End-term (80)] I II III IV V References: Text Books & References: 1.) Class: VII Sem. 2. Various techniques used in learning. refutation. Knowledge Representation. semantic networks scripts schemas. Kevin Knight. knowledge representation using propositional and predicate logic. AO* algorithms etc. A* algorithm. Baye's theorem. inferencing. Artificial Intelligence by Luger (Pearson Education) 4. 2010-11 6CS6. Prentice-Hall .Tech.
conversations. knowledge based analysis.07. group working. Communications and collaborations models: Face to Face communication. navigation design screen design and layout.. task decomposition. engagement and fun. Text/References: 1. Alan Dix et.Tech. Evaluation Techniques: Definition and goals of evaluation. guidelines. 2010-11 6CS6. pointing and drawing.12. The Computer: Text entry devices with focus on the design of key boards. I positioning. thinking. Human Computer Interaction. rules and heuristics. Engg. choosing an evaluation method. II Usability Engineering Design rules: Principles to support usability. interaction styles. interactivity. psychology and the design of interactive systems. Text based communication. cognitive architectures.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B. Design Process: The process of design.al. approaches. Paradigms for Interaction. B. Engg.3 HUMAN COMPUTER INTERFACE (Common to Comp.Tech. experience. challenges of IV display based systems. designing user support systems Cognitive methods: Goals and task hierarchies. ergonomics. 3rd ed. Pearson . scenarios. display devices. requirement. emotions. III User support. Engg. use of task analysis. evaluation through expert analysis and user participation. Schedule per Week Lectures: 3 Units Contents of the subject Evaluation Examination Time = Three (3) Hours Maximum Marks = 100 [Mid-term (20) & End-term (80)] The Human: input-output channels. V Task Analysis: Differences between task analysis and other techniques. Tech) Class: VI Sem. Branch: Comp.) V-VI Sem. physical and device models. individual differences. elements of WIMP interfaces. & Info. The Interaction: Models of interaction. HCI patterns. sources of information and data collection. linguistic models. ER based analysis. standards. user focus. adaptive help systems. iteration & prototyping. (Comp. Human memory.
throws and finally. library management.12. B. string Buffer class. Engg. Develop understanding to developing packages & Interfaces in Java: Package. Development of a project to demonstrate various applet concepts. Abstract classes. 7.Tech. Thread Objects.) V-VI Sem. Branch: Computer Engg. File I/O. try. packages. variables. Decision and control statements. catch and multiple catch statements. 2010-11 6CS7 JAVA PROGRAMMING LAB (Comp. Development of a project to demonstrate various file handling concepts. Using continue. and Synchronization. Usage of throw. It is expected that each laboratory assignments to given to the students with an aim to In order to achieve the above objectives Indicative List of exercises: 7. Using super. 8. tower of Hanoi problem etc. 10. Extended classes. such as complex arithmetic. Interrupts.g. exception handling. Joins. character extraction. concept of CLASSPATH. control & iteration statements. Develop applications involving Applet: Applet Fundamentals. ticket reservation system. final with inheritance Overloading and overriding methods. 3. Access Control. Iteration Statements. Defining and implementing interfaces. such as application for electricity department. special string operations. operator precedence. uncaught exceptions. access modifiers. using paint method and drawing polygons. 9. Tech) Class: VI Sem. . interfaces etc. Defining and Starting a Thread.07. payroll system etc. return. returning and passing objects as parameter.: 3 Evaluation Examination Time = Four (4) Hours Maximum Marks = 100 [Sessional/Mid-term (60) & End-term (40)] Objectives: At the end of the semester. Schedule per Week Practical Hrs.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B.Tech. Exception types. 4. Jump Statements. Pausing Execution with Sleep. (Comp. constructors. 5. importing package. classes. searching and comparing strings. Write Object Oriented programs in Java: Objects. Classes constructors. operators. matrix arithmetic. handling: 6. the students should have clearly understood and implemented the following: 1. 2. Using break. Develop applications involving concurrency: Processes and Threads. Development of programs/projects to demonstrate concepts like inheritance. Develop understanding to developing Strings and exception handling: String constructors. Exception handling fundamentals. recursion etc. Develop applications involving file handling I/O streams. operators. Inheritance. Programs to demonstrate basic concepts e. Develop an in depth understanding of programming in Java: data types. Engg. switch statement. arrays.
(Comp. Continue checking further after every 30 seconds till success. mails. nested if-else (v) Logical operators (vi) else + if equals elif. Follow the instructions (i) Input a page profile to yourself. 3. Write a shell script to change data format. 2010-11 6CS8 SHELL PROGRAMMING LAB (Info. 12. 11. case structure (vii) while. (Use awk tail) Write a shell script to check whether Ram logged in. Use the basic function to find gcd & lcm of N numbers. 9.Tech.Tech. 6. process control commands. Take a large number such as 15 digits or higher and use a proper algorithm. Show the time taken in execution of this script Write a shell script to print files names in a directory showing date of creation & serial number of the file. Write a shell script to count lines. Shell Programming: Shell script exercises based on following (i) Interactive shell scripts (ii) Positional parameters (iii) Arithmetic (iv) ifthen-fi. 10. copy it into other existing file. file. cut.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B. Schedule per Week Practical Hrs : 2 Evaluation Examination Time = Four (4) Hours Maximum Marks = 50 [Sessional/Mid-term (30) & End-term (20)] S. 8. Branch: I. (ii) Start printing file at certain line (iii) Print all the difference between two file. dd. banner.) V-VI Sem. du. Write shell script for(i) Showing the count of users logged in. rmdir. 5. if-then-else-fi. wc. Tech) Class: VI Sem. Write a shell script to find whether a given number is prime. cd. grep.12. I/O redirection and piping. cat. until. ulimit. 2. 7. (ii) Printing Column list of files in your home directory (iii) Listing your job with below normal priority (iv) Continue running your job after logging out. B. words and characters in its input(do not use wc). for loops. use of break (viii) Metacharacters (ix) System administration: disk management and daily administration Write a shell script to create a file in $USER /class/batch directory. Write a shell script to compute gcd lcm & of two numbers. List of Experiments Use of Basic Unix Shell Commands: ls. Write a shell script to print end of a Glossary file in reverse order using Array. copy the two files at $USER/CSC/2007 directory. 1.07. No. touch. Commands related to inode. sort. mkdir. (iv) Print lines matching certain word pattern. Engg. 4. .T. dfspace.
Tech.12. Engg. Patrick H.07. By Stephen G.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B. Wood .) V-VI Sem. (Comp. 2010-11 Ref: UNIX Shell programming. Kochan.
Every node u also stores height of the subtree rooted at it. Suggested Exercises: A.) V-VI Sem. Engg. Suggested Tools: For implementation and estimation of running time on various sizes of input(s) or output(s) as the case may be. a problem on design. students should be able to: • • • Prove the correctness and analyze the running time of the basic algorithms for those classic problems in various domains. Using this extra information how can you merge the two trees in time O(log m + log n) (preserving both the height balance and the order)? 3. You have to determine whether the kth largest element of the heap is greater than x or not. Merging two search trees: You are given two height balanced binary search trees T and T'. Engg. Every element of tree T is smaller than every element of tree T'.07. Linux platform is suggested. Analyze the complexities of various problems in different domains. C. B. (Comp. Branch: Comp. It is expected that teachers will assign algorithms to the students for estimation of time & space complexity. 2.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B. . Tech) Class: VI Sem. You may use O(k) extra storage. Algorithms reported in various research journals may be chosen by the teachers. Complete binary tree as an efficient data-structure: You are given an array of size n (n being a power of two). Schedule per Week Practical Hrs : 3 Evaluation Examination Time = Four (4) Hours Maximum Marks = 100 [Sessional/Mid-term (60) & End-term (40)] Objectives: Upon successful completion of this course. 2010-11 6CS9 DESIGN AND ANALYSIS OF ALGORITHMS (Common to Comp. (i) Add(i. Exploring a Binary Heap: Consider a binary heap containing n numbers (the root stores the greatest number). B.j) = sum of the entries in the array from indices i to j for any 0 < i < j <= n.x) which adds x to the entry A[i]. For example.Tech. Your algorithm must take O(k) time. You are given a positive integer k < n and a number x. A guide to such problems is given below: 1. analysis and implementation for transposing a sparse matrix requiring not more than one pass from the original matrix may be assigned.12.Tech. storing m and n elements respectively. All the entries of the array are initialized to zero. Apply the algorithms and design techniques to solve problems. (ii) Report sum(i. & Info. 2. Problem on designing algorithms to meet complexity constraints may be assigned. Engg. You have to perform a sequence of the following online operations : 1.
7... 2010-11 It can be seen easily that we can perform the first operation in O(1) time whereas the second operation may cost O(n) in worst case. ii. Your objective is to perform these operations efficiently.. w2. Give an O(|E|) time algorithm to count all the paths from u to v. Show how to implement a queue with two ordinary stacks so that the amortized cost of each Enqueue and each Dequeue operation is O(1). you should traverse O(d) distance. You do not know on which road he is and how far he is from you. b. where edges have nonnegative weights. Your friend is somewhere on one of the four roads. Path passing through a subset of nodes Given two nodes u.. Delete-min in constant time!!! Consider a binary heap of size n. Problems on Amortized Analysis a..E).E). Shortest Path Problems: i. Counting the number of paths Given two nodes u. (Comp. Suggest a valid potential function so that the amortized cost of insertion is O( log n) whereas amortized cost of deleting the smallest element is O( 1). Searching for a friend: You are standing at a crossing from where there emerge four roads extending to infinity. Given a directed graph G(V.) V-VI Sem. You have to walk to your friend and the total distance traveled by you must be at most a constant times the actual distance of your friend from you. We know that the cost of insertion of an element in the heap is O( log n) and the cost of deleting the smallest element is also O( log n).. Paths in Directed Acyclic Graph a.Tech. the root storing the smallest element. 5.wk. S and D are two disjoint subsets of the set of vertices. Give a datastructure which will guarantee O(log n) time per operation. given an undirected graph G.07. . b. Give an O(|V| log |V| + |E|) time algorithm to find the shortest path among the set of paths possible from any node in S to any node in D. In terminology of algorithms.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B.. Engg. If there is no such path then your algorithm must report that "no such path exists".. Give an O(|E|) time algorithm to output a path(if exists) from u to v which passes through each of the nodes w1. determines a spanning tree of G whose largest edge weight is minimum over all spanning trees of G. 4. Computing a spanning tree having smallest value of largest edge weight: Describe an efficient algorithm that.v in a directed acyclic graph G(V.12. 6. Implementing a queue by two stack c.E).v and a set of vertices w1.wk in a directed acyclic graph G(V. where d is the distance of your friend from you. From a subset of vertices to another subset of vertices a.
. Finding the first one: You are given an array of infinite length containing zeros followed by ones. You receive a series of online queries: "Give nearest common ancestor of u. Design an algorithm that decides whether a given adjacency matrix represents a scorpion by examining only O(n) entries. 2010-11 8. The list either terminates at null pointer or it loops back to some previous location(not necessarily to the head of the list).12. Give an O(n) time algorithm to determine if the given array has a decimal dominant. 14. Y ?. 10. Some of the feet may be connected to other feet. There are total n persons in the party. Find the celebrity by asking only O(n) questions. 9. determines whether or not there exist two elements in S whose sum is exactly x . Finding the decimal dominant in linear time: You are given n real numbers in an array. X know Mr. Your job is to find the celebrity in the party.) V-VI Sem. Your objective is to preprocess the tree in O(n) time to get a data structure of size O(n) so that you can answer any such query in O(log n) time. Searching for the Celebrity: Celebrity is a person whom everybody knows but he knows nobody. You can ask questions of the form Does Mr.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B. You will get a binary answer for each such question asked. 12.Tech. How fast can you locate the first one in the array? 11. 13. (Comp. Checking the Scorpion: An n-vertex graph is a scorpion if it has a vertex of degree 1(the sting) connected to a vertex of degree two (the tail) connected to a vertex of degree n-2 (the body) connected to the other n-3 (the feet). You have to determine whether the list loops back or ends at a null location in time proportional to the length of the list. Endless list: You are having a pointer to the head of singly linked list. You have gone to a party. A simple problem on sorted array: Design an O(n)-time algorithm that. You can use at most a constant amount of extra storage. A number in the array is called a decimal dominant if it occurs more than n/10 times in the array. v ". Engg. Nearest Common Ancestor: Given a rooted tree of size n.07. given a real number x and a sorted array S of n numbers.
Branch: Comp. Experiment #1 a) Blink an LED which is connected to your microcontroller using the built-in timer in the microcontroller. (Comp. 8051. the microcontroller turns the LED on and waits in a busy loop to implement a delay of x milliseconds. pressing a key on the keyboard should generate an interrupt to the microcontroller.Tech. students will be able to design simple embedded systems and develop related software. It is assumed that there are 14 weeks in the semester and about 5 to 6 experiments will be carried out. B. Assume that the LED should be on for x milliseconds and off for y milliseconds. Here. How do you compare these two solutions? Experiment #2 Assume that in Experiment #1. Assume that the string is stored at a location . More experiments are provided to bring in variation.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B. ARM 9. Engg.12. Try the sample programs that are supplied to get familiar with the Microcontroller. Engg.Tech. assume that these values are stored in memory locations X and Y. Schedule per Week Practical Hrs : 3 Evaluation Examination Time = Four (4) Hours Maximum Marks = 100 [Sessional/Mid-term (60) & End-term (40)] Course Objectives Upon successful completion of the course. Experiment #3 If your microcontroller kit has an LCD interface. write a program to display a character string on the LCD. b) Consider an alternate way to program this application. If the key that has been pressed is a numeric key. Engg.) Class: VI Sem. We should be able to change the value of x and y and rerun the program.07.( Comp. the values of x and y have been chosen to be 200 and 500 respectively. the value of x and y must be interchanged by the interrupt service routine. When the LED blinking program runs. 2010-11 6CS10 Embedded System Design Lab. then the LED must be turned off for 2 seconds before resuming the blinking. Students also learn to work in a team environment and communicate the results as written reports and oral presentations. 68HC12. Experiment #0 Get familiar with the microcontroller kit and the development software. If the key that has been pressed is not a numeric key.) V-VI Sem. Then it turns the LED off and waits in a busy loop to implement a delay of y milliseconds. Suggested Microcontroller Platform: Texas Instruments MSP430.
Experiment #6 Your microcontroller may have a built-in ADC. If not. Interface an external motion sensor to the microcontroller. (Comp. There must be a provision to record the time at which the intrusion was detected. Write a program to take several measurements of temperature at regular intervals and display the average temperature on the LCD display. We must continuously check the waveform and record the maximum value of the waveform and display the maximum value on the LCD display.10 RAJASTHAN TECHNICAL UNIVERSITY Detailed Syllabus B. Test if the readings change when the ambient temperature changes. Build a voltmeter that can measure stable voltages in a certain range. Experiment #7 Build a simple security device based on the microcontroller kit. The measured value must be displayed on the LCD display. Use the built-in DAC to generate voltage waveforms such as (a) pulse train (b) triangular waveform (c) sinusoidal waveform.12. Tabulate the error for several values of the voltage. Experiment #8 A voltage waveform v(t) is available as an input to the microcontroller.) V-VI Sem. . The string is nullterminated. interface an external temperature sensor to the microcontroller. Similarly.Tech.07. there must be a provision to turn the alarm off by pressing a key. Engg. Experiment #5 Your microcontroller may have a built-in temperature sensor. Modify your program to scroll the displayed string from left to right. 2010-11 STRING and consists of alphanumeric characters. Observe these waveforms on an oscilloscope. Measure the same voltage using a multimeter and record the error in measurement. Experiment #4 Modern microcontrollers usually have an in-built Digital-to-Analog and Analogto-Digital converter. Test the program by using a DC supply to generate v(t) and varying the DC value. An alarm must be generated if motion is sensed in a specified region.
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