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Verilog Basics 2 Expressions

Verilog Basics 2 Expressions

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Published by Ahmad Shdifat
Digital System Design - Verilog by Dr. Bassam Jamil Hashemite University
Digital System Design - Verilog by Dr. Bassam Jamil Hashemite University

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Published by: Ahmad Shdifat on Jul 29, 2012
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07/02/2013

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Digital System Design

Verilog: Expressions
Dr. Bassam Jamil

Topics
 Expressions

 Operators

2

Expressions
 Two
 

types:

Unary expressions: operator operand Binary expressions: operand operator operand

 The

operands may be a net or wire

 Logic

expression returns: 1 (true), 0 (false), X (unknown)

3

Arithmetic Operators

4

Arithmetic Operators

5

6

7

Bitwise Operators

8

9

Reduction (Unary) Reduction Operators

10

11

Logical Operators

12

13

14

Relational Operators

15

Relational Operators

16

Shift Operators

17

q
18

Selection Operation Example

19

20

Select/Concatenate/Replicate

21

22

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