INTEGRATED CIRCUITS

74F00 Quad 2-input NAND gate
Product specification IC15 Data Handbook 1990 Oct 04

Philips Semiconductors

L.0 LOAD VALUE HIGH/LOW 20µA/0.4mA PIN CONFIGURATION D0a D0b Q0 D1a D1b Q1 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC D3b D3a Q3 D2b D2a Q2 74F00 SF00001 ORDERING INFORMATION ORDER CODE DESCRIPTION 14-pin plastic DIP 14-pin plastic SO COMMERCIAL RANGE VCC = 5V ±10%. Dnb Data inputs DESCRIPTION 74F (U.4ns TYPICAL SUPPLY CURRENT (TOTAL) 4. Tamb = –40°C to +85°C I74F00N I74F00D PKG DWG # SOT27-1 SOT108-1 INPUT AND OUTPUT LOADING AND FAN OUT TABLE PINS Dna. Tamb = 0°C to +70°C N74F00N N74F00D INDUSTRIAL RANGE VCC = 5V ±10%.6mA 1.) HIGH/LOW 1. 1990 2 853-0325 00623 .Philips Semiconductors Product specification Quad 2-input NAND gate 74F00 FEATURE • Industrial temperature range available (–40°C to +85°C) TYPE TYPICAL PROPAGATION DELAY 3.0mA/20mA Qn Data output 50/33 NOTE: One (1.6mA in the low state.0/1.0) FAST unit load is defined as: 20µA in the high state and 0. LOGIC DIAGRAM D0a D0b D1a D1b D2a D2b VCC = Pin 14 GND = Pin 7 D3a D3b 1 2 4 5 9 10 12 13 11 3 Q0 FUNCTION TABLE INPUTS Dna L L 8 Q2 OUTPUT Dnb L H L Qn H H H L 6 Q1 H Q3 SF00002 H H NOTES: H = High voltage level L = Low voltage level LOGIC SYMBOL IEC/IEEE SYMBOL 1 1 2 4 5 9 10 12 13 2 & 3 4 6 D0a D0bD1a D1b D2a D2b D3a D3b 5 9 Q0 Q1 Q2 Q3 8 10 12 3 VCC = Pin 14 GND = Pin 7 6 8 11 11 13 SF00003 SF00004 October 4.

All typical values are at VCC = 5V. VIL = MAX VIH = MIN.30 -0.6 -150 2. Tamb = 25°C.5 to +7.5 to VCC 40 0 to +70 –40 to +85 –65 to +150 UNIT V V mA V mA °C °C °C RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER MIN VCC VIH VIL IIk IOH IOL Tamb Supply voltage High-level input voltage Low-level input voltage Input clamp current High-level output current Low-level output current Operating free air temperature range Commercial range Industrial range 0 –40 4.) SYMBOL VOH VOL VIK II IIH IIL IOS ICC PARAMETER High-level output voltage TEST CONDITIONS1 MIN VCC = MIN.30 0. For conditions shown as MIN or MAX.0V VCC = MAX. 2.0 –30 to +5 –0. VI = 2.) SYMBOL VCC VIN IIN VOUT IOUT Tamb Tstg Supply voltage Input voltage Input current Voltage applied to output in high output state Current applied to output in low output state Operating free air temperature range Commercial range Industrial range Storage temperature range PARAMETER RATING –0. 1990 3 . Otherwise.8 –18 –1 20 +70 +85 LIMITS NOM 5.5 2.8 10.9 6. 3.73 0. IOS tests should be performed last.50 0.50 -1. In any sequence of parameter tests.Philips Semiconductors Product specification Quad 2-input NAND gate 74F00 ABSOLUTE MAXIMUM RATINGS (Operation beyond the limit set forth in this table may impair the useful life of the device. II = IIK VCC = MAX. VI = 7.5 to +7.7V VCC = MAX. Unless otherwise noted these limits are over the operating free air temperature range. Not more than one output should be shorted at a time. For testing IOS. October 4. VIL = MAX VIH = MIN. VI = 0.5 2.7 3.4 0. IOl = MAX Input clamp voltage Input current at maximum input voltage High-level input current Low-level input current Short-circuit output current3 Supply current (total) ICCH ICCL VCC = MIN.2 100 20 -0.0 0.0 MAX 5.8 ±10%VCC ±5%VCC ±10%VCC ±5%VCC 2. prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. use the appropriate value specified under recommended operating conditions for the applicable type.5 V V V mA mA mA °C °C UNIT DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.5V VCC = MAX VCC = MAX VCC = MAX VIN = GND VIN = 4.0 –0.2 LIMITS TYP2 MAX V V V V V µA µA mA mA mA UNIT mA NOTES: 1. IOH = MAX Low-level output voltage VCC = MIN.5V -60 1.

0 4. Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.4 2.0 1.5 MAX 6.3 VCC = +5. VOUT 90% VM 10% tTHL (tf ) CL RL tw VM 10% tTLH (tr ) 0V 90% AMP (V) tTLH (tr ) 90% POSITIVE PULSE VM 10% tw tTHL (tf ) AMP (V) 90% VM 10% 0V Test Circuit for Totem-Pole Outputs DEFINITIONS: RL = Load resistor.3 VCC = +5.0V 1.0V ± 10% Tamb = –40°C to +85°C CL = 50pF.7 3. Dna. RT = Termination resistance should be equal to ZOUT of pulse generators. RL = 500Ω MIN 2. VM = 1. see AC ELECTRICAL CHARACTERISTICS for value. Dnb to Qn Waveform 1 2. RL = 500Ω MIN tPLH tPHL Propagation delay Dna.0 5. CL = Load capacitance includes jig and probe capacitance. Dnb VM tPHL VM tPLH Qn VM VM SF00005 Waveform 1.Philips Semiconductors Product specification Quad 2-input NAND gate 74F00 AC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITION VCC = +5. 1990 4 .5ns tTHL 2.5V. rate 1MHz tw 500ns tTLH 2. RL = 500Ω MIN 2.5 6.0 MAX 6. see AC ELECTRICAL CHARACTERISTICS for value.0V Tamb = +25°C CL = 50pF.0 ns UNIT AC WAVEFORMS For all waveforms.5V rep.2 MAX 5.U.0 TYP 3.5ns SF00006 October 4. Propagation delay for inverting outputs TEST CIRCUIT AND WAVEFORM VCC NEGATIVE PULSE VIN PULSE GENERATOR RT D.0V ± 10% Tamb = 0°C to +70°C CL = 50pF.4 2.T.

Philips Semiconductors Product specification Quad 2-input NAND gate 74F00 DIP14: plastic dual in-line package. 14 leads (300 mil) SOT27-1 1990 Oct 04 5 .

9 mm SOT108-1 1990 Oct 04 6 . body width 3. 14 leads.Philips Semiconductors Product specification Quad 2-input NAND gate 74F00 SO14: plastic small outline package.

Philips Semiconductors Product specification Quad 2-input NAND gate 74F00 NOTES 1990 Oct 04 7 .

Specification may change in any manner without notice. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). and supplementary data will be published at a later date. Philips Semiconductors assumes no responsibility or liability for the use of any of these products. devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Exposure to limiting values for extended periods may affect device reliability.O. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. Right to make changes — Philips Semiconductors reserves the right to make changes. and/or software. or mask work right infringement. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Printed in U. For detailed information see the relevant data sheet or data handbook. Disclaimers Life support — These products are not designed for use in life support appliances. including circuits. without notice. and makes no representations or warranties that these products are free from patent. Box 3409 Sunnyvale. Stress above one or more of the limiting values may cause permanent damage to the device. print code Document order number: Date of release: 10-98 9397-750-05051 Philips Semiconductors yyyy mmm dd 8 . This data sheet contains final specifications. unless otherwise specified. Production [1] Please consult the most recently issued datasheet before initiating or completing a design.Philips Semiconductors Product specification Quad 2-input NAND gate 74F00 Data sheet status Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. in the products. Application information — Applications that are described herein for any of these products are for illustrative purposes only. described or contained herein in order to improve design and/or performance. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. standard cells. copyright. Philips Semiconductors 811 East Arques Avenue P. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains preliminary data. copyright. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied.A.S. or mask work right to these products. California 94088–3409 Telephone 800-234-7381 © Copyright Philips Electronics North America Corporation 1998 All rights reserved. conveys no license or title under any patent.

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