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LAB-MANUAL

II Year III SEM ECE

3EC-09 Electronics Lab I

DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
ACERC/Department of ECE/EDC lab/1

INDEX
S. No.
1. 2. 3. 4. 5. RTU syllabus Do’s and Don’ts Instructions to the Students Lab PEO Lab Plan

Content

Page No.

Experiment as per RTU Syllabus
1. Exp-1 Study the following devices: (a) Analog & digital multimeters (b) Function/ Signal generators (c) Regulated d. c. power supplies (constant voltage and constant current operations) (d) Study of analog CRO, measurement of time period, amplitude, frequency & phase angle using Lissajous figures. Exp-2 Plot V-I characteristic of P-N junction diode & calculate cut-in voltage, reverse Saturation current and static & dynamic resistances. Exp-3 Plot V-I characteristic of zener diode and study of zener diode as voltage regulator. Observe the effect of load changes and determine load limits of the voltage regulator. Exp-4 Plot frequency response curve for single stage amplifier and to determine gain bandwidth product. Exp-5 Plot drain current - drain voltage and drain current – gate bias characteristics of field effect transistor and measure of Idss & Vp. Exp-6 Application of Diode as clipper & clamper.

1.

2. 3. 4. 5. 6. 7. 8. 9.

Exp-7 Plot gain- frequency characteristic of two stages RC coupled amplifier &
calculate its bandwidth and compare it with theoretical value.

Exp-8 Plot gain- frequency characteristic of emitter follower & find out its input
and output resistances.

Exp-9 Plot input and output characteristics of BJT in CB, CC and CE configurations. Find their h- parameters. Exp-10 Study half wave rectifier and effect of filters on wave. Also calculate
theoretical & practical ripple factor.

10.

11.

Exp-11 Study bridge rectifier and measure the effect of filter network on D.C.
voltage output & ripple.

Experiment Beyond Syllabus
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1. 2. 3.

Exp-1 To find the Ripple factor and regulation of a Full-wave Rectifier with and
without filter. Exp-2 To observe the characteristics of UJT and to calculate the Intrinsic Stand-Off Ratio (η). Exp-3 To draw the V-I Characteristics of SCR

RTU Detailed Syllabus
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Plot V-I characteristic of zener diode and study of zener diode as voltage regulator. Observe the effect of load changes and determine load limits of the voltage regulator Plot frequency response curve for single stage amplifier and to determine gain bandwidth product Plot drain current . c. Study half wave rectifier and effect of filters on wave. amplitude. power supplies (constant voltage and constant current operations) (d) Study of analog CRO. CC and CE configurations. Plot gain. Branch: ECE Schedule per Week Practical Hrs : 3 Evaluation Examination Time = Three (4) Hours Maximum Marks = 100 [ Sessional (60) & End-term (40)] S. Study the following devices: List of Experiments (a) Analog & digital multimeters (b) Function/ Signal generators (c) Regulated d. Tech. B. measurement of time period. Plot input and output characteristics of BJT in CB. frequency & phase angle using Lissajous figures. reverse Saturation current and static & dynamic resistances. Plot gain. Find their hparameters.drain voltage and drain current – gate bias characteristics of field effect transistor and measure of Idss & Vp.frequency characteristic of emitter follower & find out its input and output resistances. 1 2. 2 3 4 5 6 7 8 9 10 11 ACERC/Department of ECE/EDC lab/4 .frequency characteristic of two stages RC coupled amplifier & calculate its bandwidth and compare it with theoretical value. Plot V-I characteristic of P-N junction diode & calculate cut-in voltage.Class: III Sem. Study bridge rectifier and measure the effect of filter network on D. Also calculate theoretical & practical ripple factor.C. voltage output & ripple. No. Application of Diode as clipper & clamper.

6. 4. Students should get the experiment allotted for next turn. Before starting the experiment. 5.DO’S AND DON’T’S DO’S 1. Student should get the record of previous experiment checked before starting the new experiment. 8. Maintain strict discipline. 3. DON’TS 1. before leaving the lab. 4. 2. 3. Do not leave the without permission from the teacher ACERC/Department of ECE/EDC lab/5 . Get your readings checked by the teacher. Do not overcrowd the tables. Before switching on the power supply. Read the manual carefully before starting the experiment. Keep your mobile phone switched off or in vibration mode. 2. 7. get circuit diagram checked by the teacher. Apparatus must be handled carefully. get the circuit connections checked. Do not tamper with equipments. 9. Do not touch or attempt to touch the mains power supply Wire with bare hands.

names of batch members and apparatus or components required. Get the readings counter signed by the faculty after the completion of the experiment. model graph (if any) and space for result. BEFORE ENTERING THE LAB • • • The previous experiment should have been written in the practical file. formula (if any). circuit diagram/algorithm. ACERC/Department of ECE/EDC lab/6 . The experiment written in the observation copy should have aim. without which the students will not be allowed to enter the lab. Maintain Index column in the observation copy and get the signature of the faculty before leaving the lab. • Never switch on the power supply before getting the permission from the faculty. WHEN WORKING IN THE LAB • Necessary equipments/apparatus should be taken only from the lab assistant by making an issuing slip. BEFORE LEAVING THE LAB • • • The equipments/components should be returned back to the lab assistant in good condition after the completion of the experiment. The students should get the signature from the faculty in the observation copy.INSTRUCTIONS TO THE STUDENTS GENERAL INSTRUCTIONS • • • • Maintain separate observation copy for each laboratory. They should also check whether their file is checked and counter signed in the index. The students should have written the experiment in the observation copy that they are supposed to perform in the lab. which would contain name of the experiment. Observations or readings should be taken only in the observation copy. blank observation table (if any). apparatus required. programmed (if any).

4. 4G Technologies which will help in complete development of student. and Amplifiers etc. It is the basic Lab of all the branches… Knowledge and concept of electrons and holes. working Principle. MOSFET. Use of LED. F) The Knowledge of EDC Lab will help in getting Success in Research and Development. semiconductors. 2. LCD. Capacitor. Transistor. of electronics. This Lab helps in understanding various other Labs. C) Graduate will have an ability to design various Projects. E) Graduate will have the Knowledge and use of Modern Upcoming technologies Like Mobile. Characteristics and their applications. the student see a lot of equipment having devices like Diode. sensors. This Lab helps to understand the important of Electronics in Social life. real life application. D) The knowledge Of EDC Lab will help the student to perform various Experiments in Laboratories which will help in understanding theory more clearly. EDC Lab is an important Lab for all the students as they make different circuits on breadboard which includes various devices such as Transistors.Program Educational Objectives: 1. device and circuits. PCB Designing . 3. Device Miniaturization is become of EDC only. so the basic Knowledge about them lead to easy understanding of their working. Testing . PCB design and working of daily Use Equipment (Like: LED. Which is useful for understanding the behavior of different electronics devices? 3. Diodes. B) Graduate will have an ability to identify the various devices. 3G. In industries the practical application uses the basic Knowledge of EDC.. Sensor and Various Opto electronics devices can be easily understood because of Electronics only. It is important to understand the basics and working of these devices. Diode. Amplifiers are necessary in each and every subject. Opto electronics devices). Of Electronics. 5. During Training. Program Outcomes: A) Graduate will have the basic knowledge of Electronics. ACERC/Department of ECE/EDC lab/7 .

. Microprocessor and Analog Electronics. Mapping of course objective with course Outcomes Program Objectives/Outcomes I II III IV V Yes Yes Yes Yes Yes Yes A Yes B Yes Yes Yes Yes Yes Yes C D Yes E Yes Yes Yes Yes Yes F Yes G Yes Yes Yes Yes Yes Yes Yes Yes H I J K Yes Yes Yes 4. Important Topics Covered: ● Study of CRO and Function Generators etc ●Semiconductor Physics and PN Diode I/p and O/p Characteristics. K) This Lab will help in understanding of various other subjects of Engineering Stream such as Digital Electronics. H) Graduate will show the understanding of impact of Engineering Solution on the society and also will be aware of Contemporary issue. J) The Lab knowledge helps in professional and developing Ethical responsibilities. ● Zener Diode Characteristics ● Clipper and Clamper ● Rectifier (Half Wave and Full Wave) ● BJT Transistor I/p and O/p Characteristics.. ACERC/Department of ECE/EDC lab/8 . Testing and Circuit Forming.. ● Single Stage Amplifier ● Emitter Follower ● RC Couple Amplifier ● FET I/p and O/p Characteristics.G) Graduate will develop confidence for getting higher education and ability of Life Long learning. 3. I) This Lab help in Preparing student for various industries purpose such as Knowledge of PCB designing.

4) New Application Oriented Topics ● Feedback Topology ● Oscillators 6. Semiconductor and Insulators ● Diode. Kataria & Sons ACERC/Department of ECE/EDC lab/9 .No 1 2 3 4 Title Electronics Device and Circuits Electronics Device and Circuits Electronics Device and Circuits Electronics Device and Circuits Author Milliman Hallkias Robert Bolystead Sanjeev Gupta J.5. Topics beyond the Syllabus: 1) Foundation Topics: ● Introduction of Conductors.B. Transistors Operation and applications ● FET.Gupta Publication Tata McGraw hill Publications Pearson Prentice Hall Dhanpat Rai Publications S.K. MOSFET Operation and applications 2) Advanced Topics: ● Zener and Avalanche Breakdown ● Feedback Concepts ● Rectifiers ●Study of CRO and Function Generators etc 3) Contemporary Issues/Trends ● Advancement in the designing of Electronics Circuits on Printed Circuit Board. Text Book/Reference Book S.

Experiment no. 2 Experiment no. 1 Experiment no. 6 Experiment no. 9 Experiment no.LAB PLANDATE/EXP. 5 Experiment no. 4 Experiment no. 10 1 G1 G5 G4 G3 G2 2 G2 G1 G5 G4 G3 3 G3 G2 G1 G5 G4 4 G4 G3 G2 G1 G5 5 G5 G4 G3 G2 G1 G1 G5 G4 G3 G2 G2 G1 G5 G4 G3 G3 G2 G1 G5 G4 G4 G3 G2 G1 G5 G5 G4 G3 G2 G1 6 7 8 9 10 ACERC/Department of ECE/EDC lab/10 . No. 3 Experiment no. 8 Experiment no. 7 Experiment no.

1. STUDY OF DEVICES
AIM: - Study the following devices: (a) Analog & digital multimeters (b) Function/ Signal generators (c) Regulated d. c. power supplies (constant voltage and constant current operations) (d) Study of analog CRO, measurement of time period, amplitude, frequency & phase angle using Lissajous figures. APPARATUS:CRO Analog and digital multimeter Function / Signal Generator Regulated DC Power Supply CRO Probes THEORY:(a) ANALOG AND DIGITAL MULTIMETER A multimeter or a multitester, also known as a VOM (Volt-Ohm meter), is an electronic measuring that combines several measurement functions in one unit. A typical multimeter may include features such as the ability to measure voltage, current and resistance. Multimeters may use analog or digital circuits—analog multimeters (AMM) and digital multimeters (often abbreviated DMM or DVOM.) Analog instruments are usually based on a micro ammeter whose pointer moves over a scale calibrated for all the different measurements that can be made; digital instruments usually display digits, but may display a bar of a length proportional to the quantity being measured. A multimeter can be a hand-held device useful for basic fault finding and field service work or a bench instrument which can measure to a very high degree of accuracy. They can be used to troubleshoot electrical problems in a wide array of industrial and household devices such as electronic equipment, motor controls, domestic appliances, power supplies, and wiring systems

ACERC/Department of ECE/EDC lab/11

Fig. DIGITAL MULTIMETER

OPERATION
A multimeter is a combination of a multirange DC voltmeter, multirange AC voltmeter, multirange ammeter, and multirange ohmmeter. An un-amplified analog multimeter combines a meter movement, range resistors and switches. For an analog meter movement, DC voltage is measured with a series resistor connected between the meter movement and the circuit under test. A set of switches allows greater resistance to be inserted for higher voltage ranges. The product of the basic full-scale deflection current of the movement, and the sum of the series resistance and the movement's own resistance, gives the fullscale voltage of the range. As an example, a meter movement that required 1 milliamp for full scale deflection, with an internal resistance of 500 ohms, would, on a 10-volt range of the multimeter, has 9,500 ohms of series resistance. For analog current ranges, low-resistance shunts are connected in parallel with the meter movement to divert most of the current around the coil. Again for the case of a hypothetical 1 mA, 500 ohm movement on a 1 Ampere range, the shunt resistance would be just over 0.5 ohms. Moving coil instruments respond only to the average value of the current through them. To measure alternating current, a rectifier diode is inserted in the circuit so that the average value of current is non-zero. Since the average value and the root-mean-square value of a waveform need not be the same, simple rectifier-type circuits may only be accurate for sinusoidal waveforms. Other wave shapes require a different calibration factor to relate RMS and average value. Since practical rectifiers have non-zero voltage drop, accuracy and sensitivity is poor at low values.

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To measure resistance, a small dry cell within the instrument passes a current through the device under test and the meter coil. Since the current available depends on the state of charge of the dry cell, a multimeter usually has an adjustment for the ohms scale to zero it. In the usual circuit found in analog multimeters, the meter deflection is inversely proportional to the resistance; so full-scale is 0 ohms, and high resistance corresponds to smaller deflections. The ohms scale is compressed, so resolution is better at lower resistance values. Amplified instruments simplify the design of the series and shunt resistor networks. The internal resistance of the coil is decoupled from the selection of the series and shunt range resistors; the series network becomes a voltage divider. Where AC measurements are required, the rectifier can be placed after the amplifier stage, improving precision at low range. Digital instruments, which necessarily incorporate amplifiers, use the same principles as analog instruments for range resistors. For resistance measurements, usually a small constant current is passed through the device under test and the digital multimeter reads the resultant voltage drop; this eliminates the scale compression found in analog meters, but requires a source of significant current. An auto ranging digital multimeter can automatically adjust the scaling network so that the measurement uses the full precision of the A/D converter. In all types of multimeters, the quality of the switching elements is critical to stable and accurate measurements. Stability of the resistors is a limiting factor in the long-term accuracy and precision of the instrument. (b) FUNCTION GENERATOR

Fig. FUNCTION GENERATOR The function generator is used to generate a wide range of alternating-current (AC) signals. The front panel is divided into six major control groups: 1) Frequency Selection Group;

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2) Sweep Group. Output Group: ACERC/Department of ECE/EDC lab/14 . (sweep. With the result that: 0. amplitude modulation.0 * 1 kHz = 2. Frequency Selection Group: These controls are used to select the operating frequency of the function generator. the Leader Function Generator manual is available in the lab.5 kHz: • Rotate the frequency control knob to 0. to set the function generator to an operating frequency of 2000 Hz (2 kHz): • Rotate the frequency control knob to 2. 5) Function. 4) DC Offset Group. • The three most important groups for this lab are the frequency. The remaining three groups. function. • Select the 1 kHz frequency multiplier button. and DC offset) will be briefly covered in the lab setup procedures. With the result that: 2.55. 3) Amplitude Modulation Group. This group consists of the frequency control knob and the eight frequency multiplier selection buttons. For example. To set the function generator to an operating frequency of 5. The green LED will indicate that the unit is on. and 6) Output Group.5 kHz. Should you desire more detailed descriptions of these groups.0 kHz. • Select the 10 kHz frequency multiplier button.55 * 10 kHz = 5. or Waveform Group. • The power switch is on the upper left-hand corner of the unit. and output groups.

the nine o'clock position (90 degrees left). and the variable-width pulse wave. the square wave. These controls are used to adjust the amplitude of the generator's output signal.1. The following relationship will assist in working with the attenuation buttons: (dB) = -10 * log10 (Pout/ Pin) (if power is the unit of measurement) or (dB) = -20 * log10 (Vout / Vin) (if voltage is the unit of measurement) Note: The attenuation buttons are additive. if the 10 dB and the 20 dB buttons are both pressed in. the combined attenuation of the input signal is 30 dB. In other words. the controlled value is held nearly constant despite variations in either load current or the voltage supplied by the power supply's energy source. Function/Waveform Selection Group: This group is used to select the shape of the generated waveform. The term is most commonly applied to devices that convert one form of electrical energy to another. c. power supplies (constant voltage and constant current operations) © A power supply is a device that supplies electric power to an electrical load. chemical. The group consists of the amplitude-control knob. though it may also refer to devices that convert another form of energy (mechanical. The six waveforms that the function generator can produce are the sine wave. Regulated d. the amplitude ranges from a few millivolts to approximately 20 volts. We will set the amplitude levels by aligning the white line on the amplitude knob to the three o'clock position (90 degrees right). The group is made up of the six wave-selector buttons. two sawtooth waves. A regulated power supply is one that controls the output voltage or current to a specific value. • The attenuation buttons are used to attenuate (decrease) the amplitude of the signal by a factor measured in decibels. ACERC/Department of ECE/EDC lab/15 . Notice that rotating the knob fully to the left does not result in a zero amplitude signal. the three attenuation buttons and the fused 50 ohm BNC connector. solar) to electrical energy. the triangle wave. Although the amplitude knob is not indexed. or the twelve o'clock position (straight up).

voltage. Commonly specified power supply attributes include:    The amount of voltage and current it can supply to its load. rectifiers. nowadays usually lower. Before the introduction of solid-state electronics.or full-wave rectification is used)—ripple—is unavoidably superimposed on the direct output voltage. power supplies used step-up transformers. and a low alternating voltage for ACERC/Department of ECE/EDC lab/16 . Common examples of this include power Energy storage devices such as batteries and fuel cells. followed by a filter. from an energy source.Every power supply must obtain the energy it supplies to its load. equipment used valves (vacuum tubes) which required high voltages. a power supply may obtain energy from:  Electrical energy transmission systems. and filters to generate one or more direct voltages of some hundreds of volts. to filter out (smooth) most of the pulsation. A small remaining unwanted alternating voltage component at mains or twice mains power frequency (depending upon whether half.    A power supply may be implemented as a discrete. For purposes such as charging batteries the ripple is not a problem. Examples of the latter case include the low voltage DC power supplies that are part of desktop computers and consumer electronics devices. Solar power. comprising one or more capacitors. and the simplest unregulated mains-powered DC power supply circuit consists of a transformer driving a single diode in series with a resistor. If it is used to produce DC. as well as any energy it consumes while performing that task. Electromechanical systems such as generators and alternators. DC power supply An AC powered unregulated power supply usually uses a transformer to convert the voltage from the wall outlet (mains) to a different. resistors. rectifier is used to convert alternating voltage to a pulsating direct voltage. stand-alone device or as an integral device that is hardwired to its load. How long it can supply energy without refueling or recharging (applies to power supplies that employ portable energy sources). and sometimes inductors. How stable its output voltage or current is under varying line and load conditions. Depending on its design. supplies that convert AC line voltage to DC voltage.

5 ns (approximately) Deflection Coefficients: 12 steps 5mV/cm . TV frame Sensitivity: Internal 0.filaments. With variable to 40ns/cm Accuracy: ±3 % (In cal position) Sweep Output: Approximately 5V(peak to peak) Trigger System: Modes: Auto or variable Source: CH 1 or CH 2.5cm External0. Some filtering may take place as well. 0.5 µs/ cm0.8V Trigger Bandwidth: 40 MHz ACERC/Department of ECE/EDC lab/17 . AC power supply An AC power supply typically takes the voltage from a wall outlet (mains supply) and lowers it to the desired voltage. 350 KHz). X-Y operation: 1:1 Vertical Deflection: (Both Channels) Bandwidth: DC 20 MHz (-3dB) Rise time: 17.2s/ cm (1-2-5 sequence) with MagX5 to 100 ns/cm. Only the most advanced equipment used expensive and bulky regulated power supplies. CH 2. CH 1&11 Alt / Chopped. external Slope: Positive or Negative Coupling: AC. (Approx. (d) ANALOG CRO Technical Specifications Operating Modes: OPERATING MODES CH 1. Input: 350V (DC+ peak AC) Time Base: Time coefficients: 18 steps.20V/cm (1-2-5 sequence) Accuracy: ± 3% Input Impedance: 1M Ω ||30pF Input coupling: DC-AC Gnd Max.

8 mArms Test Frequency: 50 HZ Test circuit Ground to chassis Miscellaneous: Fault Simulation: Total of 15 faults Can be simulated. Detailed Troubleshooting Procedure included.6 Vrms Test Current: Max.2 MHz (-3dB) XY mode: Phase shift < 5° 60 KHz Deflection coefficients: 12 calibrated Steps 5 mV /cm-20V /cm Input Impedance: 1MΩ || 30 pF Component Tester: Test Voltage: Max. Cathode ray tube: 140 mm Rectangular Tube with internal graticule. (P-31) phosphor Accelerating potential: 2000 VDC Display: 8x10 cm Trace rotation: Adjustable Calibrator: Square wave 1KHz(approx. 8.) 0.2V +1% Z Modulation: TTL level Mains Voltage: 230V ±10% 50Hz Power Consumption: 36 VA(approximately) Weight: 7.HORIZONTAL DEFLECTION Bandwidth: DC.3 Kg (Approximately) Dimensions (mm): W450 x H145 x D42 Front Panel Controls ACERC/Department of ECE/EDC lab/18 .

(3) Trigger Input: For feeding External trigger signal. (6) X Y: When pressed cuts-off internal TB & connects external horizontal signal via. BNC inputs provided for connecting the Input signal. (4) X Pos: Controls the horizontal position (5) Y Pos I & II: Controls vertical position of the trace.(1) Power ‘On/Off’: Turns ‘On’ & ‘Off’ (on in open cover condition only. (4) Volts/Div: For sensitivity selection of CH 1 & CH 2. (5) DC-AC-Gnd: Switch provided for Input coupling. All push buttons. CH II (7) X 5: When pressed gives 5 times magnification. (2) Time / Div: Rotary Switch for TB speed control. (7) CT: Input & Gnd terminals to be used for CT. Use position& Int/Focus controls to get the beam. (8) External: When pressed allows ext. trigger.) LED indicates power ‘On’. (10) Cal Variable: Controls the time speed in between the steps. (11) Auto/ Norm: In AT gives display of trace & auto trigger. When pressed becomes normal gives variable level trigger. Controls on PCB (1) Intensity: Controls the brightness (2) Focus: Controls the sharpness (3) Trace Rotation: Controls the horizontal alignment of the trace. & ACERC/Department of ECE/EDC lab/19 . (6) Component Tester: Switch when pressed converts scope into Component Tester mode. (9) TV: When pressed allows TV frame to be synchronized.

one or several signal periods or only a part of a period can be displayed. a further multiplication by a factor of 10 is required to ascertain the correct voltage value. most signals to be displayed are periodically repeating processes. The maximum signal voltage required at the vertical amplifier input for a display of 1cm is approximately 5mVpp. When dual switch also pressed this selects Alt or Chop modes.(12) Level: Controls the trigger level from positive peak to negative peak.83 times the potential. Time Measurements : As a rule. The latter corresponds to the real potential difference between the most positive and most negative points of a signal waveform. The number of periods per second is the repetition frequency Depending on the time base setting of the Time/Div.83. alternating voltage data normally refers to effective values (rms = root-mean-square value). There are 18 time coefficient ranges of the ST2001E. the peak-to-peak voltage (Vpp) value misapplied. switch. (16) Mono / Dual: When out. however smaller signals than this may also be displayed. switch. Amplitude Measurements In general electrical engineering. ACERC/Department of ECE/EDC lab/20 . selects CH I only. If a sinusoidal waveform. is to be converted into an effective (rms) value.: Selects the slope of triggering. from 0.The magnitude of the applied voltage is ascertained by multiplying the selected deflection coefficient by the vertical display height in cm. The variable time control (identified with an arrow knob cap) must be in its calibrated position Cal. displayed on the Oscilloscope screen. also called periods. (13) + / . (arrow pointing horizontally to the left). This is achieved with the attenuator control set at5mV/cm. it should be observed that sinusoidal voltages indicated in Vrms (Veff) have 2. Conversely. (14) Trig 1/ Trig 2: When out trigger CH I and when pressed triggers CH II (15) CH I Alt/: When out selects CH I and when pressed selects CH II Chop CH II. The deflection coefficients on the input attenuators are indicated in mV/cm or V/cm (peak-to-peak value).2s/cm. for signal magnitudes and voltage designations in Oscilloscope measurements. If an attenuator probe X10is used.5s/cm to 0.The duration of a signal period or a part of it is determined by multiplying the relevant time (horizontal distance in cm) by the time coefficient set on the Time/Div. However. the resulting peak-to-peak value must be divided by 2 x√2 = 2. The time coefficients are stated ins/cm. ms/cm and µs/cm on three fields. When pressed selects both.

the Trig 1/2 button has to be pressed in addition.For display with a higher repetition rate. Both channels then share the trace during each sweep period (chopped mode). the 'Alt/Chop' button must be pressed. For internal triggering with the signal from channel 2. only. an increase in phase difference is noticeable at higher frequencies. • Comparing two signals of different frequency or bringing one frequency up to the frequency of the other signal. Therefore.This mode is not suitable for the display of very low frequency signals as the display will flicker or appear to jump. the type of channel switching is less important but the alternate mode is normally suggested. The sensitivity and input impedance for both the X & Y axes are equal. dual trace operation is selected. The sensitivity of the horizontal amplifier during X-Y operation is selected by the CH II attenuator switch. In this condition both traces are displayed consecutively (alternate sweep). For 'Mono' operation with channel I only.Operating Modes : The required operating modes are selected with push buttons in the vertical amplifier section. • Phase comparison between two signals of the same frequency RESULT: . The X signal is connected via the input of channel 2. This can be overcome by pressing the 'Alt/Chop' button. For' Mono' operation with channel 2. This also applies for whole number multiples or fractions of the one signal frequency.Y mode for certain measuring tasks. Lissajous figures can be displayed in the X. For XY operation the XY button must be pressed. The phase shift is 3° approximately at 60 KHz.We successfully studied about analog and digital multimeter. On pressing the button marked 'Mono/Dual'. Regulated DC power supply and analog CRO ACERC/Department of ECE/EDC lab/21 . all push buttons should be out. Function generator. Note that the frequency limit of the X axis is approximately2 MHz (-3 dB).

circuit is open and the potential barrier does not allow the current to flow. Therefore.type (cathode) is connected to negative terminal of the supply voltage. When N-type (cathode) is connected to positive terminal and P-type (Anode) is connected negative terminal of the supply voltage is known as reverse bias and the potential barrier across the junction increases. At some forward voltage. 0-500mA) Voltmeter (0-20 V) Bread board Connecting wires THEORY:A p-n junction diode conducts only in one direction. The diode is said to be in ON state. the potential barrier altogether eliminated and current starts flowing through the diode and also in the circuit. reverse Saturation current and static & dynamic resistances. is known as forward bias. The current increases with increasing forward voltage. the circuit current is zero. P-N JUNCTION DIODE CHARACTERISTICS AIM: . the junction resistance becomes very high and a very small current (reverse saturation current) flows in the circuit. The V-I characteristics of the diode are curve between voltage across the diode and current through the diode. When external voltage is zero. Regulated Power supply (0-30v) Resistor 1KΩ Ammeters (0-200 mA. When P-type (Anode is connected to positive terminal and n. APPARATUS:P-N Diode IN4007. The reverse bias current produces due to minority charge carriers.Plot V-I characteristic of P-N junction diode & calculate cut-in voltage.1. The diode is said to be in OFF state. The potential barrier is reduced when diode is in the forward biased condition. ACERC/Department of ECE/EDC lab/22 . Therefore.

CIRCUIT DIAGRAM:FORWARD BIAS:- REVERSE BIAS:- ACERC/Department of ECE/EDC lab/23 .

the RPS positive is connected to the anode of the diode and RPS negative is connected to the cathode of the diode. Note down the corresponding current flowing through the diode and voltage across the diode for each and every step of the input voltage. Switch on the power supply and increases the input voltage (supply voltage) in steps. For forward bias. Connections are made as per the circuit diagram. 3. ACERC/Department of ECE/EDC lab/24 . 5. 6. The reading of voltage and current are tabulated. Graph is plotted between voltage and current. 4. 2.MODEL WAVEFORM:- PROCEDURE:FORWARD BIAS:1.

Note down the corresponding current flowing through the diode voltage across the diode for each and every step of the input voltage. Graph is plotted between voltage and current.NO APPLIED VOLTAGE (V) VOLTAGE DIODE(V) ACROSS CURRENT THROUGH DIODE(mA) PROCEDURE:REVERSE BIAS:1. Connections are made as per the circuit diagram 2. 6. the RPS positive is connected to the cathode of the diode and RPS negative is connected to the anode of the diode. OBSEVATION:S. The readings of voltage and current are tabulated. For reverse bias.OBSERVATION:S.NO APPLIEDVOLTAGE ACROSSDIODE(V) VOLTAGE ACROSS DIODE(V) CURRENT THROUGH DIODE(mA) ACERC/Department of ECE/EDC lab/25 . 3. Switch on the power supply and increase the input voltage (supply voltage) in Steps 4. 5.

What is the diode equation? 8. What is the break down voltage? 10. All the connections should be correct.Forward and Reverse Bias characteristics for a p-n diode is observed VIVA QESTIONS:1. RESULT: . What is PIV? 9. What is the effect of temperature on PN junction diodes? ACERC/Department of ECE/EDC lab/26 . Define cut-in voltage of a diode and specify the values for Si and Ge diodes? 5. Define depletion region of a diode? 2. What is meant by transition & space charge capacitance of a diode? 3. 2.PRECAUTIONS:1. What are the applications of a p-n diode? 6. Parallax error should be avoided while taking the readings from the Analog meters. Is the V-I relationship of a diode Linear or Exponential? 4. Draw the ideal characteristics of P-N junction diode? 7.

2. Regulated Power Supply (0-30V). Voltmeter (0-20V) Ammeter (0-100mA) Resistor (1KOhm) Bread Board Connecting wires CIRCUIT DIAGRAM:STATIC CHARACTERISTICS:- ACERC/Department of ECE/EDC lab/27 . ZENER DIODE CHARACTERISTICS AIM: Plot V-I characteristic of zener diode and study of zener diode as voltage regulator. APPARATUS: Zener diode. Observe the effect of load changes and determine load limits of the voltage regulator.

i. 3. 4. we connect a resistor in series with zener diode. The Regulated power supply voltage is increased in steps. But if the reverse bias is increased. Connections are made as per the circuit diagram.. The zener current (lz). 2. at a particular voltage it starts conducting heavily. It is used in voltage regulators. A p-n junction diode normally does not conduct when reverse biased. PROCEDURE:Static characteristics:1.e. it has very low dynamic resistance. High current through the diode can permanently damage the device To avoid high current. This voltage is called Break down Voltage. and the zener voltage (Vz) are observed and then noted in the tabular form.REGULATION CHARACTERISTICS:- Theory:A zener diode is heavily doped p-n junction diode. specially made to operate in the break down region. Once the diode starts conducting it maintains almost constant voltage across the terminals whatever may be the current through it. A graph is plotted between zener current (Iz) and zener voltage (Vz). ACERC/Department of ECE/EDC lab/28 .

6. 5. load current (IL) are measured.Regulation characteristics:1. VFL=Voltage across the diode. The above step is repeated by decreasing the value of the load in steps. 7. Zener current (lz). Connection are made as per the circuit diagram 4. 3.NO ZENER VOLTAGE(VZ) ZENER CURRENT(IZ) ACERC/Department of ECE/EDC lab/29 . The percentage regulation is given by the formula ((VNL-VFL)/VFL)X100 VNL=Voltage across the diode. The voltage regulation of any device is usually expressed as percentage regulation 2. when load is connected. The load is placed in full load condition and the zener voltage (Vz). The percentage regulation is calculated using the above formula OBSERVATIONS:Static characteristics:S. when no load is connected. All the readings are tabulated.

N 0 VNL(VOLTS) VFL (VOLTS) RL (KΏ) % REGULATION MODEL WAVEFORMS:- ACERC/Department of ECE/EDC lab/30 .Regulation characteristics:S.

What type of temperature coefficient does the Avalanche breakdown has? 10. how the depletion width effected? 3. In which region zener diode can be used as a regulator? 8. Draw the zener equivalent circuit? 6. What type of temp? Coefficient does the zener diode have? 2. How the breakdown voltage of a particular diode can be controlled? 9. VIVAQUESTIONS:1. Does the dynamic impendence of a zener diode vary? 4. The terminals of the zener diode should be properly identified 2. b) Percentage regulation of zener diode is calculated. Differentiate between line regulation & load regulation? 7. load should not be immediately shorted. While determined the load regulation. If the impurity concentration is increased. By what type of charge carriers the current flows in zener and avalanche breakdown diodes? ACERC/Department of ECE/EDC lab/31 . Explain briefly about avalanche and zener breakdowns? 5. RESULT:a) Static characteristics of zener diode are obtained and drawn. Should be ensured that the applied voltages & currents do not exceed the ratings of the diode. 3.PRECAUTIONS:1.

8KΩ. APPRATUS: N-channel FET (BFW11) Resistors (6. 1.5KΩ) Capacitors (0.3.1µF. SINGLE STAGE AMPLIFIER AIM: 1. Plot frequency response curve for single stage amplifier and to determine gain bandwidth product. 47µF) Regulated power Supply (0-30V) Function generator CRO CRO probes Bread board Connecting wires CIRCUIT DIAGRAM: ACERC/Department of ECE/EDC lab/32 . 1MΩ.

but its effective electrical diameter can be varied by the application of a voltage to a control electrode called the gate. In a JFET. Field-effect transistors are preferred for weak-signal work. In N-type material. Field-effect transistors are fabricated onto silicon integrated circuit (IC) chips. However. current flows along a semiconductor path called the channel. They are also preferred in circuits and systems requiring high impedance. the charge carriers are primarily electrons. 2. In the FET. Connections are made as per the circuit diagram. the junction is the boundary between the channel and the gate. ACERC/Department of ECE/EDC lab/33 . the gate is made of the opposite semiconductor type. Normally.THEORY: A field-effect transistor (FET) is a type of transistor commonly used for weak-signal amplification (for example. A single IC can contain many thousands of FETs. along with other components such as resistors. A signal of 1 KHz frequency and 50mV peak-to-peak is applied at the Input of amplifier. under some conditions there is a small current through the junction during part of the input signal cycle. Field-effect transistors exist in two major classifications. The FET is not. It can also switch DC or function as an oscillator. The physical diameter of the channel is fixed. for example in wireless. These are known as the junction FET (JFET) and the metal-oxidesemiconductor FET (MOSFET). In P-type material. and diodes. At one end of the channel. electric charges are carried mainly in the form of electron deficiencies called holes. there is an electrode called the source. At the other end of the channel. The device can amplify analog or digital signals. communications and broadcast receivers. such as is required in large wireless communications and broadcast transmitters. in general. for amplifying wireless (signals). The junction FET has a channel consisting of N-type semiconductor (N-channel) or P-type semiconductor (P-channel) material. used for high-power amplification. this P-N junction is reverse-biased (a DC voltage is applied to it) so that no current flows between the channel and the gate. The FET has some advantages and some disadvantages relative to the bipolar transistor. PROCEDURE: 1. there is an electrode called the drain. capacitors.

The Bandwidth of the amplifier is calculated from the graph using the Expression. Bandwidth BW=f2-f1 Where f1 is lower 3 dB frequency f2 is upper 3 dB frequency OBSERVATIONS: S. Frequency 7. Plot Av vs. Voltage gain in dB is calculated by using the expression. Av=20log 10(V0/Vi) 5. Output is taken at drain and gain is calculated by using the expression. Repeat the above steps for various input voltages.3.NO INPUT VOLTAGE(Vi) OUTPUT VOLTAGE(V0) VOLTAGE GAIN Av= (V0/Vi) ACERC/Department of ECE/EDC lab/34 . Av=V0/Vi 4. 6.

MODEL GRAPH: PRECAUTIONS: 1. All the connections should be tight. Transistor terminals must be identified properly RESULT: The frequency response of the common source FET Amplifier and Bandwidth is obtained. ACERC/Department of ECE/EDC lab/35 . 2.

What is the input impedance of FET amplifier? 9. FET is unipolar or bipolar? 3. Draw the equivalent circuit of common source FET amplifier? 7. What is the output impedance of FET amplifier? 10. What are the applications of FET? 5. What is the voltage gain of the FET amplifier? 8. What is the difference between FET and BJT? 2.VIVA QUESTIONS 1. What are the FET applications? ACERC/Department of ECE/EDC lab/36 . What are the FET parameters? 11. Draw the symbol of FET? 4. FET is voltage controlled or current controlled? 6.

drain voltage and drain current – gate bias characteristics of field effect transistor and measure of Idss & Vp. In response to small applied voltage from drain to source. and the drain current increases linearly with VDS. FDS=IDSS(1-VGS/VP)^2 ACERC/Department of ECE/EDC lab/37 . having the characteristics of high input impedance and less noise. With increase in ID the ohmic voltage drop between the source and the channel region reverse biases the junction and the conducting position of the channel begins to remain constant.4. In amplifier application. the Gate to Source junction of the FET s always reverse biased. the pinch off voltage ill is decreased. FET CHARACTERISTICS AIM: Plot drain current . the FET is always used in the region beyond the pinch-off. If the gate to source voltage (VGS) is applied in the direction to provide additional reverse bias. APPARATUS: FET (BFW-11) Regulated power supply Voltmeter (0-20V) Ammeter (0-100mA) Bread board Connecting wires THEORY: A FET is a three terminal device. The VDS at this instant is called “pinch of voltage”. the n-type bar acts as sample resistor.

From drain characteristics. Vary the VDD and observe the values of VDS and ID. 10. To plot the drain characteristics. To plot the transfer characteristics. keep VGS constant at 0V. 4.5 V and 2V. 3 for different values of VGS at 0. 7. 3.2V. calculate the values of dynamic resistance (rd) by using the formula rd = ∆VDS/∆ID ACERC/Department of ECE/EDC lab/38 . Vary VGG and observe the values of VGS and ID. 6. keep VDS constant at 1V. All the connections are made as per the circuit diagram. The readings are tabulated. All the readings are tabulated. Repeat the above steps 2.CIRCUIT DIAGRAM PROCEDURE: 1. 2. Repeat steps 6 and 7 for different values of VDS at 1. 8.1V and 0. 9. 5.

NO VGS=0V VDS(V) ID(mA) VGS=0.NO VDS =0.1V VDS(V) ID(mA) VGS=0.5V VGS (V) ID(mA) VGS (V) ID(mA) ACERC/Department of ECE/EDC lab/39 . calculate the value of transconductace (gm) By using the formula Gm=∆ID/∆VDS 12.2V VDS(V) ID(mA) TRANSFER CHARACTERISTICS: S. Tran conductance μ = ∆VDS/∆VGS OBSERVATIONS: DRAIN CHARACTERISTICS: S.5V VGS (V) ID(mA) VDS=1V VDS =1.11.From transfer characteristics. Amplification factor (μ) = dynamic resistance.

MODEL GRAPH: TRANSFER CHARACTERISTICS DRAIN CHARACTERISTICS ACERC/Department of ECE/EDC lab/40 .

Practically FET contains four terminals. substrate. Explain different regions of V-I characteristics of FET? 4. drain. 4. RESULT: 1. 3. Voltages exceeding the ratings of the FET should not be applied. Gate. amplification factor (μ) and Tran conductance (gm) of the given FET are calculated.PRECAUTIONS: 1. ACERC/Department of ECE/EDC lab/41 . What are the advantages of FET? 2. What are the applications of FET? 5. The three terminals of the FET must be carefully identified 2. 2. What are the types of FET? 6. Different between FET and BJT? 3. The drain and transfer characteristics of a given FET are drawn The dynamic resistance (rd). Draw the symbol of FET. which are called source. VIVA QUESTIONS: 1. Source and case should be short circuited.

What are the disadvantages of FET? 8. What are the parameters of FET? 6. CLIPPING AND CLAMPING CIRCUITS AIM: Application of Diode as clipper & clamper. APPARATUS: Diode (IN914 / IN4007) Resistors-1 K  100k  & DC Regulated power supply (for Vref) Signal generator (for Vi) CRO THEORY: CIRCUIT DIAGRAM OF POSITIVE CLIPPER ACERC/Department of ECE/EDC lab/42 .7.

If Vref = 0V.01RL. Where RB is bulk resistance of the diode. select RS=1k Ω and RL=100kΩ. Now keep the CRO in X-Y mode and observe the transfer characteristic waveform Note: ACERC/Department of ECE/EDC lab/43 . the entire positive half of the input waveform is clipped off. value of RB is 30Ω. PROCEDURE: 1.Fig.1 a. (Square wave can also be applied. For diode IN914. Keep the CRO in dual mode. Plot of input Vi (along X-axis) versus output Vo (along Y-axis) called transfer characteristics of the circuit can also be used to study the working of the clippers. 2. connect the input (Vi) signal to channel 1 and output waveform (Vo) to channel 2.) 4.Series resistor RS must be 100times greater than bulk resistance RB and 100 times smaller than load resistance RL. Before making the connections check all components using multimeter. In the positive clipper shown above the input waveform above Vref is clipped off. Positive clipper Circuit b. 3. 5. Make the connections as shown in circuit diagram. Observe the clipped output waveform which is as shown in fig. For stiff clipper: 100RB < RS< 0. Also record the amplitude and time data from the waveforms. Using a signal generator (Vi) apply a sine wave of 1KHz frequency and a peak-to peak amplitude of 10V to the circuit. If RB=30 Ω. Transfer Characteristics Clippers clip off a portion of the input signal without distorting the remaining part of the waveform. 2.

3. make the circuit connections as shown in fig. 2. Adjust the ground level of the CRO on both channels properly and view the output in DC mode (not in AC mode) for both clippers and clampers. Input and output waveform for positive Clipper RESULT: Output voltage V0 =__________ during positive half cycle =__________ during negative half cycle DOUBLE ENDED CLIPPER CIRCUIT DIAGRAM ACERC/Department of ECE/EDC lab/44 .1.3 and the output waveform observed is as shown in figure 5. Change the direction of diode and Vref to realize a negative clipper. 2. 4. WAVEFORMS Fig. For this use variable DC power supply for Vref. For double-ended clipping circuit. Vary Vref and observe the variation in clipping level.

The positive (and negative) clippers can also be realized in ACERC/Department of ECE/EDC lab/45 .3 a. Input and output waveform for double-ended clipping circuit RESULT: Output voltage V0 =__________ during positive half cycle =__________ during negative half cycle Note: The above clipper circuits are realized using the diodes in parallel with the load (at the output). hence they are called shunt clippers.Fig. Double ended clipper Circuit Apply Vi = 10 Vpp at 1kHz V1= 2V V2= -2V WAVE FORMS b.4. Transfer Characteristics Fig.

The magnitude of R and C must be chosen such that time constant τ = RLC is large enough to ensure the voltage across capacitor does not discharge significantly during the interval of the diode is non-conducting DESIGN: For proper clamping. 5 Positive Clamper The clamping network is one that will “clamp” a signal to a different DC level. T=1ms τ = RL. These circuits are called series clippers.the series configuration wherein the diode is in series with the load.C=100×T = 100ms Let C=1μF RL= 100×10 =100kΩ -3 1×10 -6 Select C =1uF and RL =100 kΩ ACERC/Department of ECE/EDC lab/46 . a diode and a resistive element.1  F DC regulated power supply Signal generator CRO CIRCUIT DIAGRAM Fig. τ >100T where T is the time period of input waveform If frequency is 1 kHz with peak-peak input voltage of 10V. POSITIVE CLAMPER COMPONENTS REQUIRED : Diode (IN 914/BY-127) Resistor of 100 K Capacitor . The network must have a capacitor. but it can also employ an independent DC supply (Vref) to introduce an additional shift.

Using a signal generator apply a square wave input (Vi) of peak-to-peak amplitude of 10V (and frequency greater than 50Hz) to the circuit (Sine wave can also be applied). ACERC/Department of ECE/EDC lab/47 . Also the grounds of both the channels can be made to have the same level so that the shift in DC level of the output can be observed. the output waveform is observed as shown in Fig. For without reference voltage. 2. 6 Input and output waveform for positive clamper without reference voltage. Note: 1. 3. For clamping circuit with reference voltage Vref. Before making the connections check all components using multimeter. For negative clampers reverse the directions of both diode and reference voltage.PROCEDURE: 1. 3. CRO in DUAL mode and DC mode. 5). Observe the clamped output waveform on CRO which is as shown in Fig. Fig. 7. 2. 6. 4. Keep Vref = 0V. Make the connections as shown in circuit diagram (fig.

output voltage V0=_________ With Vref =2. 2) Explain positive and negative clipper level? 3) What is the basic difference between clipper and clamper and voltage multiplier? 4) What are the applications of clipper and clamper? ACERC/Department of ECE/EDC lab/48 . output voltage V0=________ VIVA QUESTIONS 1) Explain difference between clipper and clamper. 7 Input and output waveform for positive clamper circuit with reference voltage = 2V RESULT: With Vref =0.Fig.

3K 33k 330Ω 1k Capacitors . R2. -2Nos. RC COUPLED AMPLIFIER AIM: Plot gain. . It is given to the second stage for further amplification and signal appears with more strength. -2Nos. -2Nos. ACERC/Department of ECE/EDC lab/49 -2Nos. Re form biasing and stabilization network. its amplified output appears across the collector resistor Rc. Emitter bypass capacitor offers low reactance paths to signal coupling Capacitor transmits ac signal. Resistances R1. blocks DC. Thus for more gain coupling is done and overall gain of two stages equals to A=A1*A2 A1=voltage gain of first stage A2=voltage gain of second stage.BC 107 Resistors . Frequency response curve is obtained by plotting a graph between frequency and gain in db . -3Nos. -2Nos. A coupling capacitor is used to connect output of first stage to input of second stage. THEORY: This is most popular type of coupling as it provides excellent audio fidelity. When ac signal is applied to the base of the transistor. Regulated power supply. Cascade stages amplify signal and overall gain is increased total gain is less than product of gains of individual stages.100uF 10uF Bread Board. Cathode ray oscilloscope.3. -2Nos.frequency characteristic of two stages RC coupled amplifier & calculate its bandwidth and compare it with theoretical value.6. APPARATUS: Transistors .The gain is constant in mid frequency range and gain decreases on both sides of the mid frequency range. The gain decreases in the low frequency range due to coupling capacitor Cc and at high frequencies due to junction capacitance Cbe.

ACERC/Department of ECE/EDC lab/50 . Apply input by using function generator to the circuit. Output of first stage b. Disconnect second stage and then measure output voltage of first stage calculates voltage gain. second stage and overall gain of two stages. Measure the voltage at a.3kohm R3 330 ohm C2 10 0 uF R6 3.3kohm R7 330 ohm C4 10 0 uF PROCEDURE: 1. 2. 3. Compare it with voltage gain obtained when second stage was connected.7 kohm R2 3. 4. A graph is plotted between frequency and voltage gain. 6. Output of second stage. 7.CIRCUIT DIAGRAM: VCC 12V R1 33kohm R5 1kohm C3 Q1 BC10 7 BP R4 33kohm R8 1kohm C5 Q2 BC10 7 BP C1 10 uF 10 uF 10 uF V1 20 V 14. Note down various values of gain for different frequencies. From the readings calculate voltage gain of first stage. Observe the output waveform on CRO.14V_rm s 10 0 0 Hz 0 Deg R9 4. 5.

OBSERVATIONS: APPLIED FREQUENCY O/P VOLTAGE (Vo) VOLTAGE GAIN in dB (20 log10Vo/Vi) MODELGRAPH:INPUT WAVE FORM: FIRST STAGE OUTPUT: SECOND STAGE OUTPUT: ACERC/Department of ECE/EDC lab/51 .

FREQUENCY RESPONSE: PRECAUTIONS: 1) All connections should be tight. VIVA QUESTIONS: 1) 2) 3) 4) 5) 6) 7) 8) 9) What is the necessity of cascading? What is 3dB bandwidth? Why RC coupling is preferred in audio range? Which type of coupling is preferred and why? Explain various types of Capacitors? What is loading effect? Why it is known as RC coupling? What is the purpose of emitter bypass capacitor? Which type of biasing is used in RC coupled amplifier? ACERC/Department of ECE/EDC lab/52 . RESULT: Thus voltage gain is calculated and frequency response is observed along with loading affect. 2) Transistor terminals must be identifying properly. 3) Reading should be taken without any parallax error.

8.frequency characteristic of emitter follower & find out its input and output resistances. COMMON EMITTER FOLLOWER AIM: Plot gain. APPARATUS: FETBFW10 Transistor BC107 Resistors Capacitors CRO Function Generator Multi meter THEORY: CIRCUITDIAGRAM: ACERC/Department of ECE/EDC lab/53 .

The input impedance of a CC amplifier is high. The ac output voltage from a CC circuit is essentially the same as the input voltage.The common collector circuit is also known as emitter follower. very high input impedance and low output impedance. low Zo and unity gain the CD circuit is used as a buffer amplifier between a high impedance signal source and a low impedance load. no phase shift between input and output. SOURCE FOLLOWER The FET common drain circuit has the output voltage developed across the source resistor Rs. Here the ac output voltage is closely equal to the ac input voltage. there is no voltage gain or phase shift. the CC circuit can be said to have a voltage gain of 1. the common drain circuit is also known as a source follower. Because the output voltage at the source terminal follows the signal voltage at the gate. The fact that the CC output voltage follows the changes in signal voltage gives the circuit its other name emitter follower. Thus. Because of its high Zi. ACERC/Department of ECE/EDC lab/54 . placed between a high impedance signal source and a low impedance load. A common drain circuit has a voltage gain approximately equal to 1. Output impedance is low and the Voltage gain is almost unity. Because of these Characteristics the CC circuit is normally used as a buffer amplifier. and the circuit can be said to have unity gain.

4. 7. The resistance of pot is the output resistance. Calculate Current gain using the formula AI=Iin/Iout. Measure current flowing through resistor at Source (or Emitter) terminal and note down it as Iout. Measure voltage across AB terminals and then calculate input current by using the formula Iin=Vab/Rab.PROCEDURE: 1. 6. Connect the circuit as per the circuit diagram. Observe corresponding output from the CRO and then calculate voltage gain using the formula Av=Vo/Vi. connect the pot at the output and vary the resistance of the pot up to half of the output with RL is equal to infinity. 8. 5. 3. Apply Vslv 1 KHz signal from the signal generator. To calculate the output resistance. 2. OBSERVATIONS: Frequency(Hz) Voltage gain (V) Current gain(mA) ACERC/Department of ECE/EDC lab/55 . Calculate input resistance using the formula Rin=Vin/Iin.

RESULT: Gain. FET terminals must be identified and connected carefully. Wires should be checked for good continuity 2. ACERC/Department of ECE/EDC lab/56 .frequency characteristic of emitter follower is successfully plotted & its input and output resistances also calculated.MODELWAVEFORM: PRECAUTIONS: 1.

APPARATUS: Transistor. This phenomenon is known as “Early effect”. the E-B junction is forward biased and C-B junction is reverse biased.9(a). 1A) Voltmeter (0-20V) Ammeters (0-100mA) Resistor. With increase of charge gradient with in the base region. The current amplification factor of CB configuration is given by. In CB configuration.To observe and draw the input and output characteristics of a transistor connected in common base configuration.IB) With an increasing the reverse collector voltage. IC is negative and IB is negative. the base is common to both input (emitter) and output (collector). Then. TRANSISTOR CB CHARACTERSTICS AIM: 1. the space-charge width at the output junction increases and the effective base width ‘W’ decreases. BC 107 Regulated power supply (0-30V. For normal operation. T he terminals are emitter. α= ∆IC/ ∆IE CIRCUIT DIAGRAM ACERC/Department of ECE/EDC lab/57 . the current of minority carriers injected across the emitter junction increases. there will be less chance for recombination within the base region. 2. So. In CB configuration. VEB=f1 (VCB. base. 1000Ω Bread board Connecting wires THEORY: A transistor is a three terminal active device. collector. IE is positive. To find α of the given transistor.IE) and IC=f2 (VCB.

OUTPUT CHARACTERISTICS: 1. 4V. Repeat the above step keeping VCB at 2V. For plotting the output characteristics. and 60 mA. A graph is drawn between VEB and IE for constant VCB. note down the values of IC. 40 mA. and 6V. all the readings are tabulated. 4. 3. Repeat the above step for the values of IE at 20 mA. Connections are made as per the circuit diagram. For plotting the input characteristics.All the readings is tabulated. 2. the output voltage VCE is kept constant at 0V and for different values of VEB note down the values of IE. 4. Connections are made as per the circuit diagram.PROCEDURE: INPUT CHARACTERISTICS: 1. A graph is drawn between VCB and Ic for constant IE OBSERVATIONS: ACERC/Department of ECE/EDC lab/58 . the input IE iskept constant at 10m A and for different values of VCB. 3. 2.

No VCB(V) IC(mA) IE=20mA VCB(V) IC(mA) IE=30mA VCB(V) IC(mA) ACERC/Department of ECE/EDC lab/59 .INPUT CHARACTERISTICS: S.No VCB=0V VEB(V) IE(mA) VCB=1V VEB(V) IE(mA) VCB=2V VEB(V) IE(mA) OUTPUT CHARACTERISTICS: IE=10mA S.

MODEL GRAPHS: INPUT CHARACTERISTICS OUTPUT CHARACTERISTICS ACERC/Department of ECE/EDC lab/60 .

7. 8. Meters should be connected properly according to their polarities. 2. The α of the given transistor is calculated. 4. What is the range of α for the transistor? Draw the input and output characteristics of the transistor in CB configuration? Identify various regions in output characteristics? What is the relation between α and β? What are the applications of CB configuration? What are the input and output impedances of CB configuration? Define α (alpha)? What is EARLY effect? Draw diagram of CB configuration for PNP transistor? 10. 9.PRECAUTIONS: 1. 2. VIVA QUESTIONS: 1. 5. What is the power gain of CB configuration? ACERC/Department of ECE/EDC lab/61 . 6. 2. 3. The input and output characteristics of the transistor are drawn. RESULT: 1. The supply voltages should not exceed the rating of the transistor.

9(b). base. Here collector is common to both input and output and hence the name common collector configuration. It consists of two P-N junctions namely emitter junction and collector junction. In Common collector configuration the input is applied between base and collector terminals and the output is taken from collector and emitter. Input characteristics are obtained between the input current and input voltage taking output voltage as parameter. ACERC/Department of ECE/EDC lab/62 . It is plotted between VBC and IB at constant VCE in CC configuration. Output characteristics are obtained between the output voltage and output current taking input current as parameter. APPARATUS: Transistor BC147 Resistance 68 k. (0 – 30) V 1 1 2 1 1 THEORY: Bipolar junction transistor (BJT) is a three terminal (emitter. collector) semiconductor device. TRANSISTOR CC CHARACTERSTICS AIM: To study the input and output characteristics of a transistor in common collector configuration and to determine its h parameters. (0-500)µA (0 – 1) V. 1k ohm Regulated power supply Ammeter Voltmeter Bread board Connecting wires (0 – 30V) (1-10)mA. There are two types of transistors namely NPN and PNP. It is plotted between V CE and IE at constant IB in CC configuration.

note down both base current IB and base collector voltage (VBC). 4. 2. 4. Repeat above procedure (step 3) for various values of VC (VBC). Make the connections as per circuit diagram. 3. 2.Emitter voltage (VCE). ACERC/Department of ECE/EDC lab/63 . OUTPUT CHARACTERSTICS: 1. Varying VCC gradually. note down the readings of emitter-current (IE) and collector. Connect the transistor in CC configuration as per circuit diagram. 3. Keep output voltage VCE = 0V by varying VEE.CIRCUIT DIAGRAM: PROCEDURE: INPUT CHARECTERSTICS: 1. By varying VBB keep the base current IB = 20µA. Varying VBB gradually. Repeat above procedure (step 3) for different values of IE .

NO VEB(V) IE(μA) VEB(V) IE(μA) VEB(V) IE(μA) VCB = 2V VCB = 4V OUT PUT CHAREACTARISTICS: IB = 50 μA S.OBSERVATIONS: INPUT CHARACTERISTICS: VCB = 1V S.NO VCE(V) IE(mA) VCE(V) IEmA) VCE(V) IE(mA) IB = 75 μA IB = 100 μA MODEL GRAPHS: INPUT CHARACTERSTICS: ACERC/Department of ECE/EDC lab/64 .

OUTPUT CHARECTERSTICS: Calculations from graph: a) Input impedance (hic) = ∆VBC / ∆IB (b) Forward current gain (hfc) = ∆IE / ∆IB (c) Output admittance (hoc) = ∆IE / ∆ VEC (d) Reverse voltage gain (hrc) = ∆VBC/∆ VEC RESULT: Thus the input and output characteristics of CC configuration are plotted and h parameters are found. a) Input impedance (hic) = b) Forward current gain (hfc) = c) Output admittance (hoc) = d) Reverse voltage gain (hrc) = ACERC/Department of ECE/EDC lab/65 .

The supply voltage should not exceed the rating of the transistor 2. Meters should be connected properly according to their polarities VIVA QUESTIONS: 1. Compare the voltage gain and input and output impedances of CE and CC configurations. What is the significance of hybrid model of a transistor? 8. 3.PRECAUTIONS: 1. Can we use CC configuration as an amplifier? 6. What is the need for analyzing the transistor circuits using different parameters? 7. Justify 4. What are the applications of CC configuration? 2. Is there any phase shift between input and output in CC configuration? ACERC/Department of ECE/EDC lab/66 . BJT is a current controlled device. Why CC Configuration is called emitter follower? 5.

P. base. To draw the input and output characteristics of transistor connected in CE configuration 2. and independent of VCE. After this the collector current becomes almost constant.9(c). input voltage is applied between base and emitter terminals and output is taken across the collector and emitter terminals.S (O-30V) 2Nos Voltmeters (0-20V) 2Nos Ammeters (0-200μA) & (0-500mA) Resistors 1Kohm Bread board THEORY: A transistor is a three terminal device. I C is always constant and is approximately equal to I B. The transistor always operated in the region above Knee voltage. TRANSISTOR CE CHARACTERSTICS AIM: 1. The value of VCE up to which the collector current changes with V CE is known as Knee voltage. The terminals are emitter. This is expected since the Base-Emitter junction of the transistor is forward biased. The current amplification factor of CE configuration is given by Β = ΔIC/ΔIB ACERC/Department of ECE/EDC lab/67 . The output characteristics are drawn between Ic and VCE at constant IB. In common emitter configuration. the collector current varies with VCE unto few volts only. Therefore input resistance of CE circuit is higher than that of CB circuit. The input characteristics resemble that of a forward biased diode curve. To find β of the given transistor. collector. Therefore the emitter terminal is common to both input and output. As compared to CB arrangement IB increases less rapidly with VBE. APPARATUS: Transistor (BC 107) R.

CIRCUIT DIAGRAM: PROCEDURE: INPUT CHARECTERSTICS: 1. 4. 4. 3. plot the graph between VBE and IB for constant VCE OUTPUT CHARACTERSTICS: 1. 2. 5. Connect the circuit as per the circuit diagram. Connect the circuit as per the circuit diagram for plotting the output characteristics the input current I B is kept constant at repeat the above step by keeping IB at 75 μA 100 μA tabulate the all the readings plot the graph between VCE and IC for constant IB 10μA and for different values of VCE note down the values of IC ACERC/Department of ECE/EDC lab/68 . Note down the values of IC 3. 2. 5. Repeat the above step by keeping VCE at 2V and 4V. Tabulate all the readings. For plotting the input characteristics the output voltage VCE is kept constant at 1V and for different values of VBE.

NO VBE(V) IB(μA) VBE(V) IB(μA) VBE(V) IB(μA) VCE = 2V VCE = 4V OUT PUT CHAREACTARISTICS: IB = 50 μA S.OBSERVATIONS: INPUT CHARACTERISTICS: VCE = 1V S.NO VCE(V) IC(mA) IB = 75 μA VCE(V) ICmA) IB = 100 μA VCE(V) IC(mA) ACERC/Department of ECE/EDC lab/69 .

MODEL GRAPHS: INPUT CHARACTERSTICS: OUTPUT CHARECTERSTICS: ACERC/Department of ECE/EDC lab/70 .

3. 2. 9. 4. the input and output characteristics of a transistor in CE configuration are Drawn 2.PRECAUTIONS: 1. The supply voltage should not exceed the rating of the transistor 2. 5. 7. the β of a given transistor is calculated VIVA QUESTIONS: 1. 10. Meters should be connected properly according to their polarities RESULT: 1. 8. What is the range of β for the transistor? What are the input and output impedances of CE configuration? Identify various regions in the output characteristics? what is the relation between α and β Define current gain in CE configuration? Why CE configuration is preferred for amplification? What is the phase relation between input and output? Draw diagram of CE configuration for PNP transistor? What is the power gain of CE configuration? What are the applications of CE configuration? ACERC/Department of ECE/EDC lab/71 . 6.

In input characteristics the emitter base junction forward biased by a very small voltage V BB where as collector base junction reverse biased by a very large voltage VCC.2Nos Breadboard THEORY: INPUT CHARACTERISTICS: The two sets of characteristics are necessary to describe the behavior of the CE configuration one for input or base emitter circuit and other for the output or collector emitter circuit. The transistor always operates in the active region.e. 2. The following important points can be observed from these characteristics curves. The input characteristics are a plot of input current IB Vs the input voltage VBE for a range of values of output voltage VCE.h-PARAMETERS OF CE CONFIGURATION AIM: To calculate the H-parameters of transistor in CE configuration.2Nos Regulated Power Supply (0-30V. the collector current ACERC/Department of ECE/EDC lab/72 . APPRATUS: Transistor BC 107 Resistors 100 K Ώ 100 Ώ Ammeter (0-200µA). Input resistance is high as IB increases less rapidly with VBE 3.The following important points can be observed from these characteristics curves:1. I. The characteristics resemble that of CE configuration. OUTPUT CHARACTERISTICS: A set of output characteristics or collector characteristics are a plot of out put current I C VS output voltage VCE for a range of values of input current IB . (0-200mA) Voltmeter (0-20V) . 1. Input resistance or input impedance hie = ΔVBE / ΔIB at VCE constant.e. 1A) . The input resistance of the transistor is the ratio of change in base emitter voltage ΔVBE to change in base current ΔIB at constant collector emitter voltage (VCE) i.

Input Impedance hie = ΔVBE / ΔIB at VCE constant Output impedance hoe = ΔVCE / ΔIC at IB constant Reverse Transfer Voltage Gain hre = ΔVBE / ΔVCE at IB constant Forward Transfer Current Gain hfe = ΔIC / ΔIB at constant VCE CIRCUIT DIAGRAM: ACERC/Department of ECE/EDC lab/73 . Output resistance or Output impedance hoe = ΔVCE / ΔIC at IB constant.The transistor is said to be working in saturation region. For low values of the VCE the IC increases rapidly with a small increase in VCE . to change in collector current ΔIC with constant IB. Output resistance is the ratio of change of collector emitter voltage ΔV CE .IC increases with VCE very slowly.

From the graphs calculate hfe ands hoe by taking the slope of the curves. From the graph calculate the input resistance hie and reverse transfer ratio hre by taking the slopes of the curves. Connect a transistor in CE configuration circuit for plotting its input and output characteristics. 7.NO VBE(V) IB(μA) VBE(V) IB(μA) VCE=6V Output Characteristics IB = 20 µA S. 2. 6. Tabular Forms Input Characteristics VCE=0V S. 4. Take the family of readings for the variations of IC with VCE at different values of fixed IB. Plot the output characteristics from the above readings.PROCEDURE: 1.NO VCE (V) IC(mA) IB = 40 µA VCE (V) IC(mA) IB = 60 µA VCE (V) IC(mA) ACERC/Department of ECE/EDC lab/74 . Take a set of readings for the variations in IB with VBE at different fixed values of output voltage VCE. 5. Plot the input characteristics of CE configuration from the above readings. 3.

MODEL WAVEFORM: Input Characteristics ACERC/Department of ECE/EDC lab/75 .

Output Characteristics ACERC/Department of ECE/EDC lab/76 .

RESULT: The H-Parameters for a transistor in CE configuration are calculated from the input and output characteristics. 1. Input Impedance hie = 2. Reverse Transfer Voltage Gain hre = 3. Forward Transfer Current Gain hfe = 4. Output conductance hoe = VIVA QUESTIONS: 1. What are the h-parameters? 2. What are the limitations of h-parameters? 3. What are its applications? 4. Draw the Equivalent circuit diagram of H parameters? 5. Define H parameter? 6. What are tabular forms of H parameters monoculture of a transistor?

ACERC/Department of ECE/EDC lab/77

7. What is the general formula for input impedance? 8. What is the general formula for Current Gain? 9. What is the general formula for Voltage gain?

ACERC/Department of ECE/EDC lab/78

10. HALF – WAVE RECTIFIER
AIM: - Study half wave rectifier and effect of filters on wave. Also calculate theoretical & practical ripple factor. APPARATUS:Experimental Board Multimeters 2No’s. Transformer (6-0-6). Diode, 1N 4007 Capacitor 100μf. Resistor 1KΩ. Connecting wires THEORY: During positive half-cycle of the input voltage, the diode D1 is in forward bias and conducts through the load resistor R1. Hence the current produces an output voltage across the load resistor R1, which has the same shape as the positive half cycle of the input voltage. During the negative half-cycle of the input voltage, the diode is reverse biased and there is no current through the circuit. i.e, the voltage across R1 is zero. The net result is that only the positive half cycle of the input voltage appears across the load. The average value of the half wave rectified o/p voltage is the value measured on dc voltmeter. For practical circuits, transformer coupling is usually provided for two reasons. 1. The voltage can be stepped-up or stepped-down, as needed. 2. The ac source is electrically isolated from the rectifier. Thus preventing shock hazards in the secondary circuit.

ACERC/Department of ECE/EDC lab/79

2. 3. (Vrms=output ac voltage. Connections are made as per the circuit diagram. ac and dc voltage at the output of the rectifier.CIRCUIT DIAGRAM:- PROCEDURE:1. measure the ac input voltage of the rectifier and. Find the theoretical of dc voltage by using the formula. 4. Connect the primary side of the transformer to ac mains and the secondary side to the rectifier input. Vdc=Vm/П Where. ACERC/Department of ECE/EDC lab/80 .) The Ripple factor is calculated by using the formula r=ac output voltage/dc output voltage. Vm=2Vrms. By the multimeter.

the %regulation is calculated using the formula.REGULATION CHARACTERSTICS:1. Connections are made as per the circuit diagram. 2. By increasing the value of the rheostat. 4.21 With Filter:Ripple factor. r=1/ (2√3 f C R) Where f =50Hz C =100µF RL=1KΩ PRACTICAL CALCULATIONS:Vac= Vdc= Ripple factor without Filter = Ripple factor with Filter = ACERC/Department of ECE/EDC lab/81 . The reading is tabulated. From the value of no-load voltages. 3. Draw a graph between load voltage (VL and load current ( IL ) taking VL on X-axis and IL on y-axis 5. Theoretical calculations for Ripple factor:Without Filter:- Vrms=Vm/2 Vm=2Vrms Vdc=Vm/П Ripple factor r=√ (Vrms/ Vdc )2 -1 =1. the voltage across the load and current flowing through the load are measured.

Vdc 2) Vm(v) USING CRO Vac(v) Vdc(v) r= Vac/ Vdc WITHFILTER V1(V) USINGCRO V2(V) Vdc= (V1+V2)/2 Vac= (V1.OBSERVATIONS:WITHOUT FILTER USING DMM Vac(v) Vdc(v) r= Vac/ Vdc WITH FILTER USING DMM Vac(v) Vdc(v) r= Vac/ Vdc WITHOUTFILTER:Vdc=Vm/П. Vac=√ ( Vrms2. Vrms=Vm/2.V2)/2√3 r= Vac/ Vdc PRECAUTIONS: ACERC/Department of ECE/EDC lab/82 .

What is the peak factor? ACERC/Department of ECE/EDC lab/83 . The Ripple factor for the Half-Wave Rectifier with and without filters is measured. What is the rectifier? 4. RESULT:1. What is TUF? 9.1. What is the difference between the half wave rectifier and full wave Rectifier? 5. What is the o/p frequency of Bridge Rectifier? half wave rectifier? 6. While determining the % regulation. 3. What is the PIV of Half wave rectifier? 2. 2. What is the average value of o/p voltage for HWR? 10. 2. The primary and secondary sides of the transformer should be carefully identified. first Full load should be applied and then it should be decremented in steps. What is the efficiency of 3. What are the ripples? 7. What is the function of the filters? 8. VIVA QUESTIONS: 1. The polarities of the diode should be carefully identified. The % regulation of the Half-Wave rectifier is calculated.

CIRCUIT DIAGRAM:- THEORY:The bridge rectifier is also a full-wave rectifier in which four p-n diodes are connected in the form of a bridge fashion. 1KΩ 100μF/25v.Study bridge rectifier and measure the effect of filter network on D. only two diodes will be conducting while other two diodes are in reverse bias. (6-0-6V) 2 Nos.C. The Bridge rectifier has high efficiency when compared to half-wave rectifier. During every half cycle of the input. APPARATUS:Experimental board Diodes Resistor Capacitor Transformer Multi meters Connecting Wires IN4007 4 Nos. ACERC/Department of ECE/EDC lab/84 . BRIDGE RECTIFER AIM: .11. voltage output & ripple.

Find the theoretical value of dc voltage by using the formula. 3.PROCEDURE:1. Measure both the ac and dc voltages at the output of the Bridge rectifier.482 (ii)With filter: Ripple factor. r=Vac/Vdc ACERC/Department of ECE/EDC lab/85 . 2. r = 1/ (4√3 f C RL) where f =50Hz C =100µF RL=1KΩ Practical Calculations:Without filter:Vac= Vdc= Ripple factor. Connect the ac main to the primary side of the transformer and secondary side to the bridge rectifier. Measure the ac voltage at the input of the rectifier using the multi meter. r = √ ( Vrms/ Vdc )2 -1 = 0. Connections are made as per the circuit diagram. 5. CALCULATIONS:Theoretical calculations:Vrms = Vm/ √2 Vm =Vrms√2 Vdc=2Vm/П (i)Without filter: Ripple factor. 4.

V2)/2√3 r= Vac/ Vdc ACERC/Department of ECE/EDC lab/86 .With filters:Vac= Vdc= Ripple factor. Vac=√( Vrms2.Vdc 2) Vm(v) USING CRO Vac(v) Vdc(v) r= Vac/ Vdc WITH FILTER V1(V) USINGCRO V2(V) Vdc= (V1+V2)/2 Vac= (V1. r=Vac/Vdc OBSEVATIONS:Without Filter USING DMM Vac(v) Vdc(v) r= Vac/ Vdc With Filter USING DMM Vac(v) Vdc(v) r= Vac/ Vdc Without Filter:Vrms = Vm/ √2 . Vdc=2Vm/П .

ACERC/Department of ECE/EDC lab/87 .MODELWAVEFORM:- PRECAUTIONS:1. The diodes will be connected correctly RESULT:The Ripple factor of Bridge rectifier is with and without filter calculated. The voltage applied should not exceed in the ratings of the diode 2.

What is the efficiency of Bridge rectifier? 3. What is the maximum DC power delivered to the load? ACERC/Department of ECE/EDC lab/88 . What is the difference between the Bridge rectifier and full wave rectifier? 5. What is the maximum secondary voltage of a transformer? 8. What is the disadvantage of Bridge Rectifier? 7. What are the different types of the filters? 9. What is the difference between the Bridge rectifier and half wave Rectifier? 10. What is the PIV of Bridge rectifier? 2. What is the o/p frequency of Bridge Rectifier? 6. What are the advantages of Bridge rectifier? 4.VIVAQUESTIONS:1.

No. To observe the characteristics of UJT and to calculate the Intrinsic Stand-Off Ratio (η).Department of Electronics & Communication Beyond The Syllabus 3EC9 ELECTRONICS LAB-I (ELECTRONICS & COMMUNICATION) S. 1 2 3 To find the Ripple factor and regulation of a Full-wave Rectifier with and without filter. List of Experiments Beyond The Syllabus Page No. To draw the V-I Characteristics of SCR ACERC/Department of ECE/EDC lab/89 .

During positive half cycle of secondary voltage (input voltage). D2 conducts and current flows through the load resistor RL in the same direction. the diode D1 is forward biased and D2is reverse biased. (lN4007) ---2 No’s Multimeters –2No’s Filter Capacitor (100μF/25V) Connecting Wires Load resistor. 1KΩ THEORY:The circuit of a center-tapped full wave rectifier uses two diodes D1&D2. Now. ACERC/Department of ECE/EDC lab/90 . diode D2 becomes forward biased and D1 reverse biased. The diode D1 conducts and current flows through load resistor RL.1. FULL-WAVE RECTIFIER AIM:-To find the Ripple factor and regulation of a Full-wave Rectifier with and without filter. P-n Diodes. There is a continuous current flow through the load resistor RL. during both the half cycles and will get unidirectional current as show in the model graph. APPARATUS:Experimental Board Transformer (6-0-6V). The difference between full wave and half wave rectification is that a full wave rectifier allows unidirectional (one way) current to the load during the entire 360 degrees of the input signal and half-wave rectifier allows this only during one half cycle (180 degree). During negative half cycle.

Measure both ac and dc voltages at the output side the rectifier. ACERC/Department of ECE/EDC lab/91 . 8. 6. Connect the ac mains to the primary side of the transformer and the secondary side to the 4. Connect the filter capacitor across the load resistor and measure the values of Vac and Vdc at the output.CIRCUIT DIAGRAM:- PROCEDURE: 2. 3. The theoretical values of Ripple factors with and without capacitor are calculated. Measure the ac voltage at the input side of the rectifier. 5. Find the theoretical value of the dc voltage by using the formula Vdc=2Vm/П 7. rectifier. Connections are made as per the circuit diagram.

From the values of Vac and Vdc practical values of Ripple factors are calculated. r= Vac/Vdc With filters:Vac= Vdc= ACERC/Department of ECE/EDC lab/92 . THEORITICAL CALCULATIONS:Vrms = Vm/ √2 Vm =Vrms√2 Vdc=2Vm/П (i)Without filter: Ripple factor.482 (ii)With filter: Ripple factor. r = √ ( Vrms/ Vdc )2 -1 = 0. The practical values are compared with theoretical values. r = 1/ (4√3 f C RL) where f =50Hz C =100µF RL=1KΩ PRACTICAL CALCULATIONS: Without filter:Vac= Vdc= Ripple factor.9.

Vac=√( Vrms2.Vdc 2) Vm(v) USING CRO Vac(v) Vdc(v) r= Vac/ Vdc With Filter V1(V) V2(V) Vdc= Vac= r= ACERC/Department of ECE/EDC lab/93 . Vdc=2Vm/П .Ripple factor=Vac/Vdc Without Filter: USING DMM Vac(v) Vdc(v) r= Vac/ Vdc With Filter USING DMM Vac(v) Vdc(v) r= Vac/ Vdc Without Filter Vrms = Vm/ √2 .

f=60Hz)? ACERC/Department of ECE/EDC lab/94 . Define regulation of the full wave rectifier? 2. The polarities of all the diodes should be carefully identified. If one of the diode is changed in its polarities what wave form would you get? 4. RESULT:The ripple factor of the Full-wave rectifier (with filter and without filter) is calculated. f=50Hz) be used in USA (V=110v. What is ripple factor of the Full-wave rectifier? 6. What is the necessity of the transformer in the rectifier circuit? 7. Can a rectifier made in INDIA (V=230v.V2)/2√3 Vac/ Vdc PRECAUTIONS: 1. VIVA QUESTIONS:1. Define peak inverse voltage (PIV)? And write its value for Full-wave rectifier? 3. Does the process of rectification alter the frequency of the waveform? 5. The primary and secondary side of the transformer should be carefully identified 2.USINGCRO (V1+V2)/2 (V1. What is meant by ripple and define Ripple factor? 9. What are the applications of a rectifier? 8. Explain how capacitor helps to improve the ripple factor? 10.

2Nos ACERC/Department of ECE/EDC lab/95 . 1A) UJT 2N2646 Resistors 10kΩ.2Nos . 330Ω Multimeters Breadboard Connecting Wires CIRCUIT DIAGRAM .2. 47Ω. UJT CHARACTERISTICS AIM: To observe the characteristics of UJT and to calculate the Intrinsic Stand-Off Ratio (η). APPARATUS: Regulated Power Supply (0-30V.

THEORY: A Unijunction Transistor (UJT) is an electronic semiconductor device that has only one junction. The emitter is of p-type and it is heavily doped. The resistance between B1 and B2. Two ohmic contacts B1 and B2 are attached at its ends. is a simple device that is essentially a bar of N type semiconductor material into which P type material has ACERC/Department of ECE/EDC lab/96 . or UJT. when the emitter is open-circuit is called interbase resistance. The UJT Unijunction Transistor (UJT) has three terminals an emitter (E) and two bases (B1 and B2). The base is formed by lightly doped n-type bar of silicon.The original unijunction transistor.

been diffused somewhere along its length. This causes a potential drop along the length of the device. beyond the valley point. current will begin to flow from the emitter into the base region. VEB proportional to IE. 3. When the emitter voltage reaches Vp. the additional current (actually charges in the base region) causes (conductivity modulation) which reduces the resistance of the portion of the base between the emitter junction and the B2 terminal. and so even more current is injected. RB1 reaches minimum value and this region. Connection is made as per circuit diagram. Overall. ACERC/Department of ECE/EDC lab/97 . When the emitter voltage is driven approximately one diode voltage above the voltage at the point where the P diffusion (emitter) is. This is represented by negative slope of the characteristics which is referred to as the negative resistance region. The 2N2646 is the most commonly used version of the UJT. PROCEDURE: 1. 2. especially in simple oscillator circuits. Because the base region is very lightly doped. This reduction in resistance means that the emitter junction is more forward biased. Output voltage is fixed at a constant level and by varying input voltage corresponding emitter current values are noted down. This procedure is repeated for different values of output voltages. This is what makes the UJT useful. the current starts to increase and the emitter voltage starts to decrease. the effect is a negative resistance at the emitter terminal. Circuit symbol The UJT is biased with a positive voltage between the two bases.

MODEL GRAPH: η OBSEVATIONS: VBB=1V VEB(V) IE(mA) VBB=2V VEB(V) IE(mA) VBB=3V VEB(V) IE(mA) ACERC/Department of ECE/EDC lab/98 . A graph is plotted between VEE and IE for different values of VBE. All the readings are tabulated and Intrinsic Stand-Off ratio is calculated using = (Vp-VD) / VBB 5.4.

9. What is the symbol of UJT? Draw the equivalent circuit of UJT? What are the applications of UJT? Formula for the intrinsic stand off ratio? What does it indicates the direction of arrow in the UJT? What is the difference between FET and UJT? Is UJT is used an oscillator? Why? What is the Resistance between B1 and B2 is called as? What is its value of resistance between B1 and B2? Draw the characteristics of UJT? 19. SILICON-CONTROLLED RECTIFIER(SCR) CHARACTERISTICS AIM: To draw the V-I Characteristics of SCR APPARATUS: SCR (TYN616) Regulated Power Supply (0-30V) Resistors 10kΩ. 7. 3. 8. 4. 6. 1kΩ Ammeter (0-50) µA Voltmeter (0-10V) ACERC/Department of ECE/EDC lab/99 .CALCULATIONS: VP = ηVBB + VD η = (VP-VD) / VBB η = ( η1 + η2 + η3 ) / 3 RESULT: The characteristics of UJT are observed and the values of Intrinsic Stand-Off Ratio are calculated. 5. VIVA QUESTIONS 1. 2. 10.

Breadboard Connecting Wires. ACERC/Department of ECE/EDC lab/100 . The operation of SCR can be studied when the gate is open and when the gate is positive with respect to cathode. J2. CIRCUIT DIAGRAM: THEORY: It is a four layer semiconductor device being alternate of P-type and N-type silicon. J3 the J1 and J3 operate in forward direction and J2 operates in reverse direction and three terminals called anode A. It consists of 3 junctions J1. cathode K. and a gate G.

anode current increase is in extremely small current junction J2 break down and SCR conducts heavily. ACERC/Department of ECE/EDC lab/101 . When the gate positive. with respect to cathode J3 junction is forward biased and J2 is reverse biased .Electrons from N-type material move across junction J3 towards gate while holes from P-type material moves across junction J3 towards cathode. When anode voltage is increased J2 tends to breakdown. So gate current starts flowing. Now most of the supply voltage appears across the load resistance.When gate is open. When gate is open thee break over voltage is determined on the minimum forward voltage at which SCR conducts heavily. no voltage is applied at the gate due to reverse bias of the junction J2 no current flows through R2 and hence SCR is at cut off. The holding current is the maximum anode current gate being open . when break over occurs.

OBSERVATION VAK(V) IAK ( µA) MODEL WAVEFORM: ACERC/Department of ECE/EDC lab/102 . 2. Keep the gate supply voltage at some constant value 3. Vary the anode to cathode supply voltage and note down the readings of voltmeter and ammeter.PROCEDURE: 1. Keep the gate voltage at standard value. Connections are made as per circuit diagram. A graph is drawn between VAK and IAK . 4.

What is the value of forward resistance offered by SCR? 10. IN which state SCR turns of conducting state to blocking state? 3. What is the function of gate in SCR? 8. What are the important type’s thyristors? 6. What are the applications of SCR? 4. What is the condition for making from conducting state to non conducting state? ACERC/Department of ECE/EDC lab/103 .RESULT: SCR Characteristics are observed. what happens when anode voltage is increased? 9. When gate is open. What the symbol of SCR? 2. VIVA QUESTIONS 1. How many numbers of junctions are involved in SCR? 7. What is holding current? 5.