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Desconectar alimentacin de la tarjeta.

Conectar cable USB entre board y PC Ubique Jumper J1 en la esquina superior derecha de la board, bien sea para programar la PROM de STMicro o la PROM de Atmel. Asimismo ubique los J23 y J25 para conectar el puerto JTAG a la memoria.

Configurar los J26 y J46 de la siguiente forma para ir al modo Master SPI

PLATFORM FLASH PROM


Conectar cable USB tipo A-B a la FPGA y al PC. Se reconocer e instalar en el PC tras lo cual se encender un LED verde en la tarjeta (El rojo indica la instalacin de Firmware).

APENDICE

Let's face it, in some applications, the easiest solution is the best solution. The best solution for these applications is either Internal Master SPI mode supported only by Spartan-3AN FPGAs or Master Serial mode using a Xilinx Platform Flash PROM, which is available for any Spartan-3 generation FPGA. These solutions use the fewest FPGA pins, have flexible I/O voltage support, and is fully supported by iMPACT, the Xilinx JTAG-based programming software.ug332

The Xilinx Platform Flash PROM provides easy, JTAG-programmable configuration storage for the FPGA. The FPGA configures from the Platform Flash using Master Serial mode.

The PROG push-button switch, labeled in Figure 4-1, forces the FPGA to reconfigure from the configuration memory source selected by the Configuration Mode Jumpers, page 39. Press and release this button to restart the FPGA configuration process at any time. The DONE pin LED, labeled in Figure 4-1, lights whenever the FPGA is successfully configured. If this LED is not lit, then the FPGA is not configured.

RESTRICCIONES UCF
# some connections shared with SPI Flash, DAC, ADC, and AMP NET "SPI_MISO" LOC = "AB20" | IOSTANDARD = LVCMOS33 ; NET "SPI_MOSI" LOC = "AB14" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; NET "SPI_SCK" LOC = "AA20" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; NET "SPI_SS_B" LOC = "Y4" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;

NET "ALT_SS_B" LOC = "Y5" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;


# write-protect and reset controls for Atmel AT45DB161D PROM NET "DATAFLASH_WP" LOC = "C14" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; NET "DATAFLASH_RST" LOC = "C15" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # write-protect control for ST M25P16 PROM NET "ST_SPI_WP" LOC = "C13" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;