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Chapter 7 Field Effect Transistors

 Explain the operation and characteristics of junction field effect transistors (JFET)  Understand JFET parameters  Discuss and analyze how JFETs are biased

 Explain the operation and characteristics of metal oxide semiconductor field effect transistors (MOSFET)
 Discuss and analyze how MOSFET are biased

 Troubleshoot FET circuits.


Field effect transistors control current by voltage applied to the gate. The FET’s major advantage over the BJT is high input resistance. Overall, the purpose of the FET is the same as that of the BJT.

The junction field effect transistor, like a BJT, controls current flow. The difference is the way this is accomplished. The JFET uses voltage to control the current flow. As you will recall the transistor uses current flow through the baseemitter junction to control current. JFETs can be used as an amplifier just like the BJT.

VGG voltage levels control current flow in the VDD, RD

The terminals of a JFET are the source, gate, and drain.

A JFET can be either p channel or n channel.

The JFET The current is controlled by a field that is developed by the reverse biased gate-source junction (gate is connected to both sides). With low or no VGG current flow is at maximum. With more VGG (reverse bias) the field (in white) grows larger. . This field or resistance limits the amount of current flow through RD.


ID increases proportionally with increases of VDD (VDS increases as VDD is increased). . This is called the Ohmic region (point A to B).JFET Characteristics and Parameters Let’s first take a look at the effects with a VGS of 0V.

Breakdown (point C) is reached when too much voltage is applied. This current is called maximum drain current (IDSS). .JFET Characteristics and Parameters The point when ID ceases to increase regardless of VDD increases is called the pinch-off voltage (point B). so JFETs operation is always well below this value. This of course is undesirable.


JFET Characteristics and Parameters From this set of curves you can see with increased voltage applied to the gate the ID is limited and of course the pinch-off voltage is lowered as well. .


The amount of VGS required to do this is called the cutoff voltage (VP).JFET Characteristics and Parameters We know that as VGS is increased ID will decrease. The field (in white) grows such that it allows practically no current to flow through. It is interesting to note that pinch-off voltage (VGS(off)) and cutoff voltage (VP) are both the same value but opposite polarity. . The point that ID ceases to increase is called cutoff.

.A biased p-channel JFET.

EX 7-1 .

JFET Characteristics and Parameters The transfer characteristic curve illustrates the control VGS has on ID from cutoff (V GS(off) ) to pinch-off (VP).VGS/VGS(off))2 . ID = IDSS(1 . Note the parabolic shape. The formula below can be used to determine drain current.


gm = ΔID/ ΔVGS gm = gm0 [ 1. However.JFET Characteristics and Parameters Forward transfer conductance of JFETs is sometimes considered.VGS/VGS(off) ] gm0 = 2IDSS/|VGS(off) | Input resistance for a JFET is high since the gate-source junction is reverse-biased. It is the changes in ID based on changes in VGS. RIN = |VGS / IGSS| Drain-to-source resistance is the ratio of changes of VDS to ID. r’ds = ΔVDS / ΔID . the capacitive effects can offset this advantage particularly at high frequencies.


In most cases the ideal Q-point will be the middle of the transfer characteristic curve. which is about half of the IDSS. the JFET must also be biased for operation.JFET Biasing Just as we learned that the bipolar junction transistor must be biased for proper operation. Let’s look at some of the methods for biasing JFETs. .

This voltage can be determined by the formulas below. VGS = VG – VS =0 . Notice there is no voltage applied to the gate. The voltage to ground from here will always be 0V.IDRS (n channel) VGS = -IDRS (p channel) VGS =+IDRS VD = VDD – IDRD VDS = VD – VS = VDD – ID ( RD + RS ) . ID = IS for all JFET circuits.JFET Biasing Self-bias is the most common type of biasing method for JFETs. However. the voltage from gate to source (VGS) will be positive for n channel and negative for p channel keeping the junction reverse-biased.

7-6 .EX.

VGS is the desired voltage to set the bias.VGS/VGS)2 ..JFET Biasing Setting the Q-point requires us to determine a value of RS that will give us the desired ID and VGS. The data sheet provides the IDSS and VGS(off). RS = | VGS/ID | To be able to do that we must first determine the VGS and ID from the either the transfer characteristic curve or more practically from the formula below. ID = IDSS(1 . The formula below shows the relationship.

EX. 7-7 .

let’s determine how this is done.JFET Biasing Since midpoint biasing is most common.4 . VGS  VGS(off)/3. The values of RS and RD determine the approximate midpoint bias. The VGS to establish this can be determined by the formula below. Half of IDSS would be ID that is midpoint.

RD = (VDD/2)/ID .JFET Biasing The value of RS needed to establish the computed VGS can be determined by the previously discussed relationship below. RS = | VGS/ID | The value of RD needed can be determined by taking half of VDD and dividing it by ID.

EX.7-9 .

Setting it at midpoint on the drain curve is most common.JFET Biasing Remember the purpose of biasing is to set a point of operation (Qpoint). Its value is arbitrary but it should be large enough to keep the input resistance high. . In a self-biasing type JFET circuit the Q-point is determined by the given parameters of the JFET itself and values of RS and RD. One thing not mentioned in the discussion was RG .

Note that load line extends from VGS(off)(ID= 0A) to VP(ID = IDSS) . First determine the VGS at IDSS from the formula below.JFET Biasing The transfer characteristic curve along with other parameters can be used to determine the midpoint bias Q-point of a selfbiased JFET circuit. VGS = -IDRS Where the two lines intersect gives us the ID and VGS (Qpoint) needed for midpoint bias.

EX. 7-10 .

VS = IDRS VG = (R2/R1 + R2)VDD VGS= VG – VS VS = VG – VGS ID = VS / RS ID= (VG – VGS ) / RS . Determining ID. R1 and R2 are used to keep the gate-source junction in reverse bias. Operation is no different from self-bias.JFET Biasing Voltage-divider bias can also be used to bias a JFET. VGS for a JFET voltage-divider circuit with VD given can be calculated with the formulas below.

EX. 7-11 .

VGS = VG = (R2/R1 + R2)VDD The second point is ID when VGS is 0. The first point is ID = 0 and VGS (note that VGS = VG when ID = 0).JFET Biasing In using the transfer characteristic curve to determine the approximate Q-point we must establish the two points for the load line. ID = VG/RS .

EX. 7-12 .

This would adversely affect the Q-point. . This is an undesirable problem that in extreme cases would require trying several of the same type until you find one that works within the desired range of operation. The voltage-divider bias is less affected by this than selfbias.JFET Biasing Transfer characteristics can vary for JFETs of the same type.

The MOSFET The metal oxide semiconductor field effect transistor (MOSFET) is the second category of FETs. Note the difference in construction. . The chief difference is that there is no actual pn junction as the p and n materials are insulated from each other. MOSFETs are static sensitive devices and must be handled by appropriate means. There are depletion MOSFETs (D-MOSFET) and enhancement MOSFETs (E-MOSFET). The E-MOSFET has no structural channel.

the gate is made more negative effectively narrowing the channel or depleting the channel of electrons.The MOSFET The D-MOSFET can be operated in depletion or enhancement modes. To be operated in depletion mode. .

For p channel MOSFETs. attracting more electrons into the channel for better current flow. Remember we are using n channel MOSFETs for discussion purposes.The MOSFET To be operated in the enhancement mode the gate is made more positive. . polarities would change.

With a positive voltage on the gate the p substrate is made more conductive.The MOSFET The E-MOSFET or enhancement MOSFET can operate in only the enhancement mode. .

Dual gate MOSFETs have two gates. . which helps control unwanted capacitive effects at high frequencies.The MOSFET The lateral double diffused MOSFET (LDMOSFET) and the V-groove MOSFET (VMOSFET) are specifically designed for high power applications.

.MOSFET Characteristics and Parameters Since most of the characteristics and parameters of MOSFETs are the same as JFETs we will cover only the key differences.

Note this equation is no different for ID than JFETs and that the transfer characteristics are similar except for its effect in the enhancement mode.VGS/VGS(off) )2 Remember n and p channel polarity differences. ID = IDSS(1 .MOSFET Characteristics and Parameters For the D-MOSFET we have to also consider its enhancement mode. . Calculating ID with given parameters in the enhancement mode and depletion mode is the same.

D-MOSFET general transfer characteristic curves .

VGS(th))2 ID = K(VGS . The constant K must first be determined.VGS(th))2 .MOSFET Characteristics and Parameters The E-MOSFET for all practical purposes does not conduct until VGS reaches the threshold voltage (VGS(th)). ID(on) is a data sheet given value. ID when it is when conducting can be determined by the formulas below. K = ID(on) /(VGS .

and drain-feedback bias.MOSFET Biasing The three ways to bias a MOSFET are zero-bias. The input voltage swings it into depletion and enhancement mode. zero biasing as the name implies has no applied bias voltage to the gate. . For D-MOSFET. voltage-divider bias.

7-15 .EX.

ID can be determined as follows. Voltage-divider bias must be used to set the VGS greater than the threshold voltage (VGS(th)).VGS(th))2 ID = K(VGS -VGS(th))2 VDS can be determined by application of Ohm’s law and Kirchhoff’s voltage law to the drain circuit.MOSFET Biasing For E-MOSFETs. normal voltage divider methods can be used. . To determine VGS. zero biasing cannot be used. The following formula can now be applied. K = ID(on)/(VGS .

With VGS given determining ID can be accomplished by the formula below. ID = (VDD – VDS)/RD .MOSFET Biasing With drain-feedback bias there is no voltage drop across RG making VGS = VDS.

EX. 7-16 .

EX. 7-17 .

 JFETs have a high input resistance since the gatesource junction is reverse-biased.  IDSS for all FETs is the maximum amount of current flow in the drain circuit when VGS is 0V. gate. Midpoint is most common for use in amplifiers. and drain.  All FETs must be biased for proper operation. .  Unwanted capacitance associated with FETs can be dealt with by using dual gate-type FETs.Summary  JFETs are unipolar devices.  JFETs have three terminals: source.

 E-MOSFETs have no IDSS parameter. E-MOSFETs can only operate in the enhancement mode. A channel is induced with VGS greater than VGS(th).  D-MOSFETs can operate in both depletion and enhancement modes.Summary  MOSFETs differ in construction in that the gate is insulated from the channel.  E-MOSFETs have no physical channel. .  There are special MOSFET designs for high power applications.

We will discuss some of the common faults associated with FET circuits. having a thorough knowledge of the devices makes it easier to utilize them for troubleshooting circuits. Experience in troubleshooting is the best teacher.Troubleshooting As always. . and having basic theoretical knowledge is extremely helpful.

If VD is less than normal in a self-biased JFET circuit. It is a clear indication of no drain current. The low drain voltage would be indicative of more drain current flowing than normal.If VD = VDD in a self-biased JFET circuit. an open in the gate circuit is more than likely the problem. Replace the FET only if associated components are known to be good. Use of senses to check for obvious failures is the first and easiest step. Troubleshooting less . it could be one of several opens.

Troubleshooting In a zero-biased D-MOSFET or drain-feedback biased E-MOSFET. . an open in the gate circuit is more difficult to detect. It may seem to be biased properly with dc voltages but will fail to work properly when an ac signal is applied.

Troubleshooting With a voltagedivider biased E-MOSFET. With an open R1 there is no drain current. VD = 0 . circuit faults are more easily detected. so the VD = VDD. With an open R2 full VDD is applied to the gate turning it on fully.

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