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8.2.1 A UPFC Connected at the Sending End

It was mentioned in the previous chapter (section 7.4), that the provision of
an energy or power source at the DC bus of a SSSC enables the control of
not only active power but also reactive power ﬂow in the line. As a matter
of fact, both active and reactive power ﬂow in the line can be controlled
independently by the injection of both active (real) and reactive voltages.
Fig. 8.5 shows the SSSC connected at the sending end of the line. If the
power required at the DC bus is fed by a shunt connected converter, then
the objectives of independently controlling the active and reactive power
in the line are achieved. In addition, the shunt-connected converter can
also generate/absorb reactive power such that it can relieve the load on
the generator(s) connected to the sending end. As a matter of fact, if the
ratings of the shunt-connected converter are adequate, then the UPFC can
be connected at any location in the network and the voltage at the bus
(where the shunt converter is connected) can be held constant (regulated).

+

V

S

V

R

V

C

V

S

δ

2

V

δ

2

V

V

R

=

=

φ

X

β

I

L

Figure 8.5: A SSSC with a power source connected at the sending end

Let the injected voltage (ˆ

VC) be expressed as

ˆ
VC = VC β = (Vp +jVr) −φ

(8.1)

where I −φ is the current in the line.

From Eqs. (7.63) and (7.65), we can write

PR = P0 + VVp
XL

sin

δ

2 −φ

+ VVr
XL

cos

δ

2 −φ

(8.2)

−QR = Q0− VVp
XL

cos

δ

2 −φ

+ VVr
XL

sin

δ

2 −φ

(8.3)

where P0 and Q0 are the active and reactive power (at the receiving end) in
the absence of the series converter, given by

P0 = V2
XL

sinδ, Q0 = V2
XL

(1−cosδ)

(8.4)

8. Uniﬁed Power Flow Controller and other Multi-Converter Devices 247

The phase angle (φ) of the current is related to Vp from Eq. (7.64) as

sinφ = Vp

2V sin δ

2

(8.5)

From Eq. (8.1), we have

Vp = VC cos(β +φ)

(8.6)

Vr = VC sin(β +φ)

(8.7)

Substituting Eqs. (8.6) and (8.7) in (8.2) and (8.3) we get

PR = P0 + VVC
XL

sin

δ

2 +β

(8.8)

−QR = Q0− VVC
XL

cos

δ

2 +β

(8.9)

From Eqs. (8.8) and (8.9), we can express,

PR−jQR = (P0 +jQ0) + VVC
XL

ej(δ

2+β−π

2)

(8.10)

For a constant value of VC and β varying over 360◦, the locus of (PR−jQR)
describe a circle of radius VVC
XL

and having centre at (P0,Q0) in the P −Q
plane. The operating region is the inside of the circle bound by the circle
having the maximum radius corresponding to VC = VC max (based on the
series converter ratings. Typical range of VC max is 0.15 to 0.25 p.u. (of the
line, phase to neutral voltage).

For a speciﬁed value of δ, P is maximum when

β = π

2 − δ
2

(8.11)

and Pmax is given by

Pmax = P0 + VVC
XL

(8.12)

The equivalent circuit of the UPFC is shown in Fig. 8.6. The shunt converter
draws both active (Ip) and reactive current (Ir). The active current (Ip) is
not independent and is related to Vp by the relation

VIp = IVp

(8.13)

in steady-state. The above equation represents power balance on the DC
bus neglecting losses in the converter. The reactance xl in series with the
injected voltage represents the leakage reactance of the coupling transformer.

248

FACTS Controllers in Power Transmission and Distribution

+

+

p

V

rI

I

V

S

l

x

r

V

V

L

Line

p

I

P
L+jQ

L

Figure 8.6: Equivalent circuit of a UPFC

In Fig. 8.6, the equivalent circuit of the UPFC can be viewed as a
two port network. The shunt converter is connected at one port while the
series converter is connected in series with the line at the other port. The
voltage at the latter port is denoted by VL. If the series injected voltages, Vp
and Vr are controlled to regulate the power and reactive power in the line,
these quantities are conveniently measured at the line side port of the UPFC.
Since the voltage VL is normally uncontrolled, the complex power (PL+jQL)
need not describe a circle for constant (magnitude) VC. Actually, it can be
shown that (PL +jQL) describes an ellipse in the P-Q plane. The complex
power SL is given by

SL = PL +jQL = I∗VL = V∗L −V∗R
−jXL

·VL

= V2

L −V∗RVL
−jXL

(8.14)

Since VR = V − δ

2, ˆ

VL = ˆ

VS + ˆ

VC = V δ

2 + VC β we can express PL and

QL as

PL = P0 + VVC
XL

sin

δ

2 +β

(8.15)

QL = Q0 + V2

C
XL

− VVC
XL

cos

δ

2 +β

+ 2VVC
XL

cos

δ

2 −β

(8.16)

where P0 and Q0 are deﬁned by Eq. (8.4). Deﬁning Q 0 as

Q 0 = Q0 + V2

C
XL

(8.17)

we can ﬁnally obtain the equation involving PL and QL after eliminating β.
The ﬁnal equation is

(PL−P0)2

(5−4cosδ) + (QL−Q 0)2

−4(PL−P0)(QL−Q 0)sinδ
= V2

V2

C

X2

L

(2cosδ−1)2

(8.18)

8. Uniﬁed Power Flow Controller and other Multi-Converter Devices 249

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2

−0.6

−0.4

−0.2

0

0.2

0.4

0.6

0.8

1

1.2

P

L

QL

Figure 8.7: Operating region in the PL−QL plane

The above is an equation for ellipse with the centre

P0,Q0 + V2

C
XL

.
For a δ = 15◦, VC = 0.20, XL = 0.25, V = 1.0, the locus of SL in the P −Q
plane is shown in Fig. 8.7.

It is to be noted that Ir can be controlled to regulate the voltage VS
if it is not regulated by the generator connected at the sending end. Thus,
three variables, VS, PL and QL can be regulated by controlling Ir,VC and
β. It is assumed that there are no constraints imposed by the equipment
ratings that will limit the control objectives.

The assumption is valid if the settings or the reference values for the
controlled variables (VS,PL and QL) lie in the feasible region. With this
assumption, the analysis of the UPFC is applicable even when the location
of the UPFC is not exactly at the sending end.

8.2.2 A Special Case

Here, the line current, which is same as the sending end current (I) is as-
sumed to be in phase with the sending end voltage (VS). In this case, ˆ
Ip

and ˆ

Vp are in phase with ˆ

VS. To simplify the analysis, xl is either neglected
or merged with the series line reactance. The reactive current (Ir) can be
either assumed to be zero or being controlled to regulate the magnitude of
VS. The power ﬂow in the line depends essentially on Vp and Vr as before.

250

FACTS Controllers in Power Transmission and Distribution

δ
δ

I

V

S

L

V

r

V

R

V

V

p

Figure 8.8: Phasor diagram

The phasor diagram of the voltage and line current is shown in Fig.8.8.

The voltage (VL) is given by

ˆ
VL = ˆ

VS + ˆ

Vp + ˆ
Vr

(8.19)

If it is assumed that|VR|=|VL|, then the line current magnitude (I) is given
by

I = 2(VS +Vp)tanδ
X

(8.20)

The power ﬂow in the line is given by

P = VRI cosδ

= 2VSVRnsinδ
X

= 2nP0, P0 = VSVR

X sinδ

(8.21)

where

n = VS +Vp
VS

= 1 + Vp
VS

(8.22)

If power is injected into the line from the series converter (Vp > 0) then
n > 1. On the other hand, if the series converter draws power from the
line (Vp < 0) then n < 1. It is obvious that injecting positive Vp has the
advantage of increasing the power ﬂow. Since Vr is half the line voltage drop
across the line reactance, the current magnitude is doubled and the power
ﬂow is doubled.

Remarks

The combination of the shunt active current Ip and the series active voltage
(Vp) can be viewed as the representation of an ideal transformer of turns
ratio 1 : n; when the line current is in phase with the voltage. Consider the
ideal transformer shown in Fig. 8.9(a). If I2 is in phase with V2, I1 is also in

8. Uniﬁed Power Flow Controller and other Multi-Converter Devices 251

phase with V1. The ideal transformer can be represented by the equivalent
circuit shown in Fig. 8.9(b). Here,

Vp = (n−1)V1, Ip = (n−1)I2

(8.23)

Obviously,

VpI∗2 = V1I∗p

(8.24)

The equivalence of the ideal transformer with the circuit representing the
power transfer through the two converters of the UPFC (ﬂowing through
the DC bus) is valid only when the power factor is unity (V2 in phase with
I2). The reactive current injected by the shunt converter can be controlled
to bring about unity power factor at the sending end (VS in phase with I in
Fig. 8.6). For this special case, we can represent the UPFC by the equivalent
circuit shown in Fig. 8.10.

Here, the turns ratio n is variable as Vp varies with the control. Thus,
(for this special case, when V2 is in phase with I2) the UPFC is made up of
a STATCOM, SSSC and variable turns ratio ideal transformer in between
the two.

2

V

1I

1:n

2I

(a) An ideal transformer in the line

V

1

+

I

p

2

V

p

V

V

1

(b) Equivalent circuit

Figure 8.9: Representation of an ideal transformer in the line

2

V

2I

+

L

V

1:n

V

rI

r

V

S

Figure 8.10: Equivalent circuit of a UPFC in the special case

252

FACTS Controllers in Power Transmission and Distribution

UPFC Connected at the Receiving End

If we assume that a UPFC is connected at the receiving end of a line supply-
ing a load (as shown in Fig. 8.11), we can further assume that the reactive
current supplied by the shunt converter improves the power factor of the
apparent load (including Ir) to unity. In other words, I is in phase with V.

r

V

+

V

m

r

V

p

V

I

p

V

L

V

L

δ
δ

V

m

E

+

I

V

δ

E

Xj

(b) Phasor diagram

I

V

I
L

(a) Equivalent Circuit

Figure 8.11: A line supplying a load through UPFC

The power transmitted over the line is given by

P = VI = V(IL +Ip)

(8.25)

V and IL are obtained (from the phasor diagram) as

V = Vm−Vp = Ecosδ−Vp = nEcosδ

(8.26)

IL = 2Esinδ
X

(8.27)

where n = V
Vm

= Vm−Vp
Vm

and n < 1. Note that we have considered Vp as a

voltage drop so that n < 1. It can be shown that

I = IL
n

(8.28)

Hence, we can derive

P = E2

X sin2δ = 2P0

(8.29)

Note that the power ﬂow is double the value without the injection of Vr (for

The above discussion shows clearly that there is no advantage of the
power exchanged between the two converters. The UPFC in this case can be
replaced by a SSSC injecting Vr (to enhance line current) and a STATCOM
injecting Ir to compensate for the reactive current drawn by the load.

8. Uniﬁed Power Flow Controller and other Multi-Converter Devices 253

8.2.3 UPFC Connected at the Midpoint

Let us assume that a UPFC is connected at the midpoint of a symmetrical
lossless line. The UPFC can be represented by the two port network shown
in Fig.8.12. The shunt converter draws a current represented by the phasor
IC ψ and the series converter injects a voltage (VC β). It can be shown that
the two port network in Fig.8.12 is also equivalent to the two port networks
shown in Fig. 8.13.

+

1

V

I
2

I
C*

V

C

[

=

]

Re

*

I

2

V

1

V

C

I
C

I
1

V

2

Figure 8.12: Two port network representing a UPFC

+

2

C

V

C

V

V
1

V
2

CI

+

C

V

CI
2

CI
2

V
1

V
2

I
1

I
2

+

2

(a) Equivalent network 1

(b) Equivalent network 2

Figure 8.13: Alternative representations for UPFC

It is more convenient to represent the UPFC by any one of the two
equivalents shown in Figure 8.13. The analysis is simpliﬁed as shown below.

Analysis

The equivalent circuit of a symmetrical lossless line with a UPFC connected
at the midpoint is shown in Fig. 8.14. Here, we are representing the UPFC
by the equivalent network I shown in Fig. 8.13(a). The current source IC ψ

254

FACTS Controllers in Power Transmission and Distribution

V

m

I
m

CI
2

CI
2

V
2

V
1

I
1

I
2

C

V

+

2

C

V

+

jX
2

jX
2

δ

V

0

V

+

2

+

Figure 8.14: System equivalent circuit

is represented as two parallel current sources, for convenience. (Note that we
are using the same symbols for the phasor and its magnitude, for simplicity)

For the circuit shown in Fig. 8.14, we can write

V δ−jX

2

Im + IC
2

+ VC

2 = Vm

(8.30)

V 0 +jX
2

Im− IC

2

− VC

2 = Vm

(8.31)

Adding Eqs. (8.30) and (8.31), we can solve for Vm as

ˆ
Vm = Vm δm = V cos δ

2 δ

2 − jX

4 IC ψ

(8.32)

Subtracting Eq. (8.30) from (8.31), we can solve for Im as

ˆ
Im = 2V sin δ

2

X

δ

2 + VC β
jX

(8.33)

The power and reactive power outputs at the port 2 of the UPFC are given
by

P +jQ =

Vm + VC
2

Im− IC

2

= VmI∗m + 1

2(VCI∗m−VmI∗C)− VCI∗C

4

(8.34)

From power balance equation in steady state, we have

Re[I∗CVm] = Re

VC

2

I∗m− I∗C

2

+ VC
2

I∗m + I∗C
2

= Re[VCI∗m]

(8.35)

Substituting Eq. (8.35) in (8.34), we get the expression for the power ﬂow
(P) in the line as

P = Re[VmI∗m]−Re

VCI∗C

4

(8.36)

8. Uniﬁed Power Flow Controller and other Multi-Converter Devices 255

Substituting for Vm and Im from Eq. (8.32) and (8.33) in (8.36), we get

P = V2

X sinδ + VCV

X cos δ

2 cos

δ

2 −β + 90◦

−ICV

2 sin δ

2 cos

ψ− δ

2 + 90◦

(8.37)

The power is maximized when

β = δ

2 + 90◦

(8.38)

ψ = δ

2 + 90◦

(8.39)

and Pmax is given by

Pmax = V2

X sinδ + VCV

X cos δ

2 + ICV

2 sin δ
2

(8.40)

Note that Eq. (8.40) applies for constant values of VC and IC. For maxi-
mizing P for a given value of δ, we need to set

VC = VC max, IC = IC max

(8.41)

where the maximum values of VC and IC correspond to the limits on the
magnitude of the series voltage and the shunt current.

Remarks

1. For the maximum power transfer, we have

ˆ
Vm =

V cos δ

2 + X

4 IC

δ

2

(8.42)

ˆ
Im =

2V sin δ

2 +VC

X

δ

2

(8.43)

and

Re[VmI∗C] = 0, Re[VCI∗m] = 0

(8.44)

This indicates that the shunt converter draws only reactive current
and operates as a STATCOM. However, the two halves of the series
converter exchange real power as the power generated by the series
converter (half) near port 2 is,

PDC = Re

VC

2

I∗m− I∗C

2

=−VCI∗C

4 =−VCIC
4

(8.45)

It is interesting to observe that for the condition of maximum power
ﬂow in the line, the DC power (at the DC bus) is a constant. The
series converter half on the right, absorbs this power from the network
and supplies it to the series converter (half) on the left.

256

FACTS Controllers in Power Transmission and Distribution

+

r

V

V
1

2

V

2I

I
1

P
DC

VSC1

VSC2

P
max

SSSC

P

Figure 8.15: A BTB HVDC link across a SSSC

2. From the above discussion, it is obvious that for maximum power ﬂow
conditions in the line, a UPFC is equivalent to a combination of (i)
STATCOM and (ii) IPFC. In the latter, the two series converters ex-
change real power in addition to injecting reactive voltages.

3. It is also possible to derive the conditions for the maximum power
(Eqs. (8.38) and (8.39)) and the expression for the maximum power
(Eq. (8.40)) directly [17], but the approach given here is simpler.

4. From Eq. (8.34), it is possible to compute Q for the maximum power
condition. This is given by the expression

Q = VVC sin δ

2

X + ICV

2 cos δ

2 + V2

C

2X + I2

CX

8

(8.46)

5. The equivalent network of the UPFC shown in Fig. 8.13(b) can also be
used to derive the conditions for the maximum power along with the
power expressions. Since ˆ

VC is in quadrature with ˆ

Im for the maximum
power transfer, a series connected SSSC is adequate. However the two
halves of the shunt connected converter exchange power through the
DC bus. Thus a UPFC can be represented by a SSSC connected across
a VSC based HVDC BTB (Back to Back) link. This is shown in Fig.
8.15.

In steady state, the DC power ﬂows from VSC2 to VSC1 and the

magnitude is VCIC

4 . The power ﬂow through the SSSC is

PSSSC = Pmax + VCIC
4

where Pmax is given by Eq. (8.40).

8. Uniﬁed Power Flow Controller and other Multi-Converter Devices 257

V
1

I
1

2

V

2I

P
max

m

P

rI

VSC1

VSC2

P
DC

Figure 8.16: A STATCOM connected between IPFC

In comparison with the circuit shown in Fig. 8.15, the alternate
circuit that is equivalent to UPFC (discussed earlier) is shown in Fig. 8.16.
This circuit consists of a STATCOM that injects reactive current in the
middle of an IPFC. The power Pm at the midpoint is also equal to Pmax +
ICVC

4 .

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