P. 1
nMOS Inverter

nMOS Inverter

|Views: 15|Likes:

More info:

Published by: محمد شمسي محمد توفيق on Oct 17, 2012
Copyright:Attribution Non-commercial

Availability:

Read on Scribd mobile: iPhone, iPad and Android.
download as PDF, TXT or read online from Scribd
See more
See less

08/01/2014

pdf

text

original

MOS Digital Circuits Chapter 16

• In the late 70s as the era of LSI and VLSI began, NMOS became the fabrication technology choice. • Later the design flexibility and other advantages of the CMOS were realized, CMOS technology then replaced NMOS at all level of integration. • The small transistor size and low power dissipation of CMOS circuits, demonstration principal advantages of CMOS over NMOS circuits.

NMOS Inverter
• For any IC technology used in digital circuit design, the basic circuit element is the logic inverter. • Once the operation and characterization of the inverter circuits are thoroughly understood, the results can be extended to the design of the logic gates and other more complex circuits.

NMOS Inverter
• If VI <VNT, the transistor is in cutoff and iD =0, there is no voltage drop across RD, and the out put voltage is Vo=VDD=VDS • If VI >VNT, the transistor is on and initially is biased in saturation region, since
+

NMOS Inverter Transfer Characteristics with load resister (Saturation Region)
As the input is increased slightly above the VTN, the transistor turns on and is in the saturation region. The output voltage is then vo = VDD – iDRD (16.6 ) where the drain current is given by =VDD=VDS iD = Kn(VGS - VTN)2 = Kn(Vi - VTN)2 ( 16.7) By substituting the value of ID from Eq. 16.7 we get , VO = VDD - KnRD(VI - VTN)2 (16.8)
+

RD =VDD=VDS

RD

VGS=V
+

• VDS >VGS-VTN. • As the input voltage increasesVGS=V (VGS) , the drain to source + voltage (VDS) decreases and the transistor inter into the non saturation region.

which relates the output and input voltages as long as the transistor is biased in the saturation region.

VTN)vo .NMOS Inverter Transfer Characteristics with load resister (transition Region) • As the input voltage is further increases and voltage drop across the RD become sufficient to reduce the drain to source voltage such that + NMOS Inverter Transfer Characteristics with load resister (Nonsaturation Region) • As the input voltage becomes greater than VIt.VDD VO = VDD – KnRD [2(vl .VTN) .VTN)2 = Kn(Vi . and the transistor becomes biased in the nonsaturation region.9) into (16.VTN)VDS – VDS2] = Kn[2(vI .VTN) . At the transition point.VTN)VO – Vo2] (16.VTN)2 iD = Kn(VGS .VDD = 0 VO = VDD – KnRD [2(vl . KnRD(VIt ..9 where Vo. By substituting Equation (16.VTN KnRD(VIt .vo2] . we have VGS=V + vot = VIt .VTN)2+ (VIt .11) The output voltage is then determined by vo = VDD – iDRD Substitute the value of ID from above equation we get the output voltage relation when the transistor is biased in nonsaturation region.KnRD(VI . )2+ (VIt . respectively. RD =VDD=VDS VDS≤VGS-VTN. the input voltage at the transition point can be determined as. or the logic 0 level.. and VI.VTN)VO – Vo2] vot = VIt .ource and gate to s . and the sharpness of the transition region between a low input and a high input increases with increasing load resistance.VTN)vo . for a high input decreases with increasing load resistance. The drain current is then iD = Kn[2(VGS .VTN)2 VGS=V + RD =VDD=VDS • Transition region Nonsaturation region iD = Kn[2(vI . at the transition point.VTN It should be be noted that the minimum output voltage. the Q-point continues to move up the load line. are the drain to s .VTN 16.8).vo2] + RD =VDD=VDS VGS=V + Summary of NMOS inverter C-V relationship with the resister load • Saturation region + VO = VDD . the .p of the transistor moves up the Q oint load line.ource voltages.

max= VOH =VDD-VTNL NMOS inverter with Enhancement Load/Saturated (Cont.7(b). And following condition is satisfied. • Since the gate and drain of the transistor are connected. • n-Channel MOSFET connected as saturated load device An n-channel enhancement-mode MOSFET with the gate connected to the drain can be used as load device in an NMOS inverter. VDS>(VGS-VTN) VDS (sat)= (VDS-VTN) because VGS=VDS or VDS (sat)= (VGS-VTN) In the saturation region the drain current is iD=Kn(VGS-VTN)2 = Kn(VDS-VTN)2 The iD versus vDS characteristics are shown in Figure 16.) • As the VI=>VTND A non zero drain current is induced in the transistor and thus the drive transistor operates in saturation only.VTND)2 = KL(VDD . which is thousand of times larger than a MOSFET.NMOS Inverter with Enhancement Load • This basic inverter consist of two enhancement-only NMOS transistors and is much more practical than the resister loaded inverter. NMOS Inverter with Enhancement Load/Saturated In the saturation region the load drain current is iDL=KL(VGSL-VTNL)2 = KL(VDSL-VTNL)2 For VGSD<VTN ( driver transistor ) transistor is in cutoff mode and does not conduct drain current 0= iDL=KL(VGSL-VTNL)2 = KL(VDSLVTNL)2 VGSL=VTNL or VDSL=VTNL As a result the output high voltage VO is degraded by the threshold voltage or VO. a non zero drain current is induced in the transistor and thus the transistor operates in saturation only. As shown in the figure the following condition is satisfied iDD=iDL or KD(VGSD-VTND)2 = KL(VGSL-VTNL)2 Substituting VGSD=VI and VGSL=VDD-VO yields KD(VI .KD/KL(VI-VTND) . which indicates that this device acts as a nonlinear resistor. we have VGS=VDS When VGS=VDS>VTN.VTNL)2 Solving for VO gives VO= VDD-VTNL.VO ..

KD/KL(VI-VTND) we find the input voltage at the transition point. Since the driver and load drain currents are still equal. we have VDSD(sat)= VGSD-VTND In terms of input/output transition voltages or VOt=VIt-VTND Substituting above Equation into following equation VO= VDD-VTNL. The slope of the VTC curves in the saturation region is known as inverter gain and is given by dVo/dVI= .VO2 ] = KL(VDD .NMOS inverter with Enhancement Load/Saturated (driver at the transition point) • As the input voltage (VGS) further increases.length parameters of the driver and load transistors.VDSD2] = KL(VDSL -VTNL)2 Substituting VGSD=VI and VDSD=VO and VDSL= VDD-VO we get KD[2(vl -VTND) Vo.point continues to move up the load curve and the driver becomes biased in the nonsaturation region. . which is VIt= [VDDVTNL+VTND(1+ KD/KL)]/(1+ KD/KL) NMOS Inverter with Enhancement Load/Saturated (driver at the non saturation region)) As the input voltage becomes greater than VIt the driver transistor Q.VO . or iDD = iDL.KD/KL If the inverter gain is greater then unity. the inverter logic gate is belonged to restoring logic family. we now have KD[2(VGSD .VTNL)2 The ratio KDIKL is the aspect ratio and is related to the width to.VTND)VDSD . the drive Q-point moves up and switch into the transition region..

You're Reading a Free Preview

Download
scribd
/*********** DO NOT ALTER ANYTHING BELOW THIS LINE ! ************/ var s_code=s.t();if(s_code)document.write(s_code)//-->