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Published by: EzKeezE on Jan 10, 2013
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Offset (0) 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C 0x40 0x44

0x48 0x4C 0x50 0x54 0x58 0x5C 0x60 0x64 0x68

PLL Type ALL ALL ALL ALL ALL ALL ALL ALL ALL ALL ALL ALL 0,1,2,5,6,7,8,9,10 3,4 0,3,5,7,9,10 2 1,4,6,8 0,2,3,5,7,9,10 1,4,6,8 0,1,5,6,8,9,10 2,3,4,7 0,2,3,5,9,10 1,4,6,8 7 0,2,3,5,7,9,10 1,4,6,8 0,1,3,4,5,6,7,9,10 2 8 ALL ALL ALL ALL ALL

Item Clock Generator VENDOR ID Control Register, (PLL Type) Byte Count Programming Control Register Frequency H/W IIC Select Control Register, (flag) Frequency Select IIC Control Register Frequency Select H/W Control Register CPU Divider Ratio Programming Control Register, (SetAsync) AGP Divider Ratio Programming Control Register, (SetAgp) PCI Divider Ratio Programming Control Register, (SetPci) Sub PLL Divider Ratio Programming Control Register, (SetFixBit) Main M/N Programming Enable Control Register, (MainRangeM) Sub M/N Programming Enable Control Register, (SubRangeM) Main VCO M Divider Programming Bit0-7 Control Register Main VCO M Divider Const Main VCO N Divider Programming Bit0-7,10 Control Register Main VCO N Divider Programming Bit0-7, DOC1 Bit8 Control Register Main VCO N Divider Programming High Bit Control Register Main VCO N Divider Programming Bit8,9 Control Register Main VCO N Divider Programming Low Bit Control Register Sub VCO M Divider Programming Bit0-7 Control Register Sub VCO M Divider Const Sub VCO N Divider Programming Bit 0-7,10 Control Register Sub VCO N Divider Programming High Bit Control Register Sub VCO N Divider Programming Bit 0-7 Control Register, Offset 256N Sub VCO N Divider Programming Bit8,9 Control Register Sub VCO N Divider Programming Low Bit Control Register Dynamic Over Clocking Programming Main,Sub Control Register Dynamic Over Clocking Programming Bit0-7,8 Control Register Gear Main M,N AGP Frequency Select Bit0,1 Control Register PCI Frequency Select Bit0,1 Control Register AGP,PCI Frequency Select Bit2 Control Register Async PCI Frequency Select Bit0,1 Control Register PLL Fix Select Bit0,1 Control Register

Content Combobox[Maximum 15 characters] IIC Byte IIC Unmask ID IIC Byte Minimum Write IIC Byte IIC Unmask Exor IIC Byte IIC Unmask Exor IIC Byte IIC Unmask Exor IIC Byte IIC Unmask Right Shift IIC Byte IIC Unmask Right Shift IIC Byte IIC Unmask Right Shift IIC Byte IIC Unmask Right Shift IIC Byte IIC Unmask Exor IIC Byte IIC Unmask Exor IIC Byte IIC Unmask Offset M Const --Offset M IIC Byte IIC Unmask IIC Byte IIC Byte IIC Unmask IIC Byte IIC Byte IIC Unmask Left Shift IIC Byte IIC Unmask IIC Byte IIC Byte IIC Unmask Right Shift IIC Byte IIC Unmask Offset M Const --Offset M IIC Byte IIC Unmask IIC Byte IIC Byte IIC Unmask Left Shift IIC Byte IIC Unmask Offset 256N IIC Byte IIC Unmask IIC Byte IIC Byte IIC Unmask Right Shift IIC Byte Copy Byte IIC Byte IIC Byte Copy Byte IIC Byte IIC Byte 0 IIC Byte IIC Byte IIC Unmask IIC Byte IIC Byte IIC Unmask IIC Byte IIC Byte IIC Unmask IIC Byte IIC Byte IIC Unmask IIC Byte IIC Byte IIC Unmask IIC Byte

(PCI FS X) 0x80-FF 9.4.1.6.8 CPU.7. (Main Gear) Table XX 0x100 5.10 0. Trackbar Offset Ultra Async PCI Frequency Table2.4.7.6 Const Bit/Const16 Async PCI Freq 0 Async PCI Freq 1 Async PCI Freq 2 Async PCI Freq 3 Async PCI Freq 3 CPU XX AGP XX CPU XX AGP XX Normal XX Ultra XX Normal XX Ultra XX FSB XX(<32) CR XX(<32) CPU XX AGP XX CPU XX AGP XX ----- Const Trackbar Offset Normal Trackbar Offset Ultra Trackbar Offset Sub Gear Sub Gear Main PCI XX PCI XX Sub XX Sub XX FSB XX(>31) PCI XX PCI XX --- .2.3. Trackbar Offset Normal Async PCI Frequency Table1.7.RAM Frequency Table XX -1FF 9 none 0x6C 0x70 0x74 0x78 ALL ALL ALL ALL 0. (AGP FS X) 0.3.AGP.Trackbar control Main.4. Trackbar Offset Sub Async PCI Frequency Table3.AGP.8 5.Sub Async PCI Frequency Table0. Gear Sub 0x7C Async PCI Frequency Table3.7.PCI.5.6.2.2.3.3.10 CPU.6.1.8 0xE0-FF PLL Reference Table XX.9. Gear Main PLL Divider Table A XX 0x80-BF PLL Divider Table B XX 0xC0-DF PLL Reference Table XX.PCI Frequency.1.2.1.4.10 FSB Number/Control Register Table XX 0.8 5.

acters] (PLL Type) Read (flag) Right Shift Right Shift (SetAsync) (SetAgp) (SetPci) (SetFixBit) (MainRangeM) (SubRangeM) Offset N Offset N IIC Unmask IIC Unmask --IIC Unmask --Offset N Offset N IIC Unmask --IIC Unmask Copy Byte IIC Unmask 0 IIC Unmask IIC Unmask IIC Unmask IIC Unmask IIC Unmask .

Bit/Const16 rackbar Offset Normal rackbar Offset Ultra rackbar Offset Sub ear Sub ear Main Sub XX RAM XX AGP FS X PCI FS X CR XX(>31) (Gear Main XX) RAM XX --- .

(SetAgp) 0x29 0x2A 0x2B ページ 5 . (SetAsync) 0x25 0x26 0x27 0x28 AGP Divider Ratio Programming.Details Offset Item 0x10 VENDOR ID. (PLL Type) 0x11 0x12 0x13 Content IIC Byte IIC Unmask ID (PLL Type) 0 1 2 3 4 5 6 7 8 9 10 IIC Byte Minimum Write Read IIC Byte IIC Unmask Exor (flag) Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 IIC Byte IIC Unmask Exor Right Shift IIC Byte IIC Unmask Exor Right Shift IIC Byte IIC Unmask Right Shift (SetAsync) 0 1 2 3 0xFF IIC Byte IIC Unmask Right Shift (SetAgp) 0 0x14 Byte Count 0x15 0x16 0x17 0x18 Frequency H/W IIC Select 0x19 0x1A 0x1B 0x1C Frequency Select IIC 0x1D 0x1E 0x1F 0x20 Frequency Select H/W 0x21 0x22 0x23 0x24 CPU Divider Ratio Programming.

Details 1 2 3 4 5 6 7 0xFF IIC Byte IIC Unmask Right Shift (SetPci) 0 1 2 3 4 5 6 7 0xFF IIC Byte IIC Unmask Right Shift (SetFixBit) 0 1 2 3 0xFF IIC Byte IIC Unmask Exor (Main RangeM) 0x2C PCI Divider Ratio Programming. (Main RangeM) 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B 0x3C 0x3D 0x3E 0x3F 0x3C 0x3D 0x3E 0x3F 0x40 0x41 Sub M/N Programming Enable. (Sub RangeM) Main VCO M Divider Programming Bit0-7 Main VCO M Divider Const Main VCO N Divider Programming Bit0-7.10 IIC Byte IIC Unmask Exor (Sub RangeM) IIC Byte IIC Unmask Offset M Offset N Const --Offset M Offset N IIC Byte IIC Unmask ページ 6 . (SetPci) 0x2D 0x2E 0x2F 0x30 Sub Divider Ratio Programming. (SetFixBit) 0x31 0x32 0x33 0x34 Main M/N Programming Enable.

Offset 256N Sub VCO N Divider Programming Bit8. DOC1 Bit8 Main VCO N Divider Programming High Bit Main VCO N Divider Programming Bit8.10 Sub VCO N Divider Programming High Bit Sub VCO N Divider Programming Bit0-7.9 Main VCO N Divider Programming Low Bit Sub VCO M Divider Programming Bit0-7 Sub VCO M Divider Const Sub VCO N Divider Programming Bit0-7.Details 0x42 0x43 0x40 0x41 0x42 0x43 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x44 0x45 0x46 0x47 0x48 0x49 0x4A 0x4B 0x48 0x49 0x4A 0x4B 0x4C 0x4D 0x4E 0x4F 0x4C 0x4D 0x4E 0x4F 0x4C 0x4D 0x4E 0x4F 0x50 0x51 0x52 0x53 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x54 0x55 0x56 IIC Byte IIC Unmask IIC Byte IIC Unmask IIC Byte IIC Unmask IIC Byte IIC Unmask Left Shift --IIC Byte IIC Unmask IIC Byte IIC Unmask IIC Byte IIC Unmask Right Shift --IIC Byte IIC Unmask Offset M Offset N Const --Offset M Offset N IIC Byte IIC Unmask IIC Byte IIC Unmask IIC Byte IIC Unmask Left Shift --IIC Byte IIC Unmask Offset 256N --IIC Byte IIC Unmask IIC Byte IIC Unmask IIC Byte IIC Unmask Right Shift --IIC Byte Copy Byte IIC Byte Copy Byte IIC Byte Copy Byte IIC Byte Main VCO N Divider Programming Bit0-7.8 ページ 7 .Sub Dynamic Over Clocking Programming Bit0-7.9 Sub VCO N Divider Programming Low Bit Dynamic Over Clocking Programming Main.

Sub 0x6D Bit/Const256 0x6E 0x6F 0x70 0x72 0x74 0x76 0x78 0x7A 0x7C 0x7E 0x7C 0x7E 0x80-BF Async PCI Frequency Table0. Gear Sub Async PCI Frequency Table3.1 PCI Frequency Select Bit0.1 AGP. Gear Main PLL Divider Ratio A Table XX 0x80-BF PLL Divider Ratio B Table XX Const Bit/Const256 Async PCI Freq 0 Offset Normal Async PCI Freq 1 Offset Ultra Async PCI Freq 2 Offset Sub Async PCI Freq 3 Gear Sub Async PCI Freq 3 Gear Main CPU XX AGP XX PCI XX Sub XX CPU XX AGP XX ページ 8 . Trackbar Offset Ultra Async PCI Frequency Table2.1 Trackbar control Main. Trackbar Offset Normal Async PCI Frequency Table1.N IIC Unmask IIC Byte --IIC Byte --IIC Byte IIC Unmask IIC Byte IIC Unmask IIC Byte IIC Unmask IIC Byte IIC Unmask IIC Byte IIC Unmask IIC Byte IIC Unmask IIC Byte IIC Unmask IIC Byte IIC Unmask IIC Byte IIC Unmask IIC Byte IIC Unmask Const AGP Frequency Select Bit0. Trackbar Offset Sub Async PCI Frequency Table3.1 PLL Fix Bit0.PCI Frequency Select Bit2 Async PCI Frequency Select Bit0.Details 0x57 0x54 0x55 0x56 0x57 0x58 0x59 0x5A 0x5B 0x5C 0x5D 0x5E 0x5F 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6A 0x6B 0x6C Gear Main M.

(Main Gear) Table XX 0x100-1FF CPU.AGP.FSB Table XX ページ 9 . (AGP FS X) 0xE0-FF PLL Reference Table XX.PCI.PCI Frequency.AGP.Details PCI XX RAM XX Normal XX Ultra XX Sub XX (AGP FS X) 0 1 2 3 Normal XX Ultra XX Sub XX (PCI FS X) 0 1 2 3 FSB XX(<32) CR XX(<32) FSB XX(>31) CR XX(>31) CPU XX AGP XX PCI XX (Main Gear) XX CPU XX AGP XX PCI XX RAM XX CPU XX AGP XX PCI XX FSB XX 0xC0-DF PLL Reference Table XX. (PCI FS X) 0x80-FF FSB Number/Control Register Table XX 0x100-1FF CPU.PCI Frequency.RAM Frequency Table XX 0x100-1FF CPU.AGP.

Bit7-4).0xFF] Async PCI Frequency Table0 Async PCI Frequency Table1 Async PCI Frequency Table2 Async PCI Frequency Table3 Same as Control Register [0-0x2F] [0-0xFF] [0-7. 1:AGP 0:Gearx1. 1:Gearx1000 0:BlockRead.W ICS W ICS ICS. 1:ByteWrite 1:RTM5xx [0-0x2F] [0-0xFF]: 0xF4(Bit2.Bit6-4) [0-0xFF] [0-7] [0-0x2F] [0-0xFF] [0-7..IMI.SLG CY CV.RTM ICS.0xFF]: 0xFF(Use Frequency Select) [0-7.SLG ICS fAgp fGear fByteRead(SMBus) fDFI fDFOC fByteWrite(SMBus) fRTM520 ページ 10 .RTM.Bit6-4) [0-0xFF] [0-7] [0-0x2F] [0-0xFF]: 0x71(Bit0. 0x76(Bit2-1.SLG RTM ICS.0xFF]: 0xFF(Use Frequency Select) [0-3. 1:ByteRead 1:DFI(ICS9LPRS918JKL) 1:DFOC(Use DFOC1) 0:BlockWrite.Details Details [0-0x2F] [0-0xFF] [0-0xFF]: 0xFF(No Check) [0-7] ICS Type A ICS Type B CYPRESS IDT REALTEK ICS Type C ICS Type D WINBOND ICS Type E ICS Type F ICS Type G [0-0x2F] [0-0x1F]: 0xFF(No Check) [0-0x20]: 0xFF(Same as Read) [0-0x30]: 0xFF(No Byte Count) [0-0x2F] [0-0xFF]: not 0(IIC) [0-0xFF] [0-0xFF] 0:PCI-E.0xFF] AGP FS Table0 Remarks ICS.

0xFF] PCI FS Table0 PCI FS Table1 PCI FS Table2 PCI FS Table3 PCI FS Table4 PCI FS Table5 PCI FS Table6 PCI FS Table7 Same as Control Register [0-0x2F] [0-0xFF] [0-7.1to 10 PLL Fix Bit0.1to 00 PLL Fix Bit0.0xFF]: 0xFF(Use Frequency Select) [0-7.Details AGP FS Table1 AGP FS Table2 AGP FS Table3 AGP FS Table4 AGP FS Table5 AGP FS Table6 AGP FS Table7 Same as Control Register [0-0x2F] [0-0xFF] [0-7.1to 01 PLL Fix Bit0.0xFF] PLL Fix Bit0.1to 11 Same as Control Register [0-0x2F] [0-0xFF]: 0xFF(ICS954201BGLF) [0-0xFF] [0-0x81]: 255-1 [0-0x71]: 127-1 [0-0x61]: 63-1 [0-0x11]: 1-1 [0-0x3C]: 60-60 [0-0x0C]: 12-12 [0-0x2F] [0-0xFF]: 0(Use Main M/N Programming) [0-0xFF] [0-0x81]: Same as Main RangeM [0-0x2F] [0-0xFF] [0-0xFF] [0-0xFF] [0-0xFF] [0] [0-0xFF] [0-0xFF] [0-0x2F] [0-0xFF] Range PLL M Range PLL M Bit0-7 Bit0-7 Bit0-7 Bit0-7 ページ 11 .0xFF]: 0xFF(Frequency Select) [0-3.

3 Bit10 Bit10 Bit0-7 Bit0-7 DOC1 Bit8 DOC1 Bit8 Bit8 Bit8 Bit9 Bit9 Bit0-7 Bit0-7 Bit0-7 Bit0-7 Bit10 Bit10 Bit0-7 Bit0-7 Offset=[256N]*256+N Bit8 Bit8 Bit9 Bit9 Main Bit0-7 Main Bit0-7 Sub Bit0-7 Sub Bit0-7 Main Bit0-7 Main Bit0-7 Main Bit8 ページ 12 .Details [0-0x2F] [0-0xFF] [0-0x2F] [0-0xFF] [0-0x2F] [0-0xFF] [0-0x2F] [0-0xFF] [0-7] [0] [0-0x2F] [0-0xFF] [0-0x2F] [0-0xFF] [0-0x2F] [0-0xFF]: 0x05(5->1.0->0) [0-7] [0] [0-0x2F] [0-0xFF] [0-0xFF] [0-0xFF] [0-0xFF] [0] [0-0xFF] [0-0xFF] [0-0x2F] [0-0xFF] [0-0x2F] [0-0xFF] [0-0x2F] [0-0xFF] [0-7] [0] [0-0x2F] [0-0xFF] [0-0xFF] [0] [0-0x2F] [0-0xFF] [0-0x2F] [0-0xFF] [0-0x2F] [0-0xFF] [0-7] [0] [0-0x2F]: DFOC1 [0-3] [0-0x2F]: DFOC1 [0-3] [0-0x2F]: DFOC1 [0-3] [0-0x2F]: DFOC1.2.

3Mhz 3333: 33.3Mhz ページ 13 .01MHz [0-0xFFFF] [0-0xFFFF] 0.Details [0-0xFF]: DFOC1.01MHz [0-0xFFFF] [0-0xFF] [0-0xFF] [0-0xFF] [0-0xFF] [0-0xFF] [0-0xFF] Main Bit8 Main Bit0-7 Main Bit8 Bit0 Bit0 Bit1 Bit1 Bit0 Bit0 Bit1 Bit1 AGP Bit2 AGP Bit2 PCI Bit2 PCI Bit2 Bit0 Bit0 Bit1 Bit1 Bit0 Bit0 Bit1 Bit1 Main Main Main Main Main Main Main Main Main Main Sub Sub 3333: 33.3 [0-0x2F]: Gear Main M [0] [0-0x2F]: Gear Main N [0] [0-0x2F] [0-0xFF] [0-0x2F] [0-0xFF] [0-0x2F] [0-0xFF] [0-0x2F] [0-0xFF] [0-0x2F] [0-0xFF] [0-0x2F] [0-0xFF] [0-0x2F] [0-0xFF] [0-0x2F] [0-0xFF] [0-0x2F] [0-0xFF] [0-0x2F] [0-0xFF] [0x0F]: Bit11 [0x07]: Bit10 [0x83]: Bit9 [0x41]: Bit8 [0x20]: Bit7 [0xB2]: Bit11 [0xA1]: Bit10 [0x90]: Bit9 [0x80]: Bit8 [0x70]: Bit7 Same as main.01MHz [0-0xFFFF] [0-0xFFFF] 0.01MHz [0-0xFFFF] [0-0xFFFF] 0.3Mhz 3333: 33. [0x7F]: Invalidity Same as main.01MHz [0-0xFFFF] [0-0xFFFF] 0. [0x70]: Invalidity [0-0xFFFF] 0.3Mhz 3333: 33.3Mhz 3333: 33.2.

Details [0-0xFF] [0-0xFF] [0-0xFF] [0-0xFF] [0-0xFF] [0-3] Main VCO M/N Programming Enable Sub VCO M/N Programming Enable Main VCO Frequency Table Async Frequency [0-0xFF] [0-0xFF] [0-0xFF] [0-3] Main VCO M/N Programming Enable Sub VCO M/N Programming Enable Main VCO Frequency Table Async Frequency [0-0x3F] [0-0x3F] [0-0x3F] [0-0x3F] [0-0xFFFF] 0.01MHz [0-0xFFFF] 0.0MHz 6667: 66.01MHz [0-0xFFFF] 0.7MHz 3333: 33.7MHz 3333: 33.01MHz [0-0xFFFF] Main VCO M Divider Main VCO M Divider Sub VCO M Divider Main VCO M Divider Main VCO M Divider Sub VCO M Divider 10000: 100.0MHz 6667: 66.01MHz [0-0xFFFF] 0.01MHz [0-0xFFFF] 0.0MHz 6667: 66.3Mhz ページ 14 .01MHz [0-0xFFFF] 0.3MHz 10000: 100.01MHz [0-0xFFFF] [0-0xFFFF] 0.3Mhz 10000: 100.01MHz [0-0xFFFF] 0.01MHz [0-0xFFFF] 0.3Mhz 13333: 133.01MHz [0-0xFFFF] 0.7MHz 3333: 33.

PLL Type Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 Clock Generator ICS9148BF-26 ICS9248BF-87 ICS9248BF-96 ICS9248BF-102 ICS9248EF-199 ICS932S401EGLF ICS932S421BGLF ICS94201DF ICS94222AF ICS94225AF ICS94228BF ICS94229AF ICS94237AF ICS950209CF ICS950405AF ICS950410AFLF ICS950703BF ICS950812BG ICS950910AF ICS951402AG ICS951403CF ICS951412AG ICS951416BGLF ICS951417AFLF ICS951461BGLF ICS951462AGLF ICS951463BGLF ICS951464AGLF ICS952001AF ICS952003AF ICS952013CFLF ICS952018AF ICS952505AF ICS952607EF ICS952611BF ICS952619CF ICS952623CG ICS952703BF ICS952906AGLF ICS953002DFLF ICS953401CFLF ICS953805CFLF ICS954103EF ICS954105BF ICS954108CFLF ICS954119DFLF ICS954123CGLF ICS954124AFLF ICS954127BFLF ICS954141CFLF ICS954201BGLF ICS954213AGLF PLL Type 9 10 10 10 5 0 0 6 1 1 1 1 1 0 0 0 0 0 0 5 6 9 0 0 0 0 0 0 5 5 5 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ページ 15 .

PLL Type 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 ICS954227CGLF ICS954310BGLF ICS954321AGLF ICS954519BGLF ICS954552CGLF ICS9LPRS113AKLF ICS9LPRS133BKLF ICS9LPRS139AKLF ICS9LPR310BGLF ICS9LPR316AGLF ICS9LPR321BKLF ICS9LPRS355BGLF ICS9LPR362AGLF ICS9LPR363DGLF ICS9LPRS365BGLF ICS9LPR367AGLF ICS9LPRS419CFLF ICS9LPR426AGLF ICS9LPR427AGLF ICS9LPRS471AKL ICS9LPRS477BKL ICS9LPR501HGLF ICS9LPR501SGLF ICS9LP505-2HGLF ICS9LPRS509HGLF ICS9LPRS511EGLF ICS9LPRS514EGLF ICS9LPRS552AGLF ICS9LPRS587AGLF ICS9LPRS587EGLF ICS9LPR604AGLF ICS9LPRS906CGLF ICS9LPRS910BKL ICS9LPRS914EKL ICS9LPRS916JGLF ICS9LPRS918BKL ICS9LPRS918JKL ICS9LPRS919BKL ICS9LPRS926EGLF ICS9LPRS929AKLF ICS9LPRS954BGLF ICS9UMS9610BL CV110JPVG CV115CPV CV122CPVG CV125PAG CV137PAG CV152PVG CV174CPAG CV179CNLG CV183APAG CV184-2APAG CV190BPAG 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 1 1 1 8 11 11 0 0 0 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 0 3 3 3 3 3 3 3 3 3 3 3 ページ 16 .

PLL Type 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 CV193CPAG CY28341OC-3 CY28346ZI-2 CY28349BOC CY28551LFXC CY28551LFXC_DFI IMIC9827HY RTM520-39D RTM580-255R RTM862-520 RTM865T-300 RTM865T-433 RTM866-485 RTM866-890 RTM870T-691 RTM875T-587 RTM876-660 RTM876-665 RTM885N-914 RTM885T-926B SLG505YC56DT SLG505YC256BT SLG505YC264BT SLG8SP513V SLG8LP625T W83194BG-SD W83194R-39B W83195BR-25 W83195BG-101 3 2 0 2 2 2 0 0 0 4 4 4 4 4 4 3 4 4 3 3 3 1 1 9 9 7 7 5 7 ページ 17 .

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