Buck converter

From Wikipedia, the free encyclopedia Jump to: navigation, search A buck converter is a step-down DC to DC converter. Its design is similar to the step-up boost converter, and like the boost converter it is a switched-mode power supply that uses two switches (a transistor and a diode), an inductor and a capacitor. The simplest way to reduce the voltage of a DC supply is to use a linear regulator (such as a 7805), but linear regulators waste energy as they operate by dissipating excess power as heat. Buck converters, on the other hand, can be remarkably efficient (95% or higher for integrated circuits), making them useful for tasks such as converting the main voltage in a computer (12 V in a desktop, 12-24 V in a laptop) down to the 0.8-1.8 volts needed by the processor.


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1 Theory of operation o 1.1 Conceptual Overview o 1.2 Continuous mode o 1.3 Discontinuous mode o 1.4 From discontinuous to continuous mode (and vice versa) o 1.5 Non-ideal circuit  1.5.1 Output voltage ripple  1.5.2 Effects of non-ideality on the efficiency o 1.6 Specific structures  1.6.1 Synchronous rectification  1.6.2 Multiphase buck 2 Efficiency factors 3 Impedance matching 4 See also 5 References 6 External links

Theory of operation

Fig. 1: Buck converter circuit diagram.

Fig. Fig. The operation of the buck converter is fairly simple. all the components are considered to be perfect. Further. with an inductor and two switches (usually a transistor and a diode) that control the inductor converter. 4: Evolution of the voltages and currents with time in an ideal buck converter operating in continuous mode. 2: The two circuit configurations of a buck converter: On-state. In the idealised converter. 3: Naming conventions of the components. Conceptual Overview . and Off-state. Specifically. the switch and the diode have zero voltage drop when on and zero current flow when off and the inductor has zero series resistance. when the switch is open (Arrows indicate current as the conventional flow model). Fig. voltages and current of the buck converter. it is assumed that the input and output voltages do not change over the course of a cycle (this would imply the output capacitance being infinitely large). when the switch is closed.

The current through the inductor rises linearly. The capacitor placed in parallel with the load helps to smooth out voltage waveform as the inductor charges and discharges in each cycle. no current flows through it. the voltage across the inductor is . The energy stored in inductor L is . During this time. When the switch is first closed. Continuous mode A buck converter operates in continuous mode if the current through the inductor (IL) never falls to zero during the commutation cycle. the inductor is discharging its stored energy into the rest of the circuit. then there will always be a voltage drop across it. so the net voltage seen by the load will always be less than the input voltage source. the inductor is storing energy in the form of a magnetic field. This voltage drop counteracts the voltage of the source and therefore reduces the net voltage across the load. the voltage source will be removed from the circuit. Again. Put another way. Beginning with the switch open (in the "off" position). If the switch is opened before the inductor has fully charged (i.. the inductor will try to fight against it changing. In this mode. which it does by reversing the direction of its voltage and acting like a voltage source.e. the operating principle is described by the plots in figure 4:   When the switch pictured above is closed (On-state. When the switch is opened again.The conceptual model of the buck converter is best understood in terms of an inductor's "reluctance" to allow a change in current. the inductor will have to take the place of the voltage source and provide the same net voltage to the load. so the current will try to drop. As the diode is reverse-biased by the voltage source V. Over time. Over time. but the inductor doesn't want it to change from 0. During this time. When the switch is opened (off state. the current will begin to increase. top of figure 2). the diode is forward biased. the inductor will allow the current to increase slowly by decreasing the voltage it drops and therefore increasing the net voltage seen by the load. so it will attempt to fight the increase by dropping a voltage. before it has allowed all of the current to pass through by reducing its own voltage drop to 0). the load will always see a nonzero voltage. the current in the circuit is 0. Current IL decreases. bottom of figure 2). If the switch is closed again before the inductor fully discharges. which it does by decreasing the voltage across itself. the inductor will allow the current to decrease gradually. there is a certain current flowing through the load due to the input voltage source: in order to maintain this current when the input source is removed. The voltage across the inductor is (neglecting diode drop).

these areas must be equal. This yields: . the decrease in current during the Off-state is given by: If we assume that the converter operates in steady state. Therefore. As these surfaces are simple rectangles. is proportional to the area of the yellow surface. and value between 0 and 1. D is a scalar called the duty cycle with a .Therefore. That means that the current IL is the same at t=0 and at t=T (see figure 4). and to the area of the orange surface. it can be seen that the energy stored in L increases during On-time (as IL increases) and then decreases during the Off-state. as these surfaces are defined by the inductor voltage (red) curve. So we can write from the above equations: It is worth noting that the above integrations can be done graphically: In figure 4. the energy stored in each component at the end of a commutation cycle T is equal to that at the beginning of the cycle. The rate of change of IL can be calculated from: With VL equal to during the On-state and to increase in current during the On-state is given by: during the Off-state. their areas can be found easily: for the yellow rectangle and for the orange one. For steady state operation. L is used to transfer energy from the input to the output of the converter. the Identically. As can be seen on figure 4.

This is why this converter is referred to as step-down converter. for example. in our theoretically ideal circuit. Therefore.e. the energy in the inductor is the same at the beginning and at the end of the cycle (in the case of discontinuous mode. . the amount of energy required by the load is too big. it cannot be more than 1. The only difference in the principle described above is that the inductor is completely discharged at the end of the commutation cycle (see figure 5). Discontinuous mode In some cases. This yields: So the value of δ is: . the current through the inductor falls to zero during part of the period. In this case. This means that the average value of the inductor voltage (VL) is zero. it can be seen that the output voltage of the converter varies linearly with the duty cycle for a given input voltage.From this equation. it is zero). i. Therefore. We still consider that the converter operates in steady state. some effect on the previous equations. 5: Evolution of the voltages and currents with time in an ideal buck converter operating in discontinuous mode.. So. This has. As the duty cycle D is equal to the ratio between tOn and the period T. that the area of the yellow and orange rectangles in figure 5 are the same. Fig. stepping 12 V down to 3 V (output voltage equal to a fourth of the input voltage) would require a duty cycle of 25%. however.

As can be seen in figure 5. the output voltage is now a function not only of the input voltage (Vi) and the duty cycle D. the average value of IL can be sorted out geometrically as follow: The inductor current is zero at the beginning and rises during ton up to ILmax. but also of the inductor value (L).The output current delivered to the load ( ) is constant. Therefore. . the commutation period (T) and the output current (Io). we have : Where is the average value of the inductor current. as we consider that the output capacitor is large enough to maintain a constant voltage across its terminals during a commutation cycle. Furthermore. This implies that the current flowing through the capacitor has a zero average value. That means that ILmax is equal to: Substituting the value of ILmax in the previous equation leads to: And substituting δ by the expression given above yields: This expression can be rewritten as: It can be seen that the output voltage of a buck converter operating in discontinuous mode is much more complicated than its counterpart of the continuous mode. Therefore. the inductor current waveform has a triangular shape.

the converter operates in discontinuous mode when low current is drawn by the load. the former is So Iolim can be written as: . The limit between discontinuous and continuous modes is reached when the inductor current falls to zero exactly at the end of the commutation cycle.From discontinuous to continuous mode (and vice versa) Fig. As mentioned at the beginning of this section. In particular. this corresponds to : Therefore. the output voltage obeys both the expressions given respectively in the continuous and the discontinuous sections. 6: Evolution of the normalized output voltages with the normalized output current. with the notations of figure 5. the output current (equal to the average inductor current) at the limit between discontinuous and continuous modes is (see above): Substituting ILmax by its value: On the limit between the two modes. and in continuous mode at higher load current levels.

So. the increase of the inductor current with a duty cycle D=1.e. The term is equal to the maximum increase of the inductor current during a cycle. defined by .Let's now introduce two more notations:  the normalized voltage.. defined by . . and 1 for the maximum current the converter can deliver. It is zero when . this means that equals 0 for no output current. in steady state operation of the converter. i. we have:  in continuous mode:  in discontinuous mode: the current at the limit between continuous and discontinuous mode is: Therefore. the locus of the limit between continuous and discontinuous modes is given by: . and 1 when  the normalized current. Using these notations.

The previous study was conducted with the following assumptions:    The output capacitor has enough capacitance to supply power to the load (a simple resistance) without any noticeable variation in its voltage. Output voltage ripple Output voltage ripple is the name given to the phenomenon where the output voltage rises during the On-state and falls during the Off-state. output capacitance. it is obvious that in continuous mode. Non-ideal circuit Fig. The voltage drop across the diode when forward biased is zero No commutation losses in the switch nor in the diode These assumptions can be fairly far from reality. the output voltage does only depend on the duty cycle. 7: Evolution of the output voltage of a buck converter with the duty cycle when the parasitic resistance of the inductor increases. switching frequency.These expressions have been plotted in figure 6. This is important from a control point of view. From this. Several factors contribute to this including. but not limited to. inductor. At the most basic level the output voltage will rise and fall as a result of the output capacitor charging and discharging: . and the imperfections of the real components can have a detrimental effect on the operation of the converter. load and any current limiting features of the control circuitry. whereas it is far more complex in the discontinuous mode.

Both static and dynamic power losses occur in any switching regulator. which tends to decrease at higher operating frequencies. as the output capacitor or switching frequency increase. In the On-state the current is the difference between the switch current (or source current) and the load current. and can also be a measure of its quality. inductors. Switching frequency selection is typically determined based on efficiency requirements. as described below in Effects of non-ideality on the efficiency. physical size and non-idealities of various capacitor types. Effects of non-ideality on the efficiency A simplified analysis of the buck converter.During the Off-state. diodes. Output voltage ripple is one of the disadvantages of a switching power supply. The duration of time (dT) is defined by the duty cycle and by the switching frequency. For the On-state: For the Off-state: Qualitatively. etc. and are proportional to the switching frequency. the magnitude of the ripple decreases. which is: where: . as described above. It is useful to begin by calculating the duty cycle for a non-ideal buck converter. as in any electrical circuit. does not account for nonidealities of the circuit components nor does it account for the required control circuitry. Power losses due to the control circuitry is usually insignificant when compared with the losses in the power devices (switches. the current in this equation is the load current. such as the charging and discharging of the switch gate. Static power losses include (conduction) losses in the wires or PCB traces. Capacitor selection is normally determined based on cost. as well as in the switches and inductor. Higher switching frequency can also reduce efficiency and possibly raise EMI concerns.) The non-idealities of the power devices account for the bulk of the power losses in the converter. Dynamic power losses occur as a result of switching. Output voltage ripple is typically a design specification for the power supply and is selected based on several factors.

for components such as the power MOSFET. . For a transistor in saturation or a diode drop. Dynamic power losses are due to the switching behavior of the selected pass devices (MOSFETs. where:   RON is the ON-resistance of each switch (RDSON for a MOSFET).). A rough analysis can be made by first calculating the values VSWITCH and VSYNCHSW using the ideal duty cycle equation. power transistors. These losses include turn-on and turn-off switching losses and switch transition losses. In addition. and forward voltage. VSWITCH and VSYNCHSW may already be known. and can therefore be easily calculated. based on the properties of the selected device. IGBTs. VSYNCHSW is the voltage drop on the synchronous switch or diode. This power loss is simply where:   ILEAKAGE is the leakage current of the switch. The careful reader will note that the duty cycle equation is somewhat recursive. power loss occurs as a result of leakage currents. The voltage drops described above are all static power losses which are dependent primarily on DC current. and RDCR is the DC resistance of the inductor. Switch turn-on and turn-off losses are easily lumped together as where:  V is the voltage across the switch while the switch is off. for components such as the insulated-gate bipolar transistor (IGBT) can be determined by referring to datasheet specifications. and VL is the voltage drop on the inductor.   VSWITCH is the voltage drop on the power switch. Switch resistance. etc. and V is the voltage across the switch.

power losses occur as a result of the power required to turn the switches on and off. these losses are dominated by the gate charge. and tNO is the selected non-overlap time. essentially the energy required to charge and discharge the capacitance of the MOSFET gate between the threshold voltage and the selected gate voltage. or by operating at a lower frequency. and T is the switching period. Then.  tRISE and tFALL are the switch rise and fall times. and can be minimized by selecting MOSFETs with low gate charge. when the body diode of the low-side MOSFET conducts the output current. known as the nonoverlap time. the high-side switch must be driven to a higher voltage than Vi. diode forward turn-on time can reduce efficiency and lead to voltage overshoot. This time. and VGS is the peak gate-source voltage. . These switch transition losses occur primarily in the gate driver. the switch losses will be more like: When a MOSFET is used for the lower switch. For MOSFET switches. additional losses may occur during the time between the turn-off of the high-side switch and the turn-on of the low-side switch. for N-MOSFETs.[1] Power loss on the body diode is also proportional to switching frequency and is where:   VF is the forward voltage of the body diode. Therefore VG will nearly always be different for the high-side and low-side switches. Proper selection of non-overlap time must balance the risk of shootthrough with the increased power loss caused by conduction of the body diode. But this doesn't take into account the parasitic capacitance of the MOSFET which makes the Miller plate. The onset of shootthrough generates severe power loss and heat. When a diode is used for the lower switch. where:   QG is the gate charge of the selected MOSFET. Finally. It is essential to remember that. by driving the MOSFET gate to a lower voltage (at the cost of increased MOSFET conduction losses). a condition in which both switches are simultaneously turned on. prevents "shootthrough".

a MOSFET with very low RDSON might be selected for S2. a converter operating at a high duty cycle requires a low-side switch with low conduction losses. S2. on its own. By replacing diode D with switch S2. 8: Simplified schematic of a synchronous converter. D. as a result of the rising voltage across the diode. In a standard buck converter. which is advantageously selected for low losses. shortly after the switch turns off. It stands to reason that the power loss on the freewheeling diode . Specific structures Synchronous rectification Fig. power loss is strongly dependent on the duty cycle.A complete design for a buck converter includes a tradeoff analysis of the various power losses. and Io is the load current. D. providing power loss on switch 2 which is By comparing these equations the reader will note that in both cases. the freewheeling diode turns on. This voltage drop across the diode results in a power loss which is equal to where:    VD is the voltage drop across the diode at the load current Io. This modification is a tradeoff between increased cost and improved efficiency. For example. in which D is replaced by a second switch. D is the duty cycle. S2 A synchronous buck converter is a modified version of the basic buck converter circuit topology in which the diode. the converter efficiency can be improved. A converter expected to have a low switching frequency does not require switches with low gate transition losses. is replaced by a second switch. Designers balance these losses according to the expected uses of the finished design.

Without actual numbers the reader will find the usefulness of this substitution to be unclear." The simplest technique for avoiding shootthrough is a time delay between the turn-off of S1 to the turn-on of S2. A well-selected MOSFET with RDSON of 0.38 W. Second. systems designed for low duty cycle operation will suffer from higher losses in the freewheeling diode or lower switch. When the switch node voltage passes a preset threshold. A typical diode with forward voltage of 0. First. When power is transferred in the "reverse" direction. it acts much like a boost converter. would waste only 0. Another advantage of the synchronous converter is that it is bi-directional. and vice versa. which lends itself to applications requiring regenerative braking. the time delay is started. the lower switch typically costs more than the freewheeling diode. S2 and L are joined) is sensed to determine its state. An improved technique for preventing this condition is known as adaptive "non-overlap" protection. in which the voltage at the switch node (the point where S1. The driver can thus adjust to many types of switches without the excessive power loss this flexibility would cause with a fixed non-overlap time. This translates to improved efficiency and reduced heat loss.3 V. the duty cycle will be 66% and the diode would be on for 34% of the time. The advantages of the synchronous buck converter do not come without cost. Consider a computer power supply.51 W in conduction loss. the complexity of the converter is vastly increased due to the need for a complementary-output switch driver.015 Ω. In this case.7 V would suffer a power loss of 2. and the load current is 10A.or lower switch will be proportional to its on-time. however. and for such systems it is advantageous to consider a synchronous buck converter design. Multiphase buck . setting this time delay long enough to ensure that S1 and S2 are never both on will itself result in excess power loss. the output is 3. However. a fault known as "shootthrough. Such a driver must prevent both switches from being turned on at the same time. where the input is 5 V. Therefore.

. such as modern microprocessors. Not only is there the decrease due to the increased effective frequency. 9: Schematic of a generic synchronous n-phase buck converter. less than 10mV. The smaller inductor below the heat sink is part of an input filter. Modern CPU power requirements can exceed 200W. although control IC manufacturers allow as many as 6 phases[4] One major challenge inherent in the multiphase converter is ensuring the load current is balanced evenly across the n phases. Thus. suitable for the CPU.[2] but any time that n times the duty cycle is an integer. This circuit topology is used in computer power supplies to convert the 12 VDC power supply to a lower voltage (around 1 V). Fig. Each of the n "phases" is turned on at equally spaced intervals over the switching period. described above. without the increase in switching losses that would cause. 10: Closeup picture of a multiphase CPU power supply for an AMD Socket 939 processor. Another advantage is that the load current is split among the n phases of the multiphase converter. The three phases of this supply can be recognized by the three black toroidal inductors in the foreground. The primary advantage of this type of converter is that it can respond to load changes as quickly as if it switched at n times as fast. Typical motherboard power supplies use 3 or 4 phases. the rate at which the inductor current is increasing in the phases which are switched on exactly matches the rate at which it is decreasing in the phases which are switched off. There is also a significant decrease in switching ripple. and have very tight ripple requirements. the switching ripple goes to 0. This circuit is typically used with the synchronous buck topology. The multiphase buck converter is circuit topology where the basic buck converter circuit are placed in parallel between the input and load.Fig. This load splitting allows the heat losses on each of the switches to be spread across a larger area.[3] can change very rapidly. This current balancing can be performed in a number of ways. it can respond to rapidly changing loads.

Voltage can be measured losslessly. since switching noise cannot be easily filtered out. or using a power resistor. Finally.4 V for schottky diode) Inductor winding resistance Capacitor equivalent series resistance Switching losses:      Voltage-Ampere overlap loss Frequencyswitch*CV2 loss Reverse latence loss Losses due driving MOSFET gate and controller consumption. the current can be measured at the input. An application of this is in a "maximum power point tracker" commonly used in photovoltaic systems. This approach is technically more challenging. and controller standby consumption. By the equation for electric power: where:      Vo is the output voltage Io is the output current η is the power efficiency (ranging from 0 to 1) Vi is the input voltage Ii is the input current . Efficiency factors Conduction losses that depend on load:     Resistance when the transistor or MOSFET switch is conducting. Transistor leakage current losses. it is less expensive than emplacing a sense resistor for each phase. This technique is considered lossless because it relies on resistive losses inherent in the buck converter topology. but incurs several costs—space. to approximate the current being drawn. This approach is more accurate and adjustable.7 V or 0. Another technique is to insert a small resistor in the circuit and measure the voltage across it. efficiency and money. However. Diode forward voltage drop (usually 0.Current can be measured "losslessly" by sensing the voltage across the inductor or the lower switch (when it is turned on).[5] Impedance matching A buck converter can be used to maximize the power transfer through the use of impedance matching. across the upper switch.

By Ohm's Law: where:   Zo is the output impedance Zi is the input impedance Substituting these expressions for Io and Ii into the power equation yields: As was previously shown for the continuous mode. . (where IL > 0): where:  D is the duty cycle Substituting this equation for Vo into the previous equation. yields: which reduces to: and finally: This shows that it is possible to adjust the impedance ratio by adjusting the duty cycle. This is particularly useful in applications where the impedance(s) are dynamically changing.

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